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From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
To: Chanho Park <chanho61.park@samsung.com>,
	Sylwester Nawrocki <s.nawrocki@samsung.com>,
	Tomasz Figa <tomasz.figa@gmail.com>,
	Chanwoo Choi <cw00.choi@samsung.com>,
	Alim Akhtar <alim.akhtar@samsung.com>,
	Michael Turquette <mturquette@baylibre.com>,
	Stephen Boyd <sboyd@kernel.org>, Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
Cc: Sam Protsenko <semen.protsenko@linaro.org>,
	linux-clk@vger.kernel.org, devicetree@vger.kernel.org,
	linux-samsung-soc@vger.kernel.org
Subject: Re: [PATCH v2 02/12] dt-bindings: clock: add Exynos Auto v9 SoC CMU bindings
Date: Tue, 3 May 2022 13:16:14 +0200	[thread overview]
Message-ID: <9f71aebf-d30d-9ecd-0e24-3f504bbaa705@linaro.org> (raw)
In-Reply-To: <20220503105914.117625-3-chanho61.park@samsung.com>

On 03/05/2022 12:59, Chanho Park wrote:
> Add dt-schema for Exynos Auto v9 SoC clock controller.
> 
> Signed-off-by: Chanho Park <chanho61.park@samsung.com>
> ---
>  .../clock/samsung,exynosautov9-clock.yaml     | 219 ++++++++++++++++++
>  1 file changed, 219 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/clock/samsung,exynosautov9-clock.yaml
> 
> diff --git a/Documentation/devicetree/bindings/clock/samsung,exynosautov9-clock.yaml b/Documentation/devicetree/bindings/clock/samsung,exynosautov9-clock.yaml
> new file mode 100644
> index 000000000000..9f9cd8606728
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/clock/samsung,exynosautov9-clock.yaml
> @@ -0,0 +1,219 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/clock/samsung,exynosautov9-clock.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Samsung Exynos Auto v9 SoC clock controller
> +
> +maintainers:
> +  - Chanho Park <chanho61.park@samsung.com>
> +  - Chanwoo Choi <cw00.choi@samsung.com>
> +  - Krzysztof Kozlowski <krzk@kernel.org>
> +  - Sylwester Nawrocki <s.nawrocki@samsung.com>
> +  - Tomasz Figa <tomasz.figa@gmail.com>
> +
> +description: |
> +  Exynos Auto v9 clock controller is comprised of several CMU units, generating
> +  clocks for different domains. Those CMU units are modeled as separate device
> +  tree nodes, and might depend on each other. Root clocks in that clock tree are
> +  two external clocks:: OSCCLK/XTCXO (26 MHz) and RTCCLK/XrtcXTI (32768 Hz).
> +  Those external clocks must be defined as fixed-rate clocks in dts.
> +
> +  CMU_TOP is a top-level CMU, where all base clocks are prepared using PLLs and
> +  dividers; all other clocks of function blocks (other CMUs) are usually
> +  derived from CMU_TOP.
> +
> +  Each clock is assigned an identifier and client nodes can use this identifier
> +  to specify the clock which they consume. All clocks available for usage
> +  in clock consumer nodes are defined as preprocessor macros in
> +  'dt-bindings/clock/exynosautov9.h' header.

The path is still wrong (and not full).


Best regards,
Krzysztof

  reply	other threads:[~2022-05-03 11:16 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <CGME20220503105729epcas2p4aef9a721ca48657edd4b61deb163bb04@epcas2p4.samsung.com>
2022-05-03 10:59 ` [PATCH v2 00/12] initial clock support for exynosauto v9 SoC Chanho Park
     [not found]   ` <CGME20220503105729epcas2p4505a901450c706f50bd178ae5b0634b0@epcas2p4.samsung.com>
2022-05-03 10:59     ` [PATCH v2 01/12] dt-bindings: clock: add clock binding definitions for Exynos Auto v9 Chanho Park
     [not found]   ` <CGME20220503105729epcas2p357a7bfae9731010d7fda00ba78cf8b97@epcas2p3.samsung.com>
2022-05-03 10:59     ` [PATCH v2 02/12] dt-bindings: clock: add Exynos Auto v9 SoC CMU bindings Chanho Park
2022-05-03 11:16       ` Krzysztof Kozlowski [this message]
2022-05-03 11:26         ` Chanho Park
     [not found]   ` <CGME20220503105729epcas2p1572a4d73a23ab352b41404edd53eb1d2@epcas2p1.samsung.com>
2022-05-03 10:59     ` [PATCH v2 03/12] clk: samsung: add top clock support for Exynos Auto v9 SoC Chanho Park
     [not found]   ` <CGME20220503105729epcas2p10749080bcb9da2348edb8fd639d18640@epcas2p1.samsung.com>
2022-05-03 10:59     ` [PATCH v2 04/12] clk: samsung: exynosautov9: add cmu_core clock support Chanho Park
     [not found]   ` <CGME20220503105729epcas2p32540f21b33f85ff1a5f966ca03b8defa@epcas2p3.samsung.com>
2022-05-03 10:59     ` [PATCH v2 05/12] clk: samsung: exynosautov9: add cmu_peris " Chanho Park
     [not found]   ` <CGME20220503105729epcas2p2ae4f7212d1adc6c329edcc0a4c0c28f4@epcas2p2.samsung.com>
2022-05-03 10:59     ` [PATCH v2 06/12] clk: samsung: exynosautov9: add cmu_busmc " Chanho Park
     [not found]   ` <CGME20220503105729epcas2p3db3b8d5c915ad7e416548399cb3010e2@epcas2p3.samsung.com>
2022-05-03 10:59     ` [PATCH v2 07/12] clk: samsung: exynosautov9: add cmu_fsys2 " Chanho Park
     [not found]   ` <CGME20220503105729epcas2p27e90f15cd1ffda34d2c99f83c7d60f60@epcas2p2.samsung.com>
2022-05-03 10:59     ` [PATCH v2 08/12] clk: samsung: exynosautov9: add cmu_peric0 " Chanho Park
     [not found]   ` <CGME20220503105729epcas2p2a45738fe3facba70433e022213c5d4ec@epcas2p2.samsung.com>
2022-05-03 10:59     ` [PATCH v2 09/12] clk: samsung: exynosautov9: add cmu_peric1 " Chanho Park
     [not found]   ` <CGME20220503105729epcas2p37342dc05e91c9007aa61d950c2bfe447@epcas2p3.samsung.com>
2022-05-03 10:59     ` [PATCH v2 10/12] arm64: dts: exynosautov9: add initial cmu clock nodes Chanho Park
2022-05-03 11:22       ` Krzysztof Kozlowski
2022-05-03 11:27         ` Chanho Park
     [not found]   ` <CGME20220503105730epcas2p1513c35f3652dbcb2f4aa3839790d10ec@epcas2p1.samsung.com>
2022-05-03 10:59     ` [PATCH v2 11/12] arm64: dts: exynosautov9: switch usi clocks Chanho Park
     [not found]   ` <CGME20220503105730epcas2p1d033e65a2acb39fe23ea5c218d24896c@epcas2p1.samsung.com>
2022-05-03 10:59     ` [PATCH v2 12/12] arm64: dts: exynosautov9: switch ufs clock node Chanho Park

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