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[84.10.100.139]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-59b24a77114sm2488563a12.6.2024.07.14.12.03.07 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Sun, 14 Jul 2024 12:03:09 -0700 (PDT) Content-Type: text/plain; charset=utf-8 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 (Mac OS X Mail 14.0 \(3654.120.0.1.15\)) Subject: Re: [PATCH 00/14] Add initial support for the Rockchip RK3588 HDMI TX Controller From: Piotr Oniszczuk In-Reply-To: <20240601-b4-rk3588-bridge-upstream-v1-0-f6203753232b@collabora.com> Date: Sun, 14 Jul 2024 21:03:06 +0200 Cc: Andrzej Hajda , Neil Armstrong , Robert Foss , Laurent Pinchart , Jonas Karlman , Jernej Skrabec , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Daniel Vetter , Sandy Huang , Heiko Stuebner , Andy Yan , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Mark Yao , dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, "open list:ARM/Rockchip SoC..." , devicetree@vger.kernel.org, kernel@collabora.com, Alexandre ARNOUD , Luis de Arquer , Algea Cao Content-Transfer-Encoding: quoted-printable Message-Id: References: <20240601-b4-rk3588-bridge-upstream-v1-0-f6203753232b@collabora.com> To: Cristian Ciocaltea X-Mailer: Apple Mail (2.3654.120.0.1.15) Cristian, I'm hacking with adding cec support for rk3588 hdmi on 6.10-rc7 = mainline.=20 Cec kernel module is my backport from bsp.=20 Module loads. Cec line (observed on osciloscope) has pulses when i'm = issuing i.e. cec-ctl -d /dev/cec0 --phys-addr=3D1.0.0.0 =E2=80=94playback=20= My issue is that timings are 2,9 times longer that should be (start bit = is 10,7mS instead of 3.6; zero is 4.4 instead 1.5 while one is 1,7 = instead of 0.6). This suggests me issue is cec clock isn't?=20 Looking on bsp code = https://github.com/radxa/kernel/blob/linux-6.1-stan-rkr1/drivers/gpu/drm/b= ridge/synopsys/dw-hdmi-qp-cec.c#L186 there is nothing with clock.=20 So probably issue is in 3588 clk code, or=E2=80=A6=E2=80=A6 Maybe you have some hints how to move forward with this issue? > Wiadomo=C5=9B=C4=87 napisana przez Cristian Ciocaltea = w dniu 01.06.2024, o godz. 15:12: >=20 > The RK3588 SoC family integrates a Quad-Pixel (QP) variant of the > Synopsys DesignWare HDMI TX controller used in the previous SoCs. >=20 > It is HDMI 2.1 compliant and supports the following features, among > others: >=20 > * Fixed Rate Link (FRL) > * 4K@120Hz and 8K@60Hz video modes > * Variable Refresh Rate (VRR) including Quick Media Switching (QMS) > * Fast Vactive (FVA) > * SCDC I2C DDC access > * TMDS Scrambler enabling 2160p@60Hz with RGB/YCbCr4:4:4 > * YCbCr4:2:0 enabling 2160p@60Hz at lower HDMI link speeds > * Multi-stream audio > * Enhanced Audio Return Channel (EARC) >=20 > This is the last required component that needs to be supported in = order > to enable the HDMI output functionality on the RK3588 based SBCs, such > as the RADXA Rock 5B. The other components are the Video Output > Processor (VOP2) and the Samsung IP based HDMI/eDP TX Combo PHY, for > which basic support has been already made available via [1] and [2], > respectively. >=20 > The patches are grouped as follows: > * PATCH 1..7: DW HDMI TX driver refactor to minimize code duplication = in > the new QP driver (no functional changes intended) >=20 > * PATCH 8..11: Rockchip DW HDMI glue driver cleanup/improvements (no > functional changes intended) >=20 > * PATCH 12..13: The new DW HDMI QP TX driver reusing the previously > exported functions and structs from existing DW HDMI TX driver >=20 > * PATCH 14: Rockchip DW HDMI glue driver update to support RK3588 and > make use of DW HDMI QP TX >=20 > They provide just the basic HDMI support for now, i.e. RGB output up = to > 4K@60Hz, without audio, CEC or any of the HDMI 2.1 specific features. > Also note the vop2 driver is currently not able to properly handle all > display modes supported by the connected screens, e.g. it doesn't cope > with non-integer refresh rates. >=20 > A possible workaround consists of enabling the display controller to > make use of the clock provided by the HDMI PHY PLL. This is still work > in progress and will be submitted later, as well as the required DTS > updates. >=20 > To facilitate testing and experimentation, all HDMI output related > patches, including those part of this series, are available at [3]. > So far I could only verify this on the RADXA Rock 3A and 5B boards. >=20 > Thanks, > Cristian >=20 > [1]: 5a028e8f062f ("drm/rockchip: vop2: Add support for rk3588") > [2]: 553be2830c5f ("phy: rockchip: Add Samsung HDMI/eDP Combo PHY = driver") > [3]: = https://gitlab.collabora.com/hardware-enablement/rockchip-3588/linux/-/com= mits/rk3588-hdmi-bridge-v6.10-rc1 >=20 > Signed-off-by: Cristian Ciocaltea > --- > Cristian Ciocaltea (14): > drm/bridge: dw-hdmi: Simplify clock handling > drm/bridge: dw-hdmi: Add dw-hdmi-common.h header > drm/bridge: dw-hdmi: Commonize dw_hdmi_i2c_adapter() > drm/bridge: dw-hdmi: Factor out AVI infoframe setup > drm/bridge: dw-hdmi: Factor out vmode setup > drm/bridge: dw-hdmi: Factor out hdmi_data_info setup > drm/bridge: dw-hdmi: Commonize dw_hdmi_connector_create() > drm/rockchip: dw_hdmi: Use modern drm_device based logging > drm/rockchip: dw_hdmi: Simplify clock handling > drm/rockchip: dw_hdmi: Use devm_regulator_get_enable() > drm/rockchip: dw_hdmi: Drop superfluous assignments of mpll_cfg, = cur_ctr and phy_config > dt-bindings: display: rockchip,dw-hdmi: Add compatible for RK3588 > drm/bridge: synopsys: Add DW HDMI QP TX controller driver > drm/rockchip: dw_hdmi: Add basic RK3588 support >=20 > .../display/rockchip/rockchip,dw-hdmi.yaml | 127 +++- > drivers/gpu/drm/bridge/synopsys/Makefile | 2 +- > drivers/gpu/drm/bridge/synopsys/dw-hdmi-common.h | 179 +++++ > drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c | 787 = +++++++++++++++++++ > drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.h | 831 = +++++++++++++++++++++ > drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 353 +++------ > drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c | 351 +++++++-- > include/drm/bridge/dw_hdmi.h | 8 + > 8 files changed, 2290 insertions(+), 348 deletions(-) > --- > base-commit: 1613e604df0cd359cf2a7fbd9be7a0bcfacfabd0 > change-id: 20240601-b4-rk3588-bridge-upstream-a27baff1b8fc >=20 >=20 > _______________________________________________ > Linux-rockchip mailing list > Linux-rockchip@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-rockchip