From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: MIME-Version: 1.0 In-Reply-To: <20170105073846.GD4667@x250> References: <1483530494-14177-1-git-send-email-baoyou.xie@linaro.org> <1483530494-14177-5-git-send-email-baoyou.xie@linaro.org> <20170105073846.GD4667@x250> From: Baoyou Xie Date: Fri, 6 Jan 2017 16:23:41 +0800 Message-ID: Subject: Re: [PATCH v6 5/5] soc: zte: pm_domains: Add support for zx296718 Content-Type: multipart/alternative; boundary=001a114abf4a4c2487054568bc4f To: Shawn Guo Cc: Jun Nie , Rob Herring , mark.rutland@arm.com, krzk@kernel.org, Arnd Bergmann , Ulf Hansson , amit daniel , claudiu.manoil@nxp.com, yangbo.lu@nxp.com, pankaj.dubey@samsung.com, geert+renesas@glider.be, laurent.pinchart@ideasonboard.com, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, Linux Kernel Mailing List , "xie.baoyou" , chen.chaokai@zte.com.cn, wang.qiang01@zte.com.cn List-ID: --001a114abf4a4c2487054568bc4f Content-Type: text/plain; charset=UTF-8 On 5 January 2017 at 15:38, Shawn Guo wrote: > On Wed, Jan 04, 2017 at 07:48:14PM +0800, Baoyou Xie wrote: > > This patch introduces the power domain driver of zx296718 > > which belongs to zte's zx2967 family. > > > > Signed-off-by: Baoyou Xie > > Reviewed-by: Jun Nie > > --- > > drivers/soc/zte/Makefile | 1 + > > drivers/soc/zte/zx296718_pm_domains.c | 181 > ++++++++++++++++++++++++++++++++++ > > 2 files changed, 182 insertions(+) > > create mode 100644 drivers/soc/zte/zx296718_pm_domains.c > > > > diff --git a/drivers/soc/zte/Makefile b/drivers/soc/zte/Makefile > > index 8a37f2f..96b7cd4 100644 > > --- a/drivers/soc/zte/Makefile > > +++ b/drivers/soc/zte/Makefile > > @@ -2,3 +2,4 @@ > > # ZTE SOC drivers > > # > > obj-$(CONFIG_ZX2967_PM_DOMAINS) += zx2967_pm_domains.o > > +obj-$(CONFIG_ZX2967_PM_DOMAINS) += zx296718_pm_domains.o > > diff --git a/drivers/soc/zte/zx296718_pm_domains.c > b/drivers/soc/zte/zx296718_pm_domains.c > > new file mode 100644 > > index 0000000..52003ee > > --- /dev/null > > +++ b/drivers/soc/zte/zx296718_pm_domains.c > > @@ -0,0 +1,181 @@ > > +/* > > + * Copyright (C) 2017 ZTE Ltd. > > + * > > + * Author: Baoyou Xie > > + * License terms: GNU General Public License (GPL) version 2 > > + */ > > Please have a newline between licence declaration and headers to improve > the readability. Same for zx2967_pm_domains.c. > > > +#include > > +#include "zx2967_pm_domains.h" > > + > > +static u16 zx296718_offsets[REG_ARRAY_SIZE] = { > > + [REG_CLKEN] = 0x18, > > + [REG_ISOEN] = 0x1c, > > + [REG_RSTEN] = 0x20, > > + [REG_PWREN] = 0x24, > > + [REG_ACK_SYNC] = 0x28, > > +}; > > + > > +enum { > > + PCU_DM_VOU = 0, > > + PCU_DM_SAPPU, > > + PCU_DM_VDE, > > + PCU_DM_VCE, > > + PCU_DM_HDE, > > + PCU_DM_VIU, > > + PCU_DM_USB20, > > + PCU_DM_USB21, > > + PCU_DM_USB30, > > + PCU_DM_HSIC, > > + PCU_DM_GMAC, > > + PCU_DM_TS, > > +}; > > I think we can save this enum completely by defining those > DM_ZX296718_xxx constants in zte,pm_domains.h in the same order of this > enum (hardware bit position order), so that DM_ZX296718_xxx can directly > be used as .bit field of struct zx2967_pm_domain. > > we should not replace PCU_DM_XX with DM_ZX296718_xxx, their means are different, one is the array index, but another is the bit index. I suggest to keep them strongly. > #define DM_ZX296718_VOU 0 > #define DM_ZX296718_SAPPU 1 > #define DM_ZX296718_VDE 2 /* g1v6 */ > #define DM_ZX296718_VCE 3 /* h1v6 */ > #define DM_ZX296718_HDE 4 /* g2v2 */ > #define DM_ZX296718_VIU 5 > #define DM_ZX296718_USB20 6 > #define DM_ZX296718_USB21 7 > #define DM_ZX296718_USB30 8 > #define DM_ZX296718_HSIC 9 > #define DM_ZX296718_GMAC 10 > #define DM_ZX296718_TS 11 > > > + > > +static struct zx2967_pm_domain vou_domain = { > > + .dm = { > > + .name = "vou_domain", > > + }, > > + .bit = PCU_DM_VOU, > > + .polarity = PWREN, > > + .reg_offset = zx296718_offsets, > > +}; > > + > > +static struct zx2967_pm_domain sappu_domain = { > > + .dm = { > > + .name = "sappu_domain", > > + }, > > + .bit = PCU_DM_SAPPU, > > + .polarity = PWREN, > > + .reg_offset = zx296718_offsets, > > +}; > > + > > +static struct zx2967_pm_domain vde_domain = { > > + .dm = { > > + .name = "vde_domain", > > + }, > > + .bit = PCU_DM_VDE, > > + .polarity = PWREN, > > + .reg_offset = zx296718_offsets, > > +}; > > + > > +static struct zx2967_pm_domain vce_domain = { > > + .dm = { > > + .name = "vce_domain", > > + }, > > + .bit = PCU_DM_VCE, > > + .polarity = PWREN, > > + .reg_offset = zx296718_offsets, > > +}; > > + > > +static struct zx2967_pm_domain hde_domain = { > > + .dm = { > > + .name = "hde_domain", > > + }, > > + .bit = PCU_DM_HDE, > > + .polarity = PWREN, > > + .reg_offset = zx296718_offsets, > > +}; > > + > > +static struct zx2967_pm_domain viu_domain = { > > + .dm = { > > + .name = "viu_domain", > > + }, > > + .bit = PCU_DM_VIU, > > + .polarity = PWREN, > > + .reg_offset = zx296718_offsets, > > +}; > > + > > +static struct zx2967_pm_domain usb20_domain = { > > + .dm = { > > + .name = "usb20_domain", > > + }, > > + .bit = PCU_DM_USB20, > > + .polarity = PWREN, > > + .reg_offset = zx296718_offsets, > > +}; > > + > > +static struct zx2967_pm_domain usb21_domain = { > > + .dm = { > > + .name = "usb21_domain", > > + }, > > + .bit = PCU_DM_USB21, > > + .polarity = PWREN, > > + .reg_offset = zx296718_offsets, > > +}; > > + > > +static struct zx2967_pm_domain usb30_domain = { > > + .dm = { > > + .name = "usb30_domain", > > + }, > > + .bit = PCU_DM_USB30, > > + .polarity = PWREN, > > + .reg_offset = zx296718_offsets, > > +}; > > + > > +static struct zx2967_pm_domain hsic_domain = { > > + .dm = { > > + .name = "hsic_domain", > > + }, > > + .bit = PCU_DM_HSIC, > > + .polarity = PWREN, > > + .reg_offset = zx296718_offsets, > > +}; > > + > > +static struct zx2967_pm_domain gmac_domain = { > > + .dm = { > > + .name = "gmac_domain", > > + }, > > + .bit = PCU_DM_GMAC, > > + .polarity = PWREN, > > + .reg_offset = zx296718_offsets, > > +}; > > + > > +static struct zx2967_pm_domain ts_domain = { > > + .dm = { > > + .name = "ts_domain", > > + }, > > + .bit = PCU_DM_TS, > > + .polarity = PWREN, > > + .reg_offset = zx296718_offsets, > > +}; > > + > > +static struct generic_pm_domain *zx296718_pm_domains[] = { > > + [DM_ZX296718_SAPPU] = &sappu_domain.dm, > > + [DM_ZX296718_VDE] = &vde_domain.dm, > > + [DM_ZX296718_VCE] = &vce_domain.dm, > > + [DM_ZX296718_HDE] = &hde_domain.dm, > > + [DM_ZX296718_VIU] = &viu_domain.dm, > > + [DM_ZX296718_USB20] = &usb20_domain.dm, > > + [DM_ZX296718_USB21] = &usb21_domain.dm, > > + [DM_ZX296718_USB30] = &usb30_domain.dm, > > + [DM_ZX296718_HSIC] = &hsic_domain.dm, > > + [DM_ZX296718_GMAC] = &gmac_domain.dm, > > + [DM_ZX296718_TS] = &ts_domain.dm, > > + [DM_ZX296718_VOU] = &vou_domain.dm, > > If you update the order of DM_ZX296718_xxx in zte,pm_domains.h, it would > be nice to update this list accordingly as well. > > > +}; > > + > > +static int zx296718_pd_probe(struct platform_device *pdev) > > +{ > > + return zx2967_pd_probe(pdev, > > + zx296718_pm_domains, > > + ARRAY_SIZE(zx296718_pm_domains)); > > +} > > + > > +static const struct of_device_id zx296718_pm_domain_matches[] = { > > + { .compatible = "zte,zx296718-pcu", }, > > + { }, > > +}; > > + > > +static struct platform_driver zx296718_pd_driver = { > > + .driver = { > > + .name = "zx-powerdomain", > > This is a zx296718 specific driver. So zx296718-powerdomain should > be a better name? > > Shawn > > > + .owner = THIS_MODULE, > > + .of_match_table = zx296718_pm_domain_matches, > > + }, > > + .probe = zx296718_pd_probe, > > +}; > > + > > +static int __init zx296718_pd_init(void) > > +{ > > + return platform_driver_register(&zx296718_pd_driver); > > +} > > +subsys_initcall(zx296718_pd_init); > > -- > > 2.7.4 > > > --001a114abf4a4c2487054568bc4f Content-Type: text/html; charset=UTF-8 Content-Transfer-Encoding: quoted-printable


On 5 January 2017 at 15:38, Shawn Guo <shawnguo@kernel.org> wrote:
On Wed, Jan 04, 2017 at 07:48:14= PM +0800, Baoyou Xie wrote:
> This patch introduces the power domain driver of zx296718
> which belongs to zte's zx2967 family.
>
> Signed-off-by: Baoyou Xie <baoyou.xie@linaro.org>
> Reviewed-by: Jun Nie <jun.nie= @linaro.org>
> ---
>=C2=A0 drivers/soc/zte/Makefile=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 |=C2=A0 =C2=A01 +
>=C2=A0 drivers/soc/zte/zx296718_pm_domains.c | 181 +++++++++++++++= +++++++++++++++++++
>=C2=A0 2 files changed, 182 insertions(+)
>=C2=A0 create mode 100644 drivers/soc/zte/zx296718_pm_domains.c >
> diff --git a/drivers/soc/zte/Makefile b/drivers/soc/zte/Makefile
> index 8a37f2f..96b7cd4 100644
> --- a/drivers/soc/zte/Makefile
> +++ b/drivers/soc/zte/Makefile
> @@ -2,3 +2,4 @@
>=C2=A0 # ZTE SOC drivers
>=C2=A0 #
>=C2=A0 obj-$(CONFIG_ZX2967_PM_DOMAINS) +=3D zx2967_pm_domains.o > +obj-$(CONFIG_ZX2967_PM_DOMAINS) +=3D zx296718_pm_domains.o
> diff --git a/drivers/soc/zte/zx296718_pm_domains.c b/drivers/soc/= zte/zx296718_pm_domains.c
> new file mode 100644
> index 0000000..52003ee
> --- /dev/null
> +++ b/drivers/soc/zte/zx296718_pm_domains.c
> @@ -0,0 +1,181 @@
> +/*
> + * Copyright (C) 2017 ZTE Ltd.
> + *
> + * Author: Baoyou Xie <ba= oyou.xie@linaro.org>
> + * License terms: GNU General Public License (GPL) version 2
> + */

Please have a newline between licence declaration and headers t= o improve
the readability.=C2=A0 Same for zx2967_pm_domains.c.

> +#include <dt-bindings/soc/zte,pm_domains.h>
> +#include "zx2967_pm_domains.h"
> +
> +static u16 zx296718_offsets[REG_ARRAY_SIZE] =3D {
> +=C2=A0 =C2=A0 =C2=A0[REG_CLKEN] =3D 0x18,
> +=C2=A0 =C2=A0 =C2=A0[REG_ISOEN] =3D 0x1c,
> +=C2=A0 =C2=A0 =C2=A0[REG_RSTEN] =3D 0x20,
> +=C2=A0 =C2=A0 =C2=A0[REG_PWREN] =3D 0x24,
> +=C2=A0 =C2=A0 =C2=A0[REG_ACK_SYNC] =3D 0x28,
> +};
> +
> +enum {
> +=C2=A0 =C2=A0 =C2=A0PCU_DM_VOU =3D 0,
> +=C2=A0 =C2=A0 =C2=A0PCU_DM_SAPPU,
> +=C2=A0 =C2=A0 =C2=A0PCU_DM_VDE,
> +=C2=A0 =C2=A0 =C2=A0PCU_DM_VCE,
> +=C2=A0 =C2=A0 =C2=A0PCU_DM_HDE,
> +=C2=A0 =C2=A0 =C2=A0PCU_DM_VIU,
> +=C2=A0 =C2=A0 =C2=A0PCU_DM_USB20,
> +=C2=A0 =C2=A0 =C2=A0PCU_DM_USB21,
> +=C2=A0 =C2=A0 =C2=A0PCU_DM_USB30,
> +=C2=A0 =C2=A0 =C2=A0PCU_DM_HSIC,
> +=C2=A0 =C2=A0 =C2=A0PCU_DM_GMAC,
> +=C2=A0 =C2=A0 =C2=A0PCU_DM_TS,
> +};

I think we can save this enum completely by defining those
DM_ZX296718_xxx constants in zte,pm_domains.h in the same order of this
enum (hardware bit position order), so that DM_ZX296718_xxx can directly be used as .bit field of struct zx2967_pm_domain.

we should not replace PCU_DM_XX with DM_ZX296718_xxx,= their means are different,
one is the array index, but anoth= er is the bit index.

I suggest to keep them strongly.
= =C2=A0
#define DM_ZX296718_VOU=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A00
#define DM_ZX296718_SAPPU=C2=A0 =C2=A0 =C2=A0 =C2=A01
#define DM_ZX296718_VDE=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A02=C2=A0 /* g1v6 */=
#define DM_ZX296718_VCE=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A03=C2=A0 /* h1v6 */=
#define DM_ZX296718_HDE=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A04=C2=A0 /* g2v2 */=
#define DM_ZX296718_VIU=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A05
#define DM_ZX296718_USB20=C2=A0 =C2=A0 =C2=A0 =C2=A06
#define DM_ZX296718_USB21=C2=A0 =C2=A0 =C2=A0 =C2=A07
#define DM_ZX296718_USB30=C2=A0 =C2=A0 =C2=A0 =C2=A08
#define DM_ZX296718_HSIC=C2=A0 =C2=A0 =C2=A0 =C2=A0 9
#define DM_ZX296718_GMAC=C2=A0 =C2=A0 =C2=A0 =C2=A0 10
#define DM_ZX296718_TS=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 11

> +
> +static struct zx2967_pm_domain vou_domain =3D {
> +=C2=A0 =C2=A0 =C2=A0.dm =3D {
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0.name=C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0 =C2=A0=3D "vou_domain",
> +=C2=A0 =C2=A0 =C2=A0},
> +=C2=A0 =C2=A0 =C2=A0.bit =3D PCU_DM_VOU,
> +=C2=A0 =C2=A0 =C2=A0.polarity =3D PWREN,
> +=C2=A0 =C2=A0 =C2=A0.reg_offset =3D zx296718_offsets,
> +};
> +
> +static struct zx2967_pm_domain sappu_domain =3D {
> +=C2=A0 =C2=A0 =C2=A0.dm =3D {
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0.name=C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0 =C2=A0=3D "sappu_domain",
> +=C2=A0 =C2=A0 =C2=A0},
> +=C2=A0 =C2=A0 =C2=A0.bit =3D PCU_DM_SAPPU,
> +=C2=A0 =C2=A0 =C2=A0.polarity =3D PWREN,
> +=C2=A0 =C2=A0 =C2=A0.reg_offset =3D zx296718_offsets,
> +};
> +
> +static struct zx2967_pm_domain vde_domain =3D {
> +=C2=A0 =C2=A0 =C2=A0.dm =3D {
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0.name=C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0 =C2=A0=3D "vde_domain",
> +=C2=A0 =C2=A0 =C2=A0},
> +=C2=A0 =C2=A0 =C2=A0.bit =3D PCU_DM_VDE,
> +=C2=A0 =C2=A0 =C2=A0.polarity =3D PWREN,
> +=C2=A0 =C2=A0 =C2=A0.reg_offset =3D zx296718_offsets,
> +};
> +
> +static struct zx2967_pm_domain vce_domain =3D {
> +=C2=A0 =C2=A0 =C2=A0.dm =3D {
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0.name=C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0 =C2=A0=3D "vce_domain",
> +=C2=A0 =C2=A0 =C2=A0},
> +=C2=A0 =C2=A0 =C2=A0.bit =3D PCU_DM_VCE,
> +=C2=A0 =C2=A0 =C2=A0.polarity =3D PWREN,
> +=C2=A0 =C2=A0 =C2=A0.reg_offset =3D zx296718_offsets,
> +};
> +
> +static struct zx2967_pm_domain hde_domain =3D {
> +=C2=A0 =C2=A0 =C2=A0.dm =3D {
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0.name=C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0 =C2=A0=3D "hde_domain",
> +=C2=A0 =C2=A0 =C2=A0},
> +=C2=A0 =C2=A0 =C2=A0.bit =3D PCU_DM_HDE,
> +=C2=A0 =C2=A0 =C2=A0.polarity =3D PWREN,
> +=C2=A0 =C2=A0 =C2=A0.reg_offset =3D zx296718_offsets,
> +};
> +
> +static struct zx2967_pm_domain viu_domain =3D {
> +=C2=A0 =C2=A0 =C2=A0.dm =3D {
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0.name=C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0 =C2=A0=3D "viu_domain",
> +=C2=A0 =C2=A0 =C2=A0},
> +=C2=A0 =C2=A0 =C2=A0.bit =3D PCU_DM_VIU,
> +=C2=A0 =C2=A0 =C2=A0.polarity =3D PWREN,
> +=C2=A0 =C2=A0 =C2=A0.reg_offset =3D zx296718_offsets,
> +};
> +
> +static struct zx2967_pm_domain usb20_domain =3D {
> +=C2=A0 =C2=A0 =C2=A0.dm =3D {
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0.name=C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0 =C2=A0=3D "usb20_domain",
> +=C2=A0 =C2=A0 =C2=A0},
> +=C2=A0 =C2=A0 =C2=A0.bit =3D PCU_DM_USB20,
> +=C2=A0 =C2=A0 =C2=A0.polarity =3D PWREN,
> +=C2=A0 =C2=A0 =C2=A0.reg_offset =3D zx296718_offsets,
> +};
> +
> +static struct zx2967_pm_domain usb21_domain =3D {
> +=C2=A0 =C2=A0 =C2=A0.dm =3D {
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0.name=C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0 =C2=A0=3D "usb21_domain",
> +=C2=A0 =C2=A0 =C2=A0},
> +=C2=A0 =C2=A0 =C2=A0.bit =3D PCU_DM_USB21,
> +=C2=A0 =C2=A0 =C2=A0.polarity =3D PWREN,
> +=C2=A0 =C2=A0 =C2=A0.reg_offset =3D zx296718_offsets,
> +};
> +
> +static struct zx2967_pm_domain usb30_domain =3D {
> +=C2=A0 =C2=A0 =C2=A0.dm =3D {
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0.name=C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0 =C2=A0=3D "usb30_domain",
> +=C2=A0 =C2=A0 =C2=A0},
> +=C2=A0 =C2=A0 =C2=A0.bit =3D PCU_DM_USB30,
> +=C2=A0 =C2=A0 =C2=A0.polarity =3D PWREN,
> +=C2=A0 =C2=A0 =C2=A0.reg_offset =3D zx296718_offsets,
> +};
> +
> +static struct zx2967_pm_domain hsic_domain =3D {
> +=C2=A0 =C2=A0 =C2=A0.dm =3D {
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0.name=C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0 =C2=A0=3D "hsic_domain",
> +=C2=A0 =C2=A0 =C2=A0},
> +=C2=A0 =C2=A0 =C2=A0.bit =3D PCU_DM_HSIC,
> +=C2=A0 =C2=A0 =C2=A0.polarity =3D PWREN,
> +=C2=A0 =C2=A0 =C2=A0.reg_offset =3D zx296718_offsets,
> +};
> +
> +static struct zx2967_pm_domain gmac_domain =3D {
> +=C2=A0 =C2=A0 =C2=A0.dm =3D {
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0.name=C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0 =C2=A0=3D "gmac_domain",
> +=C2=A0 =C2=A0 =C2=A0},
> +=C2=A0 =C2=A0 =C2=A0.bit =3D PCU_DM_GMAC,
> +=C2=A0 =C2=A0 =C2=A0.polarity =3D PWREN,
> +=C2=A0 =C2=A0 =C2=A0.reg_offset =3D zx296718_offsets,
> +};
> +
> +static struct zx2967_pm_domain ts_domain =3D {
> +=C2=A0 =C2=A0 =C2=A0.dm =3D {
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0.name=C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0 =C2=A0=3D "ts_domain",
> +=C2=A0 =C2=A0 =C2=A0},
> +=C2=A0 =C2=A0 =C2=A0.bit =3D PCU_DM_TS,
> +=C2=A0 =C2=A0 =C2=A0.polarity =3D PWREN,
> +=C2=A0 =C2=A0 =C2=A0.reg_offset =3D zx296718_offsets,
> +};
> +
> +static struct generic_pm_domain *zx296718_pm_domains[] =3D {
> +=C2=A0 =C2=A0 =C2=A0[DM_ZX296718_SAPPU] =3D &sappu_domain.dm, > +=C2=A0 =C2=A0 =C2=A0[DM_ZX296718_VDE] =3D &vde_domain.dm,
> +=C2=A0 =C2=A0 =C2=A0[DM_ZX296718_VCE] =3D &vce_domain.dm,
> +=C2=A0 =C2=A0 =C2=A0[DM_ZX296718_HDE] =3D &hde_domain.dm,
> +=C2=A0 =C2=A0 =C2=A0[DM_ZX296718_VIU] =3D &viu_domain.dm,
> +=C2=A0 =C2=A0 =C2=A0[DM_ZX296718_USB20] =3D &usb20_domain.dm, > +=C2=A0 =C2=A0 =C2=A0[DM_ZX296718_USB21] =3D &usb21_domain.dm, > +=C2=A0 =C2=A0 =C2=A0[DM_ZX296718_USB30] =3D &usb30_domain.dm, > +=C2=A0 =C2=A0 =C2=A0[DM_ZX296718_HSIC] =3D &hsic_domain.dm,
> +=C2=A0 =C2=A0 =C2=A0[DM_ZX296718_GMAC] =3D &gmac_domain.dm,
> +=C2=A0 =C2=A0 =C2=A0[DM_ZX296718_TS] =3D &ts_domain.dm,
> +=C2=A0 =C2=A0 =C2=A0[DM_ZX296718_VOU] =3D &vou_domain.dm,

If you update the order of DM_ZX296718_xxx in zte,pm_domains.h,= it would
be nice to update this list accordingly as well.

> +};
> +
> +static int zx296718_pd_probe(struct platform_device *pdev)
> +{
> +=C2=A0 =C2=A0 =C2=A0return zx2967_pd_probe(pdev,
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0= =C2=A0 =C2=A0zx296718_pm_domains,
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0= =C2=A0 =C2=A0ARRAY_SIZE(zx296718_pm_domains));
> +}
> +
> +static const struct of_device_id zx296718_pm_domain_matches[] =3D { > +=C2=A0 =C2=A0 =C2=A0{ .compatible =3D "zte,zx296718-pcu", }= ,
> +=C2=A0 =C2=A0 =C2=A0{ },
> +};
> +
> +static struct platform_driver zx296718_pd_driver =3D {
> +=C2=A0 =C2=A0 =C2=A0.driver =3D {
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0.name =3D "zx-po= werdomain",

This is a zx296718 specific driver.=C2=A0 So zx296718-powerdomain sh= ould
be a better name?

Shawn

> +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0.owner =3D THIS_MODUL= E,
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0.of_match_table =3D z= x296718_pm_domain_matches,
> +=C2=A0 =C2=A0 =C2=A0},
> +=C2=A0 =C2=A0 =C2=A0.probe =3D zx296718_pd_probe,
> +};
> +
> +static int __init zx296718_pd_init(void)
> +{
> +=C2=A0 =C2=A0 =C2=A0return platform_driver_register(&zx29671= 8_pd_driver);
> +}
> +subsys_initcall(zx296718_pd_init);
> --
> 2.7.4
>

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