From: "Lad, Prabhakar" <prabhakar.csengg@gmail.com>
To: Linus Walleij <linus.walleij@linaro.org>
Cc: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>,
Marc Zyngier <maz@kernel.org>,
Geert Uytterhoeven <geert+renesas@glider.be>,
Thomas Gleixner <tglx@linutronix.de>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Bartosz Golaszewski <brgl@bgdev.pl>,
Thierry Reding <thierry.reding@gmail.com>,
Jonathan Hunter <jonathanh@nvidia.com>,
Bjorn Andersson <bjorn.andersson@linaro.org>,
Andy Gross <agross@kernel.org>,
Philipp Zabel <p.zabel@pengutronix.de>,
Andy Shevchenko <andy.shevchenko@gmail.com>,
"open list:GPIO SUBSYSTEM" <linux-gpio@vger.kernel.org>,
linux-tegra <linux-tegra@vger.kernel.org>,
linux-arm-msm <linux-arm-msm@vger.kernel.org>,
"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
<devicetree@vger.kernel.org>, LKML <linux-kernel@vger.kernel.org>,
Linux-Renesas <linux-renesas-soc@vger.kernel.org>,
Phil Edworthy <phil.edworthy@renesas.com>,
Biju Das <biju.das.jz@bp.renesas.com>
Subject: Re: [PATCH v4 3/7] gpio: gpiolib: Add ngirq member to struct gpio_irq_chip
Date: Mon, 23 May 2022 18:27:01 +0100 [thread overview]
Message-ID: <CA+V-a8uR6EHr9ZqbBkLLKwLTPO4asthYaWTYE8c4NGFUt9Gmcg@mail.gmail.com> (raw)
In-Reply-To: <CACRpkda1pfL8tk0S_0bHvj4kWYrLTTeOz3b_A9qK5DJwHWeTXw@mail.gmail.com>
Hi Linus,
Thank you for the review.
On Thu, May 19, 2022 at 2:26 PM Linus Walleij <linus.walleij@linaro.org> wrote:
>
> On Wed, May 18, 2022 at 9:30 PM Lad Prabhakar
> <prabhakar.mahadev-lad.rj@bp.renesas.com> wrote:
>
> > Supported GPIO IRQs by the chip is not always equal to the number of GPIO
> > pins. For example on Renesas RZ/G2L SoC where it has GPIO0-122 pins but at
> > a given point a maximum of only 32 GPIO pins can be used as IRQ lines in
> > the IRQC domain.
> >
> > This patch adds ngirq member to struct gpio_irq_chip and passes this as a
> > size to irq_domain_create_hierarchy()/irq_domain_create_simple() if it is
> > being set in the driver otherwise fallbacks to using ngpio.
> >
> > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
>
> NAK
>
> As pointed out this is a property of the hardware and thus you should
> derive this property of the hardware from the compatible string.
>
> For example by passing per-variant .data in struct of_device_id.
>
> Unique hardware properties means unique hardware means it should
> have a unique compatible string. Otherwise something is wrong
> with the compatibles.
>
Agreed, I will drop this.
Cheers,
Prabhakar
next prev parent reply other threads:[~2022-05-23 17:33 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-05-18 19:29 [PATCH v4 0/7] Renesas RZ/G2L IRQC support Lad Prabhakar
2022-05-18 19:29 ` [PATCH v4 1/7] dt-bindings: interrupt-controller: Add Renesas RZ/G2L Interrupt Controller Lad Prabhakar
2022-05-18 19:29 ` [PATCH v4 2/7] irqchip: Add RZ/G2L IA55 Interrupt Controller driver Lad Prabhakar
2022-05-18 19:29 ` [PATCH v4 3/7] gpio: gpiolib: Add ngirq member to struct gpio_irq_chip Lad Prabhakar
2022-05-19 13:26 ` Linus Walleij
2022-05-23 17:27 ` Lad, Prabhakar [this message]
2022-05-18 19:29 ` [PATCH v4 4/7] gpio: gpiolib: Dont assume child_offset_to_irq callback always succeeds Lad Prabhakar
2022-05-19 13:30 ` Linus Walleij
2022-05-18 19:29 ` [PATCH v4 5/7] gpio: gpiolib: Add a check to validate GPIO hwirq Lad Prabhakar
2022-05-18 21:08 ` Andy Shevchenko
2022-05-19 4:11 ` Lad, Prabhakar
2022-05-18 19:29 ` [PATCH v4 6/7] dt-bindings: pinctrl: renesas,rzg2l-pinctrl: Document the properties to handle GPIO IRQ Lad Prabhakar
2022-05-19 12:01 ` Geert Uytterhoeven
2022-05-23 17:29 ` Lad, Prabhakar
2022-05-18 19:29 ` [PATCH v4 7/7] pinctrl: renesas: pinctrl-rzg2l: Add IRQ domain to handle GPIO interrupt Lad Prabhakar
2022-05-18 21:09 ` [PATCH v4 0/7] Renesas RZ/G2L IRQC support Andy Shevchenko
2022-05-19 4:07 ` Lad, Prabhakar
2022-05-19 6:58 ` Biju Das
2022-05-23 17:28 ` Lad, Prabhakar
2022-05-19 10:07 ` Andy Shevchenko
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