From: "Lad, Prabhakar" <prabhakar.csengg@gmail.com>
To: Geert Uytterhoeven <geert@linux-m68k.org>
Cc: Linus Walleij <linus.walleij@linaro.org>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Magnus Damm <magnus.damm@gmail.com>,
linux-renesas-soc@vger.kernel.org, linux-gpio@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
Biju Das <biju.das.jz@bp.renesas.com>,
Fabrizio Castro <fabrizio.castro.jz@renesas.com>,
Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Subject: Re: [PATCH v2 03/13] pinctrl: renesas: pinctrl-rzg2l: Allow more bits for pin configuration
Date: Tue, 28 May 2024 19:47:04 +0100 [thread overview]
Message-ID: <CA+V-a8vbV0LZ0XkHEOYLww4mpgiaSzfGDCi+Hi45XNSSgSRnfA@mail.gmail.com> (raw)
In-Reply-To: <CAMuHMdXUM-s5RQXgKQUtqu5=fVTFk5Ajg2WNZ2eAiy5Lr-tX5A@mail.gmail.com>
Hi Geert,
Thank you for the review.
On Wed, May 22, 2024 at 11:19 AM Geert Uytterhoeven
<geert@linux-m68k.org> wrote:
>
> Hi Prabhakar,
>
> On Tue, Apr 23, 2024 at 7:59 PM Prabhakar <prabhakar.csengg@gmail.com> wrote:
> > From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> >
> > The pin configuration bits have been growing for every new SoCs being
> > added for the pinctrl-rzg2l driver which would mean updating the macros
> > every time for each new configuration. To avoid this allocate additional
> > bits for pin configuration by relocating the known fixed bits to the very
> > end of the configuration.
> >
> > Also update the size of 'cfg' to 'u64' to allow more configuration bits in
> > the 'struct rzg2l_variable_pin_cfg'.
> >
> > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> > ---
> > RFC->v2
> > - Merged the macros and rzg2l_variable_pin_cfg changes into single patch
> > - Updated types for the config changes
>
> Thanks for the update!
>
> > --- a/drivers/pinctrl/renesas/pinctrl-rzg2l.c
> > +++ b/drivers/pinctrl/renesas/pinctrl-rzg2l.c
> > @@ -78,9 +78,9 @@
> > PIN_CFG_FILNUM | \
> > PIN_CFG_FILCLKSEL)
> >
> > -#define PIN_CFG_PIN_MAP_MASK GENMASK_ULL(35, 28)
> > -#define PIN_CFG_PIN_REG_MASK GENMASK(27, 20)
> > -#define PIN_CFG_MASK GENMASK(19, 0)
> > +#define PIN_CFG_PIN_MAP_MASK GENMASK_ULL(62, 55)
> > +#define PIN_CFG_PIN_REG_MASK GENMASK_ULL(54, 47)
> > +#define PIN_CFG_MASK GENMASK_ULL(46, 0)
> >
> > /*
> > * m indicates the bitmap of supported pins, a is the register index
>
> > @@ -241,9 +241,9 @@ struct rzg2l_dedicated_configs {
> > * @pin: port pin
> > */
> > struct rzg2l_variable_pin_cfg {
> > - u32 cfg:20;
> > - u32 port:5;
> > - u32 pin:3;
> > + u64 cfg:46;
>
> 47, to match PIN_CFG_MASK()?
>
Oops, I missed that.
> > + u64 port:5;
> > + u64 pin:3;
> > };
>
> To avoid such mistakes, and to increase uniformity, I think it would
> be good to get rid of this structure, and replace it by masks, to be
> used with FIELD_GET() and FIELD_PREP_CONST().
>
Agreed, I will make a patch on top of this patch (so that its easier
for review).
Cheers,
Prabhakar
next prev parent reply other threads:[~2024-05-28 18:48 UTC|newest]
Thread overview: 45+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-04-23 17:58 [PATCH v2 00/13] Add PFC support for Renesas RZ/V2H(P) SoC Prabhakar
2024-04-23 17:58 ` [PATCH v2 01/13] dt-bindings: pinctrl: renesas,rzg2l-pinctrl: Remove the check from the object Prabhakar
2024-05-22 9:57 ` Geert Uytterhoeven
2024-04-23 17:58 ` [PATCH v2 02/13] dt-bindings: pinctrl: renesas: Document RZ/V2H(P) SoC Prabhakar
2024-04-24 9:05 ` Geert Uytterhoeven
2024-04-25 9:49 ` Lad, Prabhakar
2024-04-23 17:58 ` [PATCH v2 03/13] pinctrl: renesas: pinctrl-rzg2l: Allow more bits for pin configuration Prabhakar
2024-05-22 10:19 ` Geert Uytterhoeven
2024-05-28 18:47 ` Lad, Prabhakar [this message]
2024-04-23 17:58 ` [PATCH v2 04/13] pinctrl: renesas: pinctrl-rzg2l: Allow parsing of variable configuration for all architectures Prabhakar
2024-05-22 10:21 ` Geert Uytterhoeven
2024-04-23 17:58 ` [PATCH v2 05/13] pinctrl: renesas: pinctrl-rzg2l: Validate power registers for SD and ETH Prabhakar
2024-05-22 11:53 ` Geert Uytterhoeven
2024-04-23 17:58 ` [PATCH v2 06/13] pinctrl: renesas: pinctrl-rzg2l: Add function pointers for locking/unlocking the PFC register Prabhakar
2024-04-23 18:12 ` Biju Das
2024-04-25 11:40 ` Lad, Prabhakar
2024-05-22 12:23 ` Geert Uytterhoeven
2024-05-22 12:40 ` Biju Das
2024-05-28 19:15 ` Lad, Prabhakar
2024-05-22 12:05 ` Geert Uytterhoeven
2024-04-23 17:58 ` [PATCH v2 07/13] pinctrl: renesas: pinctrl-rzg2l: Add function pointer for writing to PMC register Prabhakar
2024-05-22 12:39 ` Geert Uytterhoeven
2024-05-28 19:33 ` Lad, Prabhakar
2024-04-23 17:58 ` [PATCH v2 08/13] pinctrl: renesas: pinctrl-rzg2l: Add function pointers for reading/writing OEN register Prabhakar
2024-05-22 12:44 ` Geert Uytterhoeven
2024-05-28 19:42 ` Lad, Prabhakar
2024-04-23 17:58 ` [PATCH v2 09/13] pinctrl: renesas: pinctrl-rzg2l: Add support to configure the slew-rate Prabhakar
2024-05-22 12:51 ` Geert Uytterhoeven
2024-04-23 17:58 ` [PATCH v2 10/13] pinctrl: renesas: pinctrl-rzg2l: Add support to set pulling up/down the pins Prabhakar
2024-05-22 13:14 ` Geert Uytterhoeven
2024-05-28 20:01 ` Lad, Prabhakar
2024-05-22 13:26 ` Geert Uytterhoeven
2024-05-28 20:01 ` Lad, Prabhakar
2024-05-30 7:48 ` claudiu beznea
2024-05-30 10:15 ` Lad, Prabhakar
2024-05-30 10:37 ` Lad, Prabhakar
2024-04-23 17:58 ` [PATCH v2 11/13] pinctrl: renesas: pinctrl-rzg2l: Pass pincontrol device pointer to pinconf_generic_parse_dt_config() Prabhakar
2024-05-22 13:17 ` Geert Uytterhoeven
2024-04-23 17:58 ` [PATCH v2 12/13] pinctrl: renesas: pinctrl-rzg2l: Add support for custom parameters Prabhakar
2024-05-22 13:21 ` Geert Uytterhoeven
2024-05-28 20:07 ` Lad, Prabhakar
2024-04-23 17:59 ` [PATCH v2 13/13] pinctrl: renesas: pinctrl-rzg2l: Add support for RZ/V2H SoC Prabhakar
2024-05-22 15:29 ` Geert Uytterhoeven
2024-05-29 20:32 ` Lad, Prabhakar
2024-05-16 8:02 ` [PATCH v2 00/13] Add PFC support for Renesas RZ/V2H(P) SoC Lad, Prabhakar
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