[PATCH v2 0/5] Add USB Support on Qualcomm's SDX75 Platform

[PATCH v2 0/5] Add USB Support on Qualcomm's SDX75 Platform

[Rohit Agarwal]

Hi,

Changes in v2:
 - Dropped the new dt schema introduced in v1 for sdx75 usb3 phy
   and reusing the bindings.
 - Rephrased the commit message of patch 3/5
 - Removed stray lines from the patch 5/5

This series adds support of USB3 PHY support for Qualcomm's SDX75 Platform.

Thanks,
Rohit.

Rohit Agarwal (5):
  dt-bindings: phy: qcom,snps-eusb2-phy: Add compatible for SDX75
  dt-bindings: phy: qcom,qmp-usb: Add SDX75 USB3 PHY
  dt-bindings: usb: qcom,dwc3: Fix SDX65 clocks
  dt-bindings: usb: dwc3: Add SDX75 compatible
  phy: qcom-qmp-usb: Add Qualcomm SDX75 USB3 PHY support

 .../phy/qcom,sc8280xp-qmp-usb3-uni-phy.yaml        |  40 +++++-
 .../bindings/phy/qcom,snps-eusb2-phy.yaml          |   7 +-
 .../devicetree/bindings/usb/qcom,dwc3.yaml         |   4 +
 drivers/phy/qualcomm/phy-qcom-qmp-usb.c            | 158 +++++++++++++++++++++
 4 files changed, 205 insertions(+), 4 deletions(-)

-- 
2.7.4

[PATCH v2 1/5] dt-bindings: phy: qcom,snps-eusb2-phy: Add compatible for SDX75

[Rohit Agarwal]

Add a dt-bindings compatible string for the SDX75 SoC that
uses Synopsis eUSB2 PHY.

Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
 Documentation/devicetree/bindings/phy/qcom,snps-eusb2-phy.yaml | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/phy/qcom,snps-eusb2-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,snps-eusb2-phy.yaml
index c53bab1..c958286 100644
--- a/Documentation/devicetree/bindings/phy/qcom,snps-eusb2-phy.yaml
+++ b/Documentation/devicetree/bindings/phy/qcom,snps-eusb2-phy.yaml
@@ -14,7 +14,12 @@ description:
 
 properties:
   compatible:
-    const: qcom,sm8550-snps-eusb2-phy
+    oneOf:
+      - items:
+          - enum:
+              - qcom,sdx75-snps-eusb2-phy
+          - const: qcom,sm8550-snps-eusb2-phy
+      - const: qcom,sm8550-snps-eusb2-phy
 
   reg:
     maxItems: 1
-- 
2.7.4

[PATCH v2 2/5] dt-bindings: phy: qcom,qmp-usb: Add SDX75 USB3 PHY

[Rohit Agarwal]

Add dt-bindings for USB3 PHY found on Qualcomm SDX75.

Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
---
 .../phy/qcom,sc8280xp-qmp-usb3-uni-phy.yaml        | 40 ++++++++++++++++++++--
 1 file changed, 37 insertions(+), 3 deletions(-)

diff --git a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb3-uni-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb3-uni-phy.yaml
index f99fbbc..5725620 100644
--- a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb3-uni-phy.yaml
+++ b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb3-uni-phy.yaml
@@ -20,6 +20,7 @@ properties:
       - qcom,qcm2290-qmp-usb3-phy
       - qcom,sa8775p-qmp-usb3-uni-phy
       - qcom,sc8280xp-qmp-usb3-uni-phy
+      - qcom,sdx75-qmp-usb3-uni-phy
       - qcom,sm6115-qmp-usb3-phy
 
   reg:
@@ -38,9 +39,7 @@ properties:
     maxItems: 2
 
   reset-names:
-    items:
-      - const: phy
-      - const: phy_phy
+    maxItems: 2
 
   vdda-phy-supply: true
 
@@ -75,6 +74,7 @@ allOf:
           contains:
             enum:
               - qcom,ipq9574-qmp-usb3-phy
+              - qcom,sdx75-qmp-usb3-uni-phy
     then:
       properties:
         clock-names:
@@ -122,6 +122,40 @@ allOf:
       required:
         - power-domains
 
+  - if:
+      properties:
+        compatible:
+          contains:
+            enum:
+              - qcom,ipq9574-qmp-usb3-phy
+              - qcom,qcm2290-qmp-usb3-phy
+              - qcom,sa8775p-qmp-usb3-uni-phy
+              - qcom,sc8280xp-qmp-usb3-uni-phy
+              - qcom,sm6115-qmp-usb3-phy
+    then:
+      properties:
+        resets:
+          maxItems: 2
+        reset-names:
+          items:
+            - const: phy
+            - const: phy_phy
+
+  - if:
+      properties:
+        compatible:
+          contains:
+            enum:
+              - qcom,sdx75-qmp-usb3-uni-phy
+    then:
+      properties:
+        resets:
+          maxItems: 2
+        reset-names:
+          items:
+            - const: phy
+            - const: common
+
 additionalProperties: false
 
 examples:
-- 
2.7.4

Re: [PATCH v2 2/5] dt-bindings: phy: qcom,qmp-usb: Add SDX75 USB3 PHY

[Dmitry Baryshkov]

On 05/09/2023 13:30, Rohit Agarwal wrote:
> Add dt-bindings for USB3 PHY found on Qualcomm SDX75.
> 
> Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
> ---
>   .../phy/qcom,sc8280xp-qmp-usb3-uni-phy.yaml        | 40 ++++++++++++++++++++--
>   1 file changed, 37 insertions(+), 3 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb3-uni-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb3-uni-phy.yaml
> index f99fbbc..5725620 100644
> --- a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb3-uni-phy.yaml
> +++ b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb3-uni-phy.yaml
> @@ -20,6 +20,7 @@ properties:
>         - qcom,qcm2290-qmp-usb3-phy
>         - qcom,sa8775p-qmp-usb3-uni-phy
>         - qcom,sc8280xp-qmp-usb3-uni-phy
> +      - qcom,sdx75-qmp-usb3-uni-phy

I think the ident is wrong here.

>         - qcom,sm6115-qmp-usb3-phy
>   
>     reg:
> @@ -38,9 +39,7 @@ properties:
>       maxItems: 2
>   
>     reset-names:
> -    items:
> -      - const: phy
> -      - const: phy_phy
> +    maxItems: 2
>   
>     vdda-phy-supply: true
>   
> @@ -75,6 +74,7 @@ allOf:
>             contains:
>               enum:
>                 - qcom,ipq9574-qmp-usb3-phy
> +              - qcom,sdx75-qmp-usb3-uni-phy
>       then:
>         properties:
>           clock-names:
> @@ -122,6 +122,40 @@ allOf:
>         required:
>           - power-domains
>   
> +  - if:
> +      properties:
> +        compatible:
> +          contains:
> +            enum:
> +              - qcom,ipq9574-qmp-usb3-phy
> +              - qcom,qcm2290-qmp-usb3-phy
> +              - qcom,sa8775p-qmp-usb3-uni-phy
> +              - qcom,sc8280xp-qmp-usb3-uni-phy
> +              - qcom,sm6115-qmp-usb3-phy
> +    then:
> +      properties:
> +        resets:
> +          maxItems: 2
> +        reset-names:
> +          items:
> +            - const: phy
> +            - const: phy_phy
> +
> +  - if:
> +      properties:
> +        compatible:
> +          contains:
> +            enum:
> +              - qcom,sdx75-qmp-usb3-uni-phy
> +    then:
> +      properties:
> +        resets:
> +          maxItems: 2
> +        reset-names:
> +          items:
> +            - const: phy
> +            - const: common

Could you please point us to the actual DTS patch adding this PHY? I'd 
say, it is highly likely that you are trying to bring in the unnecessary 
change.

> +
>   additionalProperties: false
>   
>   examples:

-- 
With best wishes
Dmitry

Re: [PATCH v2 2/5] dt-bindings: phy: qcom,qmp-usb: Add SDX75 USB3 PHY

[Rohit Agarwal]

On 9/6/2023 2:04 AM, Dmitry Baryshkov wrote:
> On 05/09/2023 13:30, Rohit Agarwal wrote:
>> Add dt-bindings for USB3 PHY found on Qualcomm SDX75.
>>
>> Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
>> ---
>>   .../phy/qcom,sc8280xp-qmp-usb3-uni-phy.yaml        | 40 
>> ++++++++++++++++++++--
>>   1 file changed, 37 insertions(+), 3 deletions(-)
>>
>> diff --git 
>> a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb3-uni-phy.yaml 
>> b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb3-uni-phy.yaml 
>>
>> index f99fbbc..5725620 100644
>> --- 
>> a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb3-uni-phy.yaml
>> +++ 
>> b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb3-uni-phy.yaml
>> @@ -20,6 +20,7 @@ properties:
>>         - qcom,qcm2290-qmp-usb3-phy
>>         - qcom,sa8775p-qmp-usb3-uni-phy
>>         - qcom,sc8280xp-qmp-usb3-uni-phy
>> +      - qcom,sdx75-qmp-usb3-uni-phy
>
> I think the ident is wrong here.

Same. Somehow, your reply has the issue but original not able to see.

>
>>         - qcom,sm6115-qmp-usb3-phy
>>       reg:
>> @@ -38,9 +39,7 @@ properties:
>>       maxItems: 2
>>       reset-names:
>> -    items:
>> -      - const: phy
>> -      - const: phy_phy
>> +    maxItems: 2
>>       vdda-phy-supply: true
>>   @@ -75,6 +74,7 @@ allOf:
>>             contains:
>>               enum:
>>                 - qcom,ipq9574-qmp-usb3-phy
>> +              - qcom,sdx75-qmp-usb3-uni-phy
>>       then:
>>         properties:
>>           clock-names:
>> @@ -122,6 +122,40 @@ allOf:
>>         required:
>>           - power-domains
>>   +  - if:
>> +      properties:
>> +        compatible:
>> +          contains:
>> +            enum:
>> +              - qcom,ipq9574-qmp-usb3-phy
>> +              - qcom,qcm2290-qmp-usb3-phy
>> +              - qcom,sa8775p-qmp-usb3-uni-phy
>> +              - qcom,sc8280xp-qmp-usb3-uni-phy
>> +              - qcom,sm6115-qmp-usb3-phy
>> +    then:
>> +      properties:
>> +        resets:
>> +          maxItems: 2
>> +        reset-names:
>> +          items:
>> +            - const: phy
>> +            - const: phy_phy
>> +
>> +  - if:
>> +      properties:
>> +        compatible:
>> +          contains:
>> +            enum:
>> +              - qcom,sdx75-qmp-usb3-uni-phy
>> +    then:
>> +      properties:
>> +        resets:
>> +          maxItems: 2
>> +        reset-names:
>> +          items:
>> +            - const: phy
>> +            - const: common
>
> Could you please point us to the actual DTS patch adding this PHY? I'd 
> say, it is highly likely that you are trying to bring in the 
> unnecessary change.
I have not posted the dt patches yet. But sdx75 uses these resets.
GCC_USB3PHY_PHY_BCR, GCC_USB3_PHY_BCR

These are same as sdx65 and sdx55.

Thanks,
Rohit.

>
>> +
>>   additionalProperties: false
>>     examples:
>

Re: [PATCH v2 2/5] dt-bindings: phy: qcom,qmp-usb: Add SDX75 USB3 PHY

[Rohit Agarwal]

On 9/6/2023 10:52 AM, Rohit Agarwal wrote:
>
> On 9/6/2023 2:04 AM, Dmitry Baryshkov wrote:
>> On 05/09/2023 13:30, Rohit Agarwal wrote:
>>> Add dt-bindings for USB3 PHY found on Qualcomm SDX75.
>>>
>>> Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
>>> ---
>>>   .../phy/qcom,sc8280xp-qmp-usb3-uni-phy.yaml        | 40 
>>> ++++++++++++++++++++--
>>>   1 file changed, 37 insertions(+), 3 deletions(-)
>>>
>>> diff --git 
>>> a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb3-uni-phy.yaml 
>>> b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb3-uni-phy.yaml 
>>>
>>> index f99fbbc..5725620 100644
>>> --- 
>>> a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb3-uni-phy.yaml
>>> +++ 
>>> b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb3-uni-phy.yaml
>>> @@ -20,6 +20,7 @@ properties:
>>>         - qcom,qcm2290-qmp-usb3-phy
>>>         - qcom,sa8775p-qmp-usb3-uni-phy
>>>         - qcom,sc8280xp-qmp-usb3-uni-phy
>>> +      - qcom,sdx75-qmp-usb3-uni-phy
>>
>> I think the ident is wrong here.
>
> Same. Somehow, your reply has the issue but original not able to see.
>
>>
>>>         - qcom,sm6115-qmp-usb3-phy
>>>       reg:
>>> @@ -38,9 +39,7 @@ properties:
>>>       maxItems: 2
>>>       reset-names:
>>> -    items:
>>> -      - const: phy
>>> -      - const: phy_phy
>>> +    maxItems: 2
>>>       vdda-phy-supply: true
>>>   @@ -75,6 +74,7 @@ allOf:
>>>             contains:
>>>               enum:
>>>                 - qcom,ipq9574-qmp-usb3-phy
>>> +              - qcom,sdx75-qmp-usb3-uni-phy
>>>       then:
>>>         properties:
>>>           clock-names:
>>> @@ -122,6 +122,40 @@ allOf:
>>>         required:
>>>           - power-domains
>>>   +  - if:
>>> +      properties:
>>> +        compatible:
>>> +          contains:
>>> +            enum:
>>> +              - qcom,ipq9574-qmp-usb3-phy
>>> +              - qcom,qcm2290-qmp-usb3-phy
>>> +              - qcom,sa8775p-qmp-usb3-uni-phy
>>> +              - qcom,sc8280xp-qmp-usb3-uni-phy
>>> +              - qcom,sm6115-qmp-usb3-phy
>>> +    then:
>>> +      properties:
>>> +        resets:
>>> +          maxItems: 2
>>> +        reset-names:
>>> +          items:
>>> +            - const: phy
>>> +            - const: phy_phy
>>> +
>>> +  - if:
>>> +      properties:
>>> +        compatible:
>>> +          contains:
>>> +            enum:
>>> +              - qcom,sdx75-qmp-usb3-uni-phy
>>> +    then:
>>> +      properties:
>>> +        resets:
>>> +          maxItems: 2
>>> +        reset-names:
>>> +          items:
>>> +            - const: phy
>>> +            - const: common
>>
>> Could you please point us to the actual DTS patch adding this PHY? 
>> I'd say, it is highly likely that you are trying to bring in the 
>> unnecessary change.
> I have not posted the dt patches yet. But sdx75 uses these resets.
> GCC_USB3PHY_PHY_BCR, GCC_USB3_PHY_BCR
>
> These are same as sdx65 and sdx55.
Ok I see in your patch 
https://lore.kernel.org/linux-phy/20230824211952.1397699-17-dmitry.baryshkov@linaro.org/
you are updating the resets name. Fine, this change becomes unnecessary.
Will rebase my change on your patches.

Thanks,
Rohit.
>
> Thanks,
> Rohit.
>
>>
>>> +
>>>   additionalProperties: false
>>>     examples:
>>

Re: [PATCH v2 2/5] dt-bindings: phy: qcom,qmp-usb: Add SDX75 USB3 PHY

[Dmitry Baryshkov]

On Wed, 6 Sept 2023 at 08:26, Rohit Agarwal <quic_rohiagar@quicinc.com> wrote:
>
>
> On 9/6/2023 10:52 AM, Rohit Agarwal wrote:
> >
> > On 9/6/2023 2:04 AM, Dmitry Baryshkov wrote:
> >> On 05/09/2023 13:30, Rohit Agarwal wrote:
> >>> Add dt-bindings for USB3 PHY found on Qualcomm SDX75.
> >>>
> >>> Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
> >>> ---
> >>>   .../phy/qcom,sc8280xp-qmp-usb3-uni-phy.yaml        | 40
> >>> ++++++++++++++++++++--
> >>>   1 file changed, 37 insertions(+), 3 deletions(-)
> >>>
> >>> diff --git
> >>> a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb3-uni-phy.yaml
> >>> b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb3-uni-phy.yaml
> >>>
> >>> index f99fbbc..5725620 100644
> >>> ---
> >>> a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb3-uni-phy.yaml
> >>> +++
> >>> b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb3-uni-phy.yaml
> >>> @@ -20,6 +20,7 @@ properties:
> >>>         - qcom,qcm2290-qmp-usb3-phy
> >>>         - qcom,sa8775p-qmp-usb3-uni-phy
> >>>         - qcom,sc8280xp-qmp-usb3-uni-phy
> >>> +      - qcom,sdx75-qmp-usb3-uni-phy
> >>
> >> I think the ident is wrong here.
> >
> > Same. Somehow, your reply has the issue but original not able to see.
> >
> >>
> >>>         - qcom,sm6115-qmp-usb3-phy
> >>>       reg:
> >>> @@ -38,9 +39,7 @@ properties:
> >>>       maxItems: 2
> >>>       reset-names:
> >>> -    items:
> >>> -      - const: phy
> >>> -      - const: phy_phy
> >>> +    maxItems: 2
> >>>       vdda-phy-supply: true
> >>>   @@ -75,6 +74,7 @@ allOf:
> >>>             contains:
> >>>               enum:
> >>>                 - qcom,ipq9574-qmp-usb3-phy
> >>> +              - qcom,sdx75-qmp-usb3-uni-phy
> >>>       then:
> >>>         properties:
> >>>           clock-names:
> >>> @@ -122,6 +122,40 @@ allOf:
> >>>         required:
> >>>           - power-domains
> >>>   +  - if:
> >>> +      properties:
> >>> +        compatible:
> >>> +          contains:
> >>> +            enum:
> >>> +              - qcom,ipq9574-qmp-usb3-phy
> >>> +              - qcom,qcm2290-qmp-usb3-phy
> >>> +              - qcom,sa8775p-qmp-usb3-uni-phy
> >>> +              - qcom,sc8280xp-qmp-usb3-uni-phy
> >>> +              - qcom,sm6115-qmp-usb3-phy
> >>> +    then:
> >>> +      properties:
> >>> +        resets:
> >>> +          maxItems: 2
> >>> +        reset-names:
> >>> +          items:
> >>> +            - const: phy
> >>> +            - const: phy_phy
> >>> +
> >>> +  - if:
> >>> +      properties:
> >>> +        compatible:
> >>> +          contains:
> >>> +            enum:
> >>> +              - qcom,sdx75-qmp-usb3-uni-phy
> >>> +    then:
> >>> +      properties:
> >>> +        resets:
> >>> +          maxItems: 2
> >>> +        reset-names:
> >>> +          items:
> >>> +            - const: phy
> >>> +            - const: common
> >>
> >> Could you please point us to the actual DTS patch adding this PHY?
> >> I'd say, it is highly likely that you are trying to bring in the
> >> unnecessary change.
> > I have not posted the dt patches yet. But sdx75 uses these resets.
> > GCC_USB3PHY_PHY_BCR, GCC_USB3_PHY_BCR
> >
> > These are same as sdx65 and sdx55.
> Ok I see in your patch
> https://lore.kernel.org/linux-phy/20230824211952.1397699-17-dmitry.baryshkov@linaro.org/
> you are updating the resets name. Fine, this change becomes unnecessary.
> Will rebase my change on your patches.

Well, even without my changes, GCC_USB3PHY_PHY_BCR is "phy_phy", just
judging by the name.

>
> Thanks,
> Rohit.
> >
> > Thanks,
> > Rohit.
> >
> >>
> >>> +
> >>>   additionalProperties: false
> >>>     examples:
> >>



-- 
With best wishes
Dmitry

Re: [PATCH v2 2/5] dt-bindings: phy: qcom,qmp-usb: Add SDX75 USB3 PHY

[Rohit Agarwal]

On 9/6/2023 11:09 AM, Dmitry Baryshkov wrote:
> On Wed, 6 Sept 2023 at 08:26, Rohit Agarwal <quic_rohiagar@quicinc.com> wrote:
>>
>> On 9/6/2023 10:52 AM, Rohit Agarwal wrote:
>>> On 9/6/2023 2:04 AM, Dmitry Baryshkov wrote:
>>>> On 05/09/2023 13:30, Rohit Agarwal wrote:
>>>>> Add dt-bindings for USB3 PHY found on Qualcomm SDX75.
>>>>>
>>>>> Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
>>>>> ---
>>>>>    .../phy/qcom,sc8280xp-qmp-usb3-uni-phy.yaml        | 40
>>>>> ++++++++++++++++++++--
>>>>>    1 file changed, 37 insertions(+), 3 deletions(-)
>>>>>
>>>>> diff --git
>>>>> a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb3-uni-phy.yaml
>>>>> b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb3-uni-phy.yaml
>>>>>
>>>>> index f99fbbc..5725620 100644
>>>>> ---
>>>>> a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb3-uni-phy.yaml
>>>>> +++
>>>>> b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb3-uni-phy.yaml
>>>>> @@ -20,6 +20,7 @@ properties:
>>>>>          - qcom,qcm2290-qmp-usb3-phy
>>>>>          - qcom,sa8775p-qmp-usb3-uni-phy
>>>>>          - qcom,sc8280xp-qmp-usb3-uni-phy
>>>>> +      - qcom,sdx75-qmp-usb3-uni-phy
>>>> I think the ident is wrong here.
>>> Same. Somehow, your reply has the issue but original not able to see.
>>>
>>>>>          - qcom,sm6115-qmp-usb3-phy
>>>>>        reg:
>>>>> @@ -38,9 +39,7 @@ properties:
>>>>>        maxItems: 2
>>>>>        reset-names:
>>>>> -    items:
>>>>> -      - const: phy
>>>>> -      - const: phy_phy
>>>>> +    maxItems: 2
>>>>>        vdda-phy-supply: true
>>>>>    @@ -75,6 +74,7 @@ allOf:
>>>>>              contains:
>>>>>                enum:
>>>>>                  - qcom,ipq9574-qmp-usb3-phy
>>>>> +              - qcom,sdx75-qmp-usb3-uni-phy
>>>>>        then:
>>>>>          properties:
>>>>>            clock-names:
>>>>> @@ -122,6 +122,40 @@ allOf:
>>>>>          required:
>>>>>            - power-domains
>>>>>    +  - if:
>>>>> +      properties:
>>>>> +        compatible:
>>>>> +          contains:
>>>>> +            enum:
>>>>> +              - qcom,ipq9574-qmp-usb3-phy
>>>>> +              - qcom,qcm2290-qmp-usb3-phy
>>>>> +              - qcom,sa8775p-qmp-usb3-uni-phy
>>>>> +              - qcom,sc8280xp-qmp-usb3-uni-phy
>>>>> +              - qcom,sm6115-qmp-usb3-phy
>>>>> +    then:
>>>>> +      properties:
>>>>> +        resets:
>>>>> +          maxItems: 2
>>>>> +        reset-names:
>>>>> +          items:
>>>>> +            - const: phy
>>>>> +            - const: phy_phy
>>>>> +
>>>>> +  - if:
>>>>> +      properties:
>>>>> +        compatible:
>>>>> +          contains:
>>>>> +            enum:
>>>>> +              - qcom,sdx75-qmp-usb3-uni-phy
>>>>> +    then:
>>>>> +      properties:
>>>>> +        resets:
>>>>> +          maxItems: 2
>>>>> +        reset-names:
>>>>> +          items:
>>>>> +            - const: phy
>>>>> +            - const: common
>>>> Could you please point us to the actual DTS patch adding this PHY?
>>>> I'd say, it is highly likely that you are trying to bring in the
>>>> unnecessary change.
>>> I have not posted the dt patches yet. But sdx75 uses these resets.
>>> GCC_USB3PHY_PHY_BCR, GCC_USB3_PHY_BCR
>>>
>>> These are same as sdx65 and sdx55.
>> Ok I see in your patch
>> https://lore.kernel.org/linux-phy/20230824211952.1397699-17-dmitry.baryshkov@linaro.org/
>> you are updating the resets name. Fine, this change becomes unnecessary.
>> Will rebase my change on your patches.
> Well, even without my changes, GCC_USB3PHY_PHY_BCR is "phy_phy", just
> judging by the name.
Yes. Ok.

Thanks,
Rohit.

[PATCH v2 3/5] dt-bindings: usb: qcom,dwc3: Fix SDX65 clocks

[Rohit Agarwal]

SDX65 has 5 clocks so mention in the bindings.

Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
---
 Documentation/devicetree/bindings/usb/qcom,dwc3.yaml | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml b/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml
index 6759105..018117b 100644
--- a/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml
+++ b/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml
@@ -180,6 +180,7 @@ allOf:
               - qcom,sdm670-dwc3
               - qcom,sdm845-dwc3
               - qcom,sdx55-dwc3
+              - qcom,sdx65-dwc3
               - qcom,sm6350-dwc3
     then:
       properties:
-- 
2.7.4

Re: [PATCH v2 3/5] dt-bindings: usb: qcom,dwc3: Fix SDX65 clocks

[Rob Herring]

On Tue, 05 Sep 2023 16:00:36 +0530, Rohit Agarwal wrote:
> SDX65 has 5 clocks so mention in the bindings.
> 
> Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
> ---
>  Documentation/devicetree/bindings/usb/qcom,dwc3.yaml | 1 +
>  1 file changed, 1 insertion(+)
> 

Acked-by: Rob Herring <robh@kernel.org>

Re: [PATCH v2 3/5] dt-bindings: usb: qcom,dwc3: Fix SDX65 clocks

[Dmitry Baryshkov]

On 05/09/2023 13:30, Rohit Agarwal wrote:
> SDX65 has 5 clocks so mention in the bindings.
> 
> Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>

Fixes tag?

> ---
>   Documentation/devicetree/bindings/usb/qcom,dwc3.yaml | 1 +
>   1 file changed, 1 insertion(+)
> 
> diff --git a/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml b/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml
> index 6759105..018117b 100644
> --- a/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml
> +++ b/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml
> @@ -180,6 +180,7 @@ allOf:
>                 - qcom,sdm670-dwc3
>                 - qcom,sdm845-dwc3
>                 - qcom,sdx55-dwc3
> +              - qcom,sdx65-dwc3

Is indent correct here?

>                 - qcom,sm6350-dwc3
>       then:
>         properties:

-- 
With best wishes
Dmitry

Re: [PATCH v2 3/5] dt-bindings: usb: qcom,dwc3: Fix SDX65 clocks

[Rohit Agarwal]

On 9/6/2023 2:05 AM, Dmitry Baryshkov wrote:
> On 05/09/2023 13:30, Rohit Agarwal wrote:
>> SDX65 has 5 clocks so mention in the bindings.
>>
>> Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
>
> Fixes tag?
Ack.
>
>> ---
>>   Documentation/devicetree/bindings/usb/qcom,dwc3.yaml | 1 +
>>   1 file changed, 1 insertion(+)
>>
>> diff --git a/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml 
>> b/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml
>> index 6759105..018117b 100644
>> --- a/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml
>> +++ b/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml
>> @@ -180,6 +180,7 @@ allOf:
>>                 - qcom,sdm670-dwc3
>>                 - qcom,sdm845-dwc3
>>                 - qcom,sdx55-dwc3
>> +              - qcom,sdx65-dwc3
>
> Is indent correct here?
>
I double cheked the patch and didnt find the indentation wrong. Not 
sure, in your reply it seems wrong but the original patch has correct 
indent.


Thanks,
Rohit
>>                 - qcom,sm6350-dwc3
>>       then:
>>         properties:
>

Re: [PATCH v2 3/5] dt-bindings: usb: qcom,dwc3: Fix SDX65 clocks

[Dmitry Baryshkov]

On Wed, 6 Sept 2023 at 08:10, Rohit Agarwal <quic_rohiagar@quicinc.com> wrote:
>
>
> On 9/6/2023 2:05 AM, Dmitry Baryshkov wrote:
> > On 05/09/2023 13:30, Rohit Agarwal wrote:
> >> SDX65 has 5 clocks so mention in the bindings.
> >>
> >> Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
> >
> > Fixes tag?
> Ack.
> >
> >> ---
> >>   Documentation/devicetree/bindings/usb/qcom,dwc3.yaml | 1 +
> >>   1 file changed, 1 insertion(+)
> >>
> >> diff --git a/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml
> >> b/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml
> >> index 6759105..018117b 100644
> >> --- a/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml
> >> +++ b/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml
> >> @@ -180,6 +180,7 @@ allOf:
> >>                 - qcom,sdm670-dwc3
> >>                 - qcom,sdm845-dwc3
> >>                 - qcom,sdx55-dwc3
> >> +              - qcom,sdx65-dwc3
> >
> > Is indent correct here?
> >
> I double cheked the patch and didnt find the indentation wrong. Not
> sure, in your reply it seems wrong but the original patch has correct
> indent.

Ack.

> Thanks,
> Rohit
> >>                 - qcom,sm6350-dwc3
> >>       then:
> >>         properties:
> >



-- 
With best wishes
Dmitry

[PATCH v2 4/5] dt-bindings: usb: dwc3: Add SDX75 compatible

[Rohit Agarwal]

Document the SDX75 dwc3 compatible.

Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
 Documentation/devicetree/bindings/usb/qcom,dwc3.yaml | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml b/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml
index 018117b..d78b721 100644
--- a/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml
+++ b/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml
@@ -34,6 +34,7 @@ properties:
           - qcom,sdm845-dwc3
           - qcom,sdx55-dwc3
           - qcom,sdx65-dwc3
+          - qcom,sdx75-dwc3
           - qcom,sm4250-dwc3
           - qcom,sm6115-dwc3
           - qcom,sm6125-dwc3
@@ -181,6 +182,7 @@ allOf:
               - qcom,sdm845-dwc3
               - qcom,sdx55-dwc3
               - qcom,sdx65-dwc3
+              - qcom,sdx75-dwc3
               - qcom,sm6350-dwc3
     then:
       properties:
@@ -364,6 +366,7 @@ allOf:
               - qcom,sdm845-dwc3
               - qcom,sdx55-dwc3
               - qcom,sdx65-dwc3
+              - qcom,sdx75-dwc3
               - qcom,sm4250-dwc3
               - qcom,sm6125-dwc3
               - qcom,sm6350-dwc3
-- 
2.7.4

[PATCH v2 5/5] phy: qcom-qmp-usb: Add Qualcomm SDX75 USB3 PHY support

[Rohit Agarwal]

Add support for USB3 QMP PHY found in SDX75 platform.

Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
---
 drivers/phy/qualcomm/phy-qcom-qmp-usb.c | 158 ++++++++++++++++++++++++++++++++
 1 file changed, 158 insertions(+)

diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-usb.c b/drivers/phy/qualcomm/phy-qcom-qmp-usb.c
index 0130bb8..57b8b5b 100644
--- a/drivers/phy/qualcomm/phy-qcom-qmp-usb.c
+++ b/drivers/phy/qualcomm/phy-qcom-qmp-usb.c
@@ -23,6 +23,7 @@
 #include "phy-qcom-qmp-pcs-misc-v3.h"
 #include "phy-qcom-qmp-pcs-usb-v4.h"
 #include "phy-qcom-qmp-pcs-usb-v5.h"
+#include "phy-qcom-qmp-pcs-usb-v6.h"
 
 /* QPHY_SW_RESET bit */
 #define SW_RESET				BIT(0)
@@ -858,6 +859,134 @@ static const struct qmp_phy_init_tbl sdx65_usb3_uniphy_rx_tbl[] = {
 	QMP_PHY_INIT_CFG(QSERDES_V5_RX_SIGDET_ENABLES, 0x00),
 };
 
+static const struct qmp_phy_init_tbl sdx75_usb3_uniphy_serdes_tbl[] = {
+	QMP_PHY_INIT_CFG(QSERDES_V6_COM_SSC_STEP_SIZE1_MODE1, 0x9e),
+	QMP_PHY_INIT_CFG(QSERDES_V6_COM_SSC_STEP_SIZE2_MODE1, 0x06),
+	QMP_PHY_INIT_CFG(QSERDES_V6_COM_CP_CTRL_MODE1, 0x02),
+	QMP_PHY_INIT_CFG(QSERDES_V6_COM_PLL_RCTRL_MODE1, 0x16),
+	QMP_PHY_INIT_CFG(QSERDES_V6_COM_PLL_CCTRL_MODE1, 0x36),
+	QMP_PHY_INIT_CFG(QSERDES_V6_COM_CORECLK_DIV_MODE1, 0x04),
+	QMP_PHY_INIT_CFG(QSERDES_V6_COM_LOCK_CMP1_MODE1, 0x2e),
+	QMP_PHY_INIT_CFG(QSERDES_V6_COM_LOCK_CMP2_MODE1, 0x82),
+	QMP_PHY_INIT_CFG(QSERDES_V6_COM_DEC_START_MODE1, 0x82),
+	QMP_PHY_INIT_CFG(QSERDES_V6_COM_DIV_FRAC_START1_MODE1, 0xab),
+	QMP_PHY_INIT_CFG(QSERDES_V6_COM_DIV_FRAC_START2_MODE1, 0xea),
+	QMP_PHY_INIT_CFG(QSERDES_V6_COM_DIV_FRAC_START3_MODE1, 0x02),
+	QMP_PHY_INIT_CFG(QSERDES_V6_COM_HSCLK_SEL_1, 0x01),
+	QMP_PHY_INIT_CFG(QSERDES_V6_COM_VCO_TUNE1_MODE1, 0x25),
+	QMP_PHY_INIT_CFG(QSERDES_V6_COM_VCO_TUNE2_MODE1, 0x02),
+	QMP_PHY_INIT_CFG(QSERDES_V6_COM_BIN_VCOCAL_CMP_CODE1_MODE1, 0xb7),
+	QMP_PHY_INIT_CFG(QSERDES_V6_COM_BIN_VCOCAL_CMP_CODE2_MODE1, 0x1e),
+	QMP_PHY_INIT_CFG(QSERDES_V6_COM_BIN_VCOCAL_CMP_CODE1_MODE0, 0xb7),
+	QMP_PHY_INIT_CFG(QSERDES_V6_COM_BIN_VCOCAL_CMP_CODE2_MODE0, 0x1e),
+	QMP_PHY_INIT_CFG(QSERDES_V6_COM_SSC_STEP_SIZE1_MODE0, 0x9e),
+	QMP_PHY_INIT_CFG(QSERDES_V6_COM_SSC_STEP_SIZE2_MODE0, 0x06),
+	QMP_PHY_INIT_CFG(QSERDES_V6_COM_CP_CTRL_MODE0, 0x02),
+	QMP_PHY_INIT_CFG(QSERDES_V6_COM_PLL_RCTRL_MODE0, 0x16),
+	QMP_PHY_INIT_CFG(QSERDES_V6_COM_PLL_CCTRL_MODE0, 0x36),
+	QMP_PHY_INIT_CFG(QSERDES_V6_COM_LOCK_CMP1_MODE0, 0x12),
+	QMP_PHY_INIT_CFG(QSERDES_V6_COM_LOCK_CMP2_MODE0, 0x34),
+	QMP_PHY_INIT_CFG(QSERDES_V6_COM_DEC_START_MODE0, 0x82),
+	QMP_PHY_INIT_CFG(QSERDES_V6_COM_DIV_FRAC_START1_MODE0, 0xab),
+	QMP_PHY_INIT_CFG(QSERDES_V6_COM_DIV_FRAC_START2_MODE0, 0xea),
+	QMP_PHY_INIT_CFG(QSERDES_V6_COM_DIV_FRAC_START3_MODE0, 0x02),
+	QMP_PHY_INIT_CFG(QSERDES_V6_COM_VCO_TUNE1_MODE0, 0x25),
+	QMP_PHY_INIT_CFG(QSERDES_V6_COM_VCO_TUNE2_MODE0, 0x02),
+	QMP_PHY_INIT_CFG(QSERDES_V6_COM_BG_TIMER, 0x0e),
+	QMP_PHY_INIT_CFG(QSERDES_V6_COM_SSC_EN_CENTER, 0x01),
+	QMP_PHY_INIT_CFG(QSERDES_V6_COM_SSC_PER1, 0x31),
+	QMP_PHY_INIT_CFG(QSERDES_V6_COM_SSC_PER2, 0x01),
+	QMP_PHY_INIT_CFG(QSERDES_V6_COM_SYSCLK_BUF_ENABLE, 0x0a),
+	QMP_PHY_INIT_CFG(QSERDES_V6_COM_SYSCLK_EN_SEL, 0x1a),
+	QMP_PHY_INIT_CFG(QSERDES_V6_COM_LOCK_CMP_CFG, 0x14),
+	QMP_PHY_INIT_CFG(QSERDES_V6_COM_VCO_TUNE_MAP, 0x04),
+	QMP_PHY_INIT_CFG(QSERDES_V6_COM_CORE_CLK_EN, 0x20),
+	QMP_PHY_INIT_CFG(QSERDES_V6_COM_CMN_CONFIG_1, 0x16),
+	QMP_PHY_INIT_CFG(QSERDES_V6_COM_AUTO_GAIN_ADJ_CTRL_1, 0xb6),
+	QMP_PHY_INIT_CFG(QSERDES_V6_COM_AUTO_GAIN_ADJ_CTRL_2, 0x4b),
+	QMP_PHY_INIT_CFG(QSERDES_V6_COM_AUTO_GAIN_ADJ_CTRL_3, 0x37),
+	QMP_PHY_INIT_CFG(QSERDES_V6_COM_ADDITIONAL_MISC, 0x0c),
+};
+
+static const struct qmp_phy_init_tbl sdx75_usb3_uniphy_tx_tbl[] = {
+	QMP_PHY_INIT_CFG(QSERDES_V6_TX_RES_CODE_LANE_TX, 0x00),
+	QMP_PHY_INIT_CFG(QSERDES_V6_TX_RES_CODE_LANE_RX, 0x00),
+	QMP_PHY_INIT_CFG(QSERDES_V6_TX_RES_CODE_LANE_OFFSET_TX, 0x1f),
+	QMP_PHY_INIT_CFG(QSERDES_V6_TX_RES_CODE_LANE_OFFSET_RX, 0x09),
+	QMP_PHY_INIT_CFG(QSERDES_V6_TX_LANE_MODE_1, 0xf5),
+	QMP_PHY_INIT_CFG(QSERDES_V6_TX_LANE_MODE_3, 0x3f),
+	QMP_PHY_INIT_CFG(QSERDES_V6_TX_LANE_MODE_4, 0x3f),
+	QMP_PHY_INIT_CFG(QSERDES_V6_TX_LANE_MODE_5, 0x5f),
+	QMP_PHY_INIT_CFG(QSERDES_V6_TX_RCV_DETECT_LVL_2, 0x12),
+	QMP_PHY_INIT_CFG(QSERDES_V6_TX_PI_QEC_CTRL, 0x21),
+};
+
+static const struct qmp_phy_init_tbl sdx75_usb3_uniphy_rx_tbl[] = {
+	QMP_PHY_INIT_CFG(QSERDES_V6_RX_UCDR_FO_GAIN, 0x0a),
+	QMP_PHY_INIT_CFG(QSERDES_V6_RX_UCDR_SO_GAIN, 0x06),
+	QMP_PHY_INIT_CFG(QSERDES_V6_RX_UCDR_FASTLOCK_FO_GAIN, 0x2f),
+	QMP_PHY_INIT_CFG(QSERDES_V6_RX_UCDR_SO_SATURATION_AND_ENABLE, 0x7f),
+	QMP_PHY_INIT_CFG(QSERDES_V6_RX_UCDR_FASTLOCK_COUNT_LOW, 0xff),
+	QMP_PHY_INIT_CFG(QSERDES_V6_RX_UCDR_FASTLOCK_COUNT_HIGH, 0x0f),
+	QMP_PHY_INIT_CFG(QSERDES_V6_RX_UCDR_PI_CONTROLS, 0x99),
+	QMP_PHY_INIT_CFG(QSERDES_V6_RX_UCDR_SB2_THRESH1, 0x08),
+	QMP_PHY_INIT_CFG(QSERDES_V6_RX_UCDR_SB2_THRESH2, 0x08),
+	QMP_PHY_INIT_CFG(QSERDES_V6_RX_UCDR_SB2_GAIN1, 0x00),
+	QMP_PHY_INIT_CFG(QSERDES_V6_RX_UCDR_SB2_GAIN2, 0x0a),
+	QMP_PHY_INIT_CFG(QSERDES_V6_RX_AUX_DATA_TCOARSE_TFINE, 0xa0),
+	QMP_PHY_INIT_CFG(QSERDES_V6_RX_VGA_CAL_CNTRL1, 0x54),
+	QMP_PHY_INIT_CFG(QSERDES_V6_RX_VGA_CAL_CNTRL2, 0x0f),
+	QMP_PHY_INIT_CFG(QSERDES_V6_RX_GM_CAL, 0x13),
+	QMP_PHY_INIT_CFG(QSERDES_V6_RX_RX_EQU_ADAPTOR_CNTRL2, 0x0f),
+	QMP_PHY_INIT_CFG(QSERDES_V6_RX_RX_EQU_ADAPTOR_CNTRL3, 0x4a),
+	QMP_PHY_INIT_CFG(QSERDES_V6_RX_RX_EQU_ADAPTOR_CNTRL4, 0x0a),
+	QMP_PHY_INIT_CFG(QSERDES_V6_RX_RX_IDAC_TSETTLE_LOW, 0x07),
+	QMP_PHY_INIT_CFG(QSERDES_V6_RX_RX_IDAC_TSETTLE_HIGH, 0x00),
+	QMP_PHY_INIT_CFG(QSERDES_V6_RX_RX_EQ_OFFSET_ADAPTOR_CNTRL1, 0x47),
+	QMP_PHY_INIT_CFG(QSERDES_V6_RX_SIGDET_CNTRL, 0x04),
+	QMP_PHY_INIT_CFG(QSERDES_V6_RX_SIGDET_DEGLITCH_CNTRL, 0x0e),
+	QMP_PHY_INIT_CFG(QSERDES_V6_RX_RX_MODE_00_LOW, 0x3f),
+	QMP_PHY_INIT_CFG(QSERDES_V6_RX_RX_MODE_00_HIGH, 0xbf),
+	QMP_PHY_INIT_CFG(QSERDES_V6_RX_RX_MODE_00_HIGH2, 0xff),
+	QMP_PHY_INIT_CFG(QSERDES_V6_RX_RX_MODE_00_HIGH3, 0xdf),
+	QMP_PHY_INIT_CFG(QSERDES_V6_RX_RX_MODE_00_HIGH4, 0xed),
+	QMP_PHY_INIT_CFG(QSERDES_V6_RX_RX_MODE_01_LOW, 0xdc),
+	QMP_PHY_INIT_CFG(QSERDES_V6_RX_RX_MODE_01_HIGH, 0x5c),
+	QMP_PHY_INIT_CFG(QSERDES_V6_RX_RX_MODE_01_HIGH2, 0x9c),
+	QMP_PHY_INIT_CFG(QSERDES_V6_RX_RX_MODE_01_HIGH3, 0x1d),
+	QMP_PHY_INIT_CFG(QSERDES_V6_RX_RX_MODE_01_HIGH4, 0x09),
+	QMP_PHY_INIT_CFG(QSERDES_V6_RX_DFE_EN_TIMER, 0x04),
+	QMP_PHY_INIT_CFG(QSERDES_V6_RX_DFE_CTLE_POST_CAL_OFFSET, 0x38),
+	QMP_PHY_INIT_CFG(QSERDES_V6_RX_DCC_CTRL1, 0x0c),
+	QMP_PHY_INIT_CFG(QSERDES_V6_RX_VTH_CODE, 0x10),
+	QMP_PHY_INIT_CFG(QSERDES_V6_RX_SIGDET_CAL_CTRL1, 0x14),
+	QMP_PHY_INIT_CFG(QSERDES_V6_RX_SIGDET_CAL_TRIM, 0x08),
+};
+
+static const struct qmp_phy_init_tbl sdx75_usb3_uniphy_pcs_tbl[] = {
+	QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_LOCK_DETECT_CONFIG1, 0xc4),
+	QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_LOCK_DETECT_CONFIG2, 0x89),
+	QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_LOCK_DETECT_CONFIG3, 0x20),
+	QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_LOCK_DETECT_CONFIG6, 0x13),
+	QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_REFGEN_REQ_CONFIG1, 0x21),
+	QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_RX_SIGDET_LVL, 0xaa),
+	QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_RCVR_DTCT_DLY_P1U2_L, 0xe7),
+	QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_RCVR_DTCT_DLY_P1U2_H, 0x03),
+	QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_CDR_RESET_TIME, 0x0a),
+	QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_ALIGN_DETECT_CONFIG1, 0x88),
+	QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_ALIGN_DETECT_CONFIG2, 0x13),
+	QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_PCS_TX_RX_CONFIG, 0x0c),
+	QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_EQ_CONFIG1, 0x4b),
+	QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_EQ_CONFIG5, 0x10),
+};
+
+static const struct qmp_phy_init_tbl sdx75_usb3_uniphy_pcs_usb_tbl[] = {
+	QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_USB3_LFPS_DET_HIGH_COUNT_VAL, 0xf8),
+	QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_USB3_RXEQTRAINING_DFE_TIME_S2, 0x07),
+	QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_USB3_RCVR_DTCT_DLY_U3_L, 0x40),
+	QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_USB3_RCVR_DTCT_DLY_U3_H, 0x00),
+};
+
 static const struct qmp_phy_init_tbl sm8350_usb3_uniphy_tx_tbl[] = {
 	QMP_PHY_INIT_CFG(QSERDES_V5_TX_LANE_MODE_1, 0xa5),
 	QMP_PHY_INIT_CFG(QSERDES_V5_TX_LANE_MODE_2, 0x82),
@@ -1556,6 +1685,32 @@ static const struct qmp_phy_cfg sdx65_usb3_uniphy_cfg = {
 	.has_pwrdn_delay	= true,
 };
 
+static const struct qmp_phy_cfg sdx75_usb3_uniphy_cfg = {
+	.lanes			= 1,
+	.offsets		= &qmp_usb_offsets_v5,
+
+	.serdes_tbl		= sdx75_usb3_uniphy_serdes_tbl,
+	.serdes_tbl_num		= ARRAY_SIZE(sdx75_usb3_uniphy_serdes_tbl),
+	.tx_tbl			= sdx75_usb3_uniphy_tx_tbl,
+	.tx_tbl_num		= ARRAY_SIZE(sdx75_usb3_uniphy_tx_tbl),
+	.rx_tbl			= sdx75_usb3_uniphy_rx_tbl,
+	.rx_tbl_num		= ARRAY_SIZE(sdx75_usb3_uniphy_rx_tbl),
+	.pcs_tbl		= sdx75_usb3_uniphy_pcs_tbl,
+	.pcs_tbl_num		= ARRAY_SIZE(sdx75_usb3_uniphy_pcs_tbl),
+	.pcs_usb_tbl		= sdx75_usb3_uniphy_pcs_usb_tbl,
+	.pcs_usb_tbl_num	= ARRAY_SIZE(sdx75_usb3_uniphy_pcs_usb_tbl),
+	.clk_list		= qmp_v4_sdx55_usbphy_clk_l,
+	.num_clks		= ARRAY_SIZE(qmp_v4_sdx55_usbphy_clk_l),
+	.reset_list		= msm8996_usb3phy_reset_l,
+	.num_resets		= ARRAY_SIZE(msm8996_usb3phy_reset_l),
+	.vreg_list		= qmp_phy_vreg_l,
+	.num_vregs		= ARRAY_SIZE(qmp_phy_vreg_l),
+	.regs			= qmp_v5_usb3phy_regs_layout,
+	.pcs_usb_offset		= 0x1000,
+
+	.has_pwrdn_delay	= true,
+};
+
 static const struct qmp_phy_cfg sm8350_usb3_uniphy_cfg = {
 	.lanes			= 1,
 
@@ -2256,6 +2411,9 @@ static const struct of_device_id qmp_usb_of_match_table[] = {
 		.compatible = "qcom,sdx65-qmp-usb3-uni-phy",
 		.data = &sdx65_usb3_uniphy_cfg,
 	}, {
+		.compatible = "qcom,sdx75-qmp-usb3-uni-phy",
+		.data = &sdx75_usb3_uniphy_cfg,
+	}, {
 		.compatible = "qcom,sm6115-qmp-usb3-phy",
 		.data = &qcm2290_usb3phy_cfg,
 	}, {
-- 
2.7.4

Re: [PATCH v2 5/5] phy: qcom-qmp-usb: Add Qualcomm SDX75 USB3 PHY support

[Dmitry Baryshkov]

On 05/09/2023 13:30, Rohit Agarwal wrote:
> Add support for USB3 QMP PHY found in SDX75 platform.
> 
> Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
> ---
>   drivers/phy/qualcomm/phy-qcom-qmp-usb.c | 158 ++++++++++++++++++++++++++++++++
>   1 file changed, 158 insertions(+)
> 
> diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-usb.c b/drivers/phy/qualcomm/phy-qcom-qmp-usb.c
> index 0130bb8..57b8b5b 100644
> --- a/drivers/phy/qualcomm/phy-qcom-qmp-usb.c
> +++ b/drivers/phy/qualcomm/phy-qcom-qmp-usb.c
> @@ -23,6 +23,7 @@
>   #include "phy-qcom-qmp-pcs-misc-v3.h"
>   #include "phy-qcom-qmp-pcs-usb-v4.h"
>   #include "phy-qcom-qmp-pcs-usb-v5.h"
> +#include "phy-qcom-qmp-pcs-usb-v6.h"
>   
>   /* QPHY_SW_RESET bit */
>   #define SW_RESET				BIT(0)
> @@ -858,6 +859,134 @@ static const struct qmp_phy_init_tbl sdx65_usb3_uniphy_rx_tbl[] = {

[skipped the tables]

> @@ -1556,6 +1685,32 @@ static const struct qmp_phy_cfg sdx65_usb3_uniphy_cfg = {
>   	.has_pwrdn_delay	= true,
>   };
>   
> +static const struct qmp_phy_cfg sdx75_usb3_uniphy_cfg = {
> +	.lanes			= 1,
> +	.offsets		= &qmp_usb_offsets_v5,

v6?

> +
> +	.serdes_tbl		= sdx75_usb3_uniphy_serdes_tbl,
> +	.serdes_tbl_num		= ARRAY_SIZE(sdx75_usb3_uniphy_serdes_tbl),
> +	.tx_tbl			= sdx75_usb3_uniphy_tx_tbl,
> +	.tx_tbl_num		= ARRAY_SIZE(sdx75_usb3_uniphy_tx_tbl),
> +	.rx_tbl			= sdx75_usb3_uniphy_rx_tbl,
> +	.rx_tbl_num		= ARRAY_SIZE(sdx75_usb3_uniphy_rx_tbl),
> +	.pcs_tbl		= sdx75_usb3_uniphy_pcs_tbl,
> +	.pcs_tbl_num		= ARRAY_SIZE(sdx75_usb3_uniphy_pcs_tbl),
> +	.pcs_usb_tbl		= sdx75_usb3_uniphy_pcs_usb_tbl,
> +	.pcs_usb_tbl_num	= ARRAY_SIZE(sdx75_usb3_uniphy_pcs_usb_tbl),
> +	.clk_list		= qmp_v4_sdx55_usbphy_clk_l,
> +	.num_clks		= ARRAY_SIZE(qmp_v4_sdx55_usbphy_clk_l),
> +	.reset_list		= msm8996_usb3phy_reset_l,
> +	.num_resets		= ARRAY_SIZE(msm8996_usb3phy_reset_l),

Clocks and resets are gone in 
https://lore.kernel.org/linux-phy/20230824211952.1397699-1-dmitry.baryshkov@linaro.org/

> +	.vreg_list		= qmp_phy_vreg_l,
> +	.num_vregs		= ARRAY_SIZE(qmp_phy_vreg_l),
> +	.regs			= qmp_v5_usb3phy_regs_layout,

This must be v6, if the rest of the PHY is using v6 register names.

> +	.pcs_usb_offset		= 0x1000,
> +
> +	.has_pwrdn_delay	= true,
> +};
> +
>   static const struct qmp_phy_cfg sm8350_usb3_uniphy_cfg = {
>   	.lanes			= 1,
>   
> @@ -2256,6 +2411,9 @@ static const struct of_device_id qmp_usb_of_match_table[] = {
>   		.compatible = "qcom,sdx65-qmp-usb3-uni-phy",
>   		.data = &sdx65_usb3_uniphy_cfg,
>   	}, {
> +		.compatible = "qcom,sdx75-qmp-usb3-uni-phy",
> +		.data = &sdx75_usb3_uniphy_cfg,
> +	}, {
>   		.compatible = "qcom,sm6115-qmp-usb3-phy",
>   		.data = &qcm2290_usb3phy_cfg,
>   	}, {

-- 
With best wishes
Dmitry

Re: [PATCH v2 5/5] phy: qcom-qmp-usb: Add Qualcomm SDX75 USB3 PHY support

[Rohit Agarwal]

On 9/6/2023 2:08 AM, Dmitry Baryshkov wrote:
> On 05/09/2023 13:30, Rohit Agarwal wrote:
>> Add support for USB3 QMP PHY found in SDX75 platform.
>>
>> Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
>> ---
>>   drivers/phy/qualcomm/phy-qcom-qmp-usb.c | 158 
>> ++++++++++++++++++++++++++++++++
>>   1 file changed, 158 insertions(+)
>>
>> diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-usb.c 
>> b/drivers/phy/qualcomm/phy-qcom-qmp-usb.c
>> index 0130bb8..57b8b5b 100644
>> --- a/drivers/phy/qualcomm/phy-qcom-qmp-usb.c
>> +++ b/drivers/phy/qualcomm/phy-qcom-qmp-usb.c
>> @@ -23,6 +23,7 @@
>>   #include "phy-qcom-qmp-pcs-misc-v3.h"
>>   #include "phy-qcom-qmp-pcs-usb-v4.h"
>>   #include "phy-qcom-qmp-pcs-usb-v5.h"
>> +#include "phy-qcom-qmp-pcs-usb-v6.h"
>>     /* QPHY_SW_RESET bit */
>>   #define SW_RESET                BIT(0)
>> @@ -858,6 +859,134 @@ static const struct qmp_phy_init_tbl 
>> sdx65_usb3_uniphy_rx_tbl[] = {
>
> [skipped the tables]
>
>> @@ -1556,6 +1685,32 @@ static const struct qmp_phy_cfg 
>> sdx65_usb3_uniphy_cfg = {
>>       .has_pwrdn_delay    = true,
>>   };
>>   +static const struct qmp_phy_cfg sdx75_usb3_uniphy_cfg = {
>> +    .lanes            = 1,
>> +    .offsets        = &qmp_usb_offsets_v5,
>
> v6?
Since the offsets for v5 and v6 are same, I did not introduce a new 
struct with the same values.
Please correct me if I have to introduce v6 offsets.
>
>> +
>> +    .serdes_tbl        = sdx75_usb3_uniphy_serdes_tbl,
>> +    .serdes_tbl_num        = ARRAY_SIZE(sdx75_usb3_uniphy_serdes_tbl),
>> +    .tx_tbl            = sdx75_usb3_uniphy_tx_tbl,
>> +    .tx_tbl_num        = ARRAY_SIZE(sdx75_usb3_uniphy_tx_tbl),
>> +    .rx_tbl            = sdx75_usb3_uniphy_rx_tbl,
>> +    .rx_tbl_num        = ARRAY_SIZE(sdx75_usb3_uniphy_rx_tbl),
>> +    .pcs_tbl        = sdx75_usb3_uniphy_pcs_tbl,
>> +    .pcs_tbl_num        = ARRAY_SIZE(sdx75_usb3_uniphy_pcs_tbl),
>> +    .pcs_usb_tbl        = sdx75_usb3_uniphy_pcs_usb_tbl,
>> +    .pcs_usb_tbl_num    = ARRAY_SIZE(sdx75_usb3_uniphy_pcs_usb_tbl),
>> +    .clk_list        = qmp_v4_sdx55_usbphy_clk_l,
>> +    .num_clks        = ARRAY_SIZE(qmp_v4_sdx55_usbphy_clk_l),
>> +    .reset_list        = msm8996_usb3phy_reset_l,
>> +    .num_resets        = ARRAY_SIZE(msm8996_usb3phy_reset_l),
>
> Clocks and resets are gone in 
> https://lore.kernel.org/linux-phy/20230824211952.1397699-1-dmitry.baryshkov@linaro.org/
>
Sure.
>> +    .vreg_list        = qmp_phy_vreg_l,
>> +    .num_vregs        = ARRAY_SIZE(qmp_phy_vreg_l),
>> +    .regs            = qmp_v5_usb3phy_regs_layout,
>
> This must be v6, if the rest of the PHY is using v6 register names.
Same, Shall I introduce v6 struct?

Thanks,
Rohit.
>
>> +    .pcs_usb_offset        = 0x1000,
>> +
>> +    .has_pwrdn_delay    = true,
>> +};
>> +
>>   static const struct qmp_phy_cfg sm8350_usb3_uniphy_cfg = {
>>       .lanes            = 1,
>>   @@ -2256,6 +2411,9 @@ static const struct of_device_id 
>> qmp_usb_of_match_table[] = {
>>           .compatible = "qcom,sdx65-qmp-usb3-uni-phy",
>>           .data = &sdx65_usb3_uniphy_cfg,
>>       }, {
>> +        .compatible = "qcom,sdx75-qmp-usb3-uni-phy",
>> +        .data = &sdx75_usb3_uniphy_cfg,
>> +    }, {
>>           .compatible = "qcom,sm6115-qmp-usb3-phy",
>>           .data = &qcm2290_usb3phy_cfg,
>>       }, {
>

Re: [PATCH v2 5/5] phy: qcom-qmp-usb: Add Qualcomm SDX75 USB3 PHY support

[Dmitry Baryshkov]

On Wed, 6 Sept 2023 at 08:35, Rohit Agarwal <quic_rohiagar@quicinc.com> wrote:
>
>
> On 9/6/2023 2:08 AM, Dmitry Baryshkov wrote:
> > On 05/09/2023 13:30, Rohit Agarwal wrote:
> >> Add support for USB3 QMP PHY found in SDX75 platform.
> >>
> >> Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
> >> ---
> >>   drivers/phy/qualcomm/phy-qcom-qmp-usb.c | 158
> >> ++++++++++++++++++++++++++++++++
> >>   1 file changed, 158 insertions(+)
> >>
> >> diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-usb.c
> >> b/drivers/phy/qualcomm/phy-qcom-qmp-usb.c
> >> index 0130bb8..57b8b5b 100644
> >> --- a/drivers/phy/qualcomm/phy-qcom-qmp-usb.c
> >> +++ b/drivers/phy/qualcomm/phy-qcom-qmp-usb.c
> >> @@ -23,6 +23,7 @@
> >>   #include "phy-qcom-qmp-pcs-misc-v3.h"
> >>   #include "phy-qcom-qmp-pcs-usb-v4.h"
> >>   #include "phy-qcom-qmp-pcs-usb-v5.h"
> >> +#include "phy-qcom-qmp-pcs-usb-v6.h"
> >>     /* QPHY_SW_RESET bit */
> >>   #define SW_RESET                BIT(0)
> >> @@ -858,6 +859,134 @@ static const struct qmp_phy_init_tbl
> >> sdx65_usb3_uniphy_rx_tbl[] = {
> >
> > [skipped the tables]
> >
> >> @@ -1556,6 +1685,32 @@ static const struct qmp_phy_cfg
> >> sdx65_usb3_uniphy_cfg = {
> >>       .has_pwrdn_delay    = true,
> >>   };
> >>   +static const struct qmp_phy_cfg sdx75_usb3_uniphy_cfg = {
> >> +    .lanes            = 1,
> >> +    .offsets        = &qmp_usb_offsets_v5,
> >
> > v6?
> Since the offsets for v5 and v6 are same, I did not introduce a new
> struct with the same values.
> Please correct me if I have to introduce v6 offsets.

If the offsets are the same, it's fine to leave at v5.

> >
> >> +
> >> +    .serdes_tbl        = sdx75_usb3_uniphy_serdes_tbl,
> >> +    .serdes_tbl_num        = ARRAY_SIZE(sdx75_usb3_uniphy_serdes_tbl),
> >> +    .tx_tbl            = sdx75_usb3_uniphy_tx_tbl,
> >> +    .tx_tbl_num        = ARRAY_SIZE(sdx75_usb3_uniphy_tx_tbl),
> >> +    .rx_tbl            = sdx75_usb3_uniphy_rx_tbl,
> >> +    .rx_tbl_num        = ARRAY_SIZE(sdx75_usb3_uniphy_rx_tbl),
> >> +    .pcs_tbl        = sdx75_usb3_uniphy_pcs_tbl,
> >> +    .pcs_tbl_num        = ARRAY_SIZE(sdx75_usb3_uniphy_pcs_tbl),
> >> +    .pcs_usb_tbl        = sdx75_usb3_uniphy_pcs_usb_tbl,
> >> +    .pcs_usb_tbl_num    = ARRAY_SIZE(sdx75_usb3_uniphy_pcs_usb_tbl),
> >> +    .clk_list        = qmp_v4_sdx55_usbphy_clk_l,
> >> +    .num_clks        = ARRAY_SIZE(qmp_v4_sdx55_usbphy_clk_l),
> >> +    .reset_list        = msm8996_usb3phy_reset_l,
> >> +    .num_resets        = ARRAY_SIZE(msm8996_usb3phy_reset_l),
> >
> > Clocks and resets are gone in
> > https://lore.kernel.org/linux-phy/20230824211952.1397699-1-dmitry.baryshkov@linaro.org/
> >
> Sure.
> >> +    .vreg_list        = qmp_phy_vreg_l,
> >> +    .num_vregs        = ARRAY_SIZE(qmp_phy_vreg_l),
> >> +    .regs            = qmp_v5_usb3phy_regs_layout,
> >
> > This must be v6, if the rest of the PHY is using v6 register names.
> Same, Shall I introduce v6 struct?

Yes. Otherwise it becomes hard to add offsets for different versions.
Generic rule: the name of the struct should match the Vn found in the
register names inside.

>
> Thanks,
> Rohit.
> >
> >> +    .pcs_usb_offset        = 0x1000,
> >> +
> >> +    .has_pwrdn_delay    = true,
> >> +};
> >> +
> >>   static const struct qmp_phy_cfg sm8350_usb3_uniphy_cfg = {
> >>       .lanes            = 1,
> >>   @@ -2256,6 +2411,9 @@ static const struct of_device_id
> >> qmp_usb_of_match_table[] = {
> >>           .compatible = "qcom,sdx65-qmp-usb3-uni-phy",
> >>           .data = &sdx65_usb3_uniphy_cfg,
> >>       }, {
> >> +        .compatible = "qcom,sdx75-qmp-usb3-uni-phy",
> >> +        .data = &sdx75_usb3_uniphy_cfg,
> >> +    }, {
> >>           .compatible = "qcom,sm6115-qmp-usb3-phy",
> >>           .data = &qcm2290_usb3phy_cfg,
> >>       }, {
> >



-- 
With best wishes
Dmitry

Re: [PATCH v2 5/5] phy: qcom-qmp-usb: Add Qualcomm SDX75 USB3 PHY support

[Rohit Agarwal]

On 9/6/2023 11:11 AM, Dmitry Baryshkov wrote:
> On Wed, 6 Sept 2023 at 08:35, Rohit Agarwal <quic_rohiagar@quicinc.com> wrote:
>>
>> On 9/6/2023 2:08 AM, Dmitry Baryshkov wrote:
>>> On 05/09/2023 13:30, Rohit Agarwal wrote:
>>>> Add support for USB3 QMP PHY found in SDX75 platform.
>>>>
>>>> Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
>>>> ---
>>>>    drivers/phy/qualcomm/phy-qcom-qmp-usb.c | 158
>>>> ++++++++++++++++++++++++++++++++
>>>>    1 file changed, 158 insertions(+)
>>>>
>>>> diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-usb.c
>>>> b/drivers/phy/qualcomm/phy-qcom-qmp-usb.c
>>>> index 0130bb8..57b8b5b 100644
>>>> --- a/drivers/phy/qualcomm/phy-qcom-qmp-usb.c
>>>> +++ b/drivers/phy/qualcomm/phy-qcom-qmp-usb.c
>>>> @@ -23,6 +23,7 @@
>>>>    #include "phy-qcom-qmp-pcs-misc-v3.h"
>>>>    #include "phy-qcom-qmp-pcs-usb-v4.h"
>>>>    #include "phy-qcom-qmp-pcs-usb-v5.h"
>>>> +#include "phy-qcom-qmp-pcs-usb-v6.h"
>>>>      /* QPHY_SW_RESET bit */
>>>>    #define SW_RESET                BIT(0)
>>>> @@ -858,6 +859,134 @@ static const struct qmp_phy_init_tbl
>>>> sdx65_usb3_uniphy_rx_tbl[] = {
>>> [skipped the tables]
>>>
>>>> @@ -1556,6 +1685,32 @@ static const struct qmp_phy_cfg
>>>> sdx65_usb3_uniphy_cfg = {
>>>>        .has_pwrdn_delay    = true,
>>>>    };
>>>>    +static const struct qmp_phy_cfg sdx75_usb3_uniphy_cfg = {
>>>> +    .lanes            = 1,
>>>> +    .offsets        = &qmp_usb_offsets_v5,
>>> v6?
>> Since the offsets for v5 and v6 are same, I did not introduce a new
>> struct with the same values.
>> Please correct me if I have to introduce v6 offsets.
> If the offsets are the same, it's fine to leave at v5.
Ack.
>>>> +
>>>> +    .serdes_tbl        = sdx75_usb3_uniphy_serdes_tbl,
>>>> +    .serdes_tbl_num        = ARRAY_SIZE(sdx75_usb3_uniphy_serdes_tbl),
>>>> +    .tx_tbl            = sdx75_usb3_uniphy_tx_tbl,
>>>> +    .tx_tbl_num        = ARRAY_SIZE(sdx75_usb3_uniphy_tx_tbl),
>>>> +    .rx_tbl            = sdx75_usb3_uniphy_rx_tbl,
>>>> +    .rx_tbl_num        = ARRAY_SIZE(sdx75_usb3_uniphy_rx_tbl),
>>>> +    .pcs_tbl        = sdx75_usb3_uniphy_pcs_tbl,
>>>> +    .pcs_tbl_num        = ARRAY_SIZE(sdx75_usb3_uniphy_pcs_tbl),
>>>> +    .pcs_usb_tbl        = sdx75_usb3_uniphy_pcs_usb_tbl,
>>>> +    .pcs_usb_tbl_num    = ARRAY_SIZE(sdx75_usb3_uniphy_pcs_usb_tbl),
>>>> +    .clk_list        = qmp_v4_sdx55_usbphy_clk_l,
>>>> +    .num_clks        = ARRAY_SIZE(qmp_v4_sdx55_usbphy_clk_l),
>>>> +    .reset_list        = msm8996_usb3phy_reset_l,
>>>> +    .num_resets        = ARRAY_SIZE(msm8996_usb3phy_reset_l),
>>> Clocks and resets are gone in
>>> https://lore.kernel.org/linux-phy/20230824211952.1397699-1-dmitry.baryshkov@linaro.org/
>>>
>> Sure.
>>>> +    .vreg_list        = qmp_phy_vreg_l,
>>>> +    .num_vregs        = ARRAY_SIZE(qmp_phy_vreg_l),
>>>> +    .regs            = qmp_v5_usb3phy_regs_layout,
>>> This must be v6, if the rest of the PHY is using v6 register names.
>> Same, Shall I introduce v6 struct?
> Yes. Otherwise it becomes hard to add offsets for different versions.
> Generic rule: the name of the struct should match the Vn found in the
> register names inside.
Understood. Thanks for the info.
And will also wait for your patches that removes _USB_.

Thanks,
Rohit.
>> Thanks,
>> Rohit.
>>>> +    .pcs_usb_offset        = 0x1000,
>>>> +
>>>> +    .has_pwrdn_delay    = true,
>>>> +};
>>>> +
>>>>    static const struct qmp_phy_cfg sm8350_usb3_uniphy_cfg = {
>>>>        .lanes            = 1,
>>>>    @@ -2256,6 +2411,9 @@ static const struct of_device_id
>>>> qmp_usb_of_match_table[] = {
>>>>            .compatible = "qcom,sdx65-qmp-usb3-uni-phy",
>>>>            .data = &sdx65_usb3_uniphy_cfg,
>>>>        }, {
>>>> +        .compatible = "qcom,sdx75-qmp-usb3-uni-phy",
>>>> +        .data = &sdx75_usb3_uniphy_cfg,
>>>> +    }, {
>>>>            .compatible = "qcom,sm6115-qmp-usb3-phy",
>>>>            .data = &qcm2290_usb3phy_cfg,
>>>>        }, {
>
>