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AJvYcCWix+0PBq6lbt71DKtsc9hg9/8dh/g0aAp7/ySc8DN6uzo8JmqCox/6v30SBzjAj3abeVfsj54g9j06C31Iptu85AMpk4qpQLE5lg== X-Gm-Message-State: AOJu0YzQq1a57gqtAH+uvQbwwMqIYG/dtowZDcakoxkloNcdet1qVXgK GmGNsoPmNz8JWBfSoZUFY9kF/Ukc5rrEide4cSGymQqc6QkexBRjbk4oXfllwrdOMXqAC91eTc6 dCp1RdqBuxAhgSztAqYj/9n6dMYkT7HrY37KRBw== X-Google-Smtp-Source: AGHT+IGhhLlYZ82l6gl3X+EsNLlepkGD/eRveXzBhTVRmQD8rg+O0oCrJyGSf1cCkIdlCknUK5+bVyVkBaulCaQoMcM= X-Received: by 2002:a05:6e02:1545:b0:376:148f:d6c6 with SMTP id e9e14a558f8ab-3761d70d4b9mr43611515ab.24.1718855407480; Wed, 19 Jun 2024 20:50:07 -0700 (PDT) Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 References: <20240222094006.1030709-1-apatel@ventanamicro.com> <20240222094006.1030709-2-apatel@ventanamicro.com> In-Reply-To: From: Anup Patel Date: Thu, 20 Jun 2024 09:19:56 +0530 Message-ID: Subject: Re: [PATCH v14 01/18] irqchip/sifive-plic: Convert PLIC driver into a platform driver To: Emil Renner Berthing Cc: Anup Patel , Palmer Dabbelt , Paul Walmsley , Thomas Gleixner , Rob Herring , Krzysztof Kozlowski , Frank Rowand , Conor Dooley , Samuel Holland , devicetree@vger.kernel.org, Saravana Kannan , Marc Zyngier , linux-kernel@vger.kernel.org, =?UTF-8?B?QmrDtnJuIFTDtnBlbA==?= , Atish Patra , linux-riscv@lists.infradead.org, linux-arm-kernel@lists.infradead.org, Andrew Jones Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Wed, Jun 19, 2024 at 11:16=E2=80=AFPM Emil Renner Berthing wrote: > > Anup Patel wrote: > > On Tue, Jun 18, 2024 at 7:00=E2=80=AFPM Emil Renner Berthing > > wrote: > > > > > > Anup Patel wrote: > > > > The PLIC driver does not require very early initialization so conve= rt > > > > it into a platform driver. > > > > > > > > After conversion, the PLIC driver is probed after CPUs are brought-= up > > > > so setup cpuhp state after context handler of all online CPUs are > > > > initialized otherwise PLIC driver crashes for platforms with multip= le > > > > PLIC instances. > > > > > > > > Signed-off-by: Anup Patel > > > > > > Hi Anup, > > > > > > Sorry for the late reply to the mailing list, but ever since 6.9 wher= e this was > > > applied my Allwinner D1 based boards no longer boot. This is the log = of my > > > LicheeRV Dock booting plain 6.10-rc4, locking up and then rebooting d= ue to the > > > the watchdog timing out: > > > > > > https://pastebin.com/raw/nsbzgEKW > > > > > > On 6.10-rc4 I can bring the same board to boot by reverting this patc= h and all > > > patches building on it. Eg.: > > > > > > git revert e306a894bd51 a7fb69ffd7ce abb720579490 \ > > > 956521064780 a15587277a24 6c725f33d67b \ > > > b68d0ff529a9 25d862e183d4 8ec99b033147 > > > > Does your board boot with only SBI timer driver enabled ? > > I'm not 100% sure this is what you mean, but with this change I can disab= le > CONFIG_SUN4I_TIMER: > > diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs > index f51bb24bc84c..0143545348eb 100644 > --- a/arch/riscv/Kconfig.socs > +++ b/arch/riscv/Kconfig.socs > @@ -39,7 +39,6 @@ config ARCH_SUNXI > bool "Allwinner sun20i SoCs" > depends on MMU && !XIP_KERNEL > select ERRATA_THEAD > - select SUN4I_TIMER > help > This enables support for Allwinner sun20i platform hardware, > including boards based on the D1 and D1s SoCs. > > > But unfortunately the board still doesn't boot: > https://pastebin.com/raw/AwRxcfeu I think we should enable debug prints in DD core and see which device is not getting probed due to lack of a provider. Just add "#define DEBUG" at the top in drivers/base/core.c and boot again with "loglevel=3D8" kernel parameter (along with the above change). Regards, Anup