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From: Anup Patel <anup@brainfault.org>
To: "Björn Töpel" <bjorn@kernel.org>
Cc: Anup Patel <apatel@ventanamicro.com>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	 Paul Walmsley <paul.walmsley@sifive.com>,
	Thomas Gleixner <tglx@linutronix.de>,
	 Rob Herring <robh+dt@kernel.org>,
	 Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Frank Rowand <frowand.list@gmail.com>,
	 Conor Dooley <conor+dt@kernel.org>,
	devicetree@vger.kernel.org,
	 Saravana Kannan <saravanak@google.com>,
	Marc Zyngier <maz@kernel.org>,
	linux-kernel@vger.kernel.org,
	 Atish Patra <atishp@atishpatra.org>,
	linux-riscv@lists.infradead.org,
	 linux-arm-kernel@lists.infradead.org,
	Andrew Jones <ajones@ventanamicro.com>
Subject: Re: [PATCH v14 13/18] irqchip/riscv-imsic: Add device MSI domain support for PCI devices
Date: Thu, 22 Feb 2024 19:00:25 +0530	[thread overview]
Message-ID: <CAAhSdy3DtDFnZKQLXXJ2OPPSv5s8bbGvm8Mmqhg_F2rPneQ3sw@mail.gmail.com> (raw)
In-Reply-To: <87msrstzck.fsf@all.your.base.are.belong.to.us>

On Thu, Feb 22, 2024 at 6:44 PM Björn Töpel <bjorn@kernel.org> wrote:
>
> Anup Patel <apatel@ventanamicro.com> writes:
>
> > The Linux PCI framework supports per-device MSI domains for PCI devices
> > so extend the IMSIC driver to allow PCI per-device MSI domains.
> >
> > Signed-off-by: Anup Patel <apatel@ventanamicro.com>
> > ---
> >  drivers/irqchip/Kconfig                    |  7 +++++
> >  drivers/irqchip/irq-riscv-imsic-platform.c | 35 ++++++++++++++++++++--
> >  2 files changed, 40 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig
> > index 85f86e31c996..2fc0cb32341a 100644
> > --- a/drivers/irqchip/Kconfig
> > +++ b/drivers/irqchip/Kconfig
> > @@ -553,6 +553,13 @@ config RISCV_IMSIC
> >       select GENERIC_IRQ_MATRIX_ALLOCATOR
> >       select GENERIC_MSI_IRQ
> >
> > +config RISCV_IMSIC_PCI
> > +     bool
> > +     depends on RISCV_IMSIC
> > +     depends on PCI
> > +     depends on PCI_MSI
> > +     default RISCV_IMSIC
> > +
> >  config EXYNOS_IRQ_COMBINER
> >       bool "Samsung Exynos IRQ combiner support" if COMPILE_TEST
> >       depends on (ARCH_EXYNOS && ARM) || COMPILE_TEST
> > diff --git a/drivers/irqchip/irq-riscv-imsic-platform.c b/drivers/irqchip/irq-riscv-imsic-platform.c
> > index e2344fc08dca..90ddcdd0bba5 100644
> > --- a/drivers/irqchip/irq-riscv-imsic-platform.c
> > +++ b/drivers/irqchip/irq-riscv-imsic-platform.c
> > @@ -14,6 +14,7 @@
> >  #include <linux/irqdomain.h>
> >  #include <linux/module.h>
> >  #include <linux/msi.h>
> > +#include <linux/pci.h>
> >  #include <linux/platform_device.h>
> >  #include <linux/spinlock.h>
> >  #include <linux/smp.h>
> > @@ -208,6 +209,28 @@ static const struct irq_domain_ops imsic_base_domain_ops = {
> >  #endif
> >  };
> >
> > +#ifdef CONFIG_RISCV_IMSIC_PCI
> > +
> > +static void imsic_pci_mask_irq(struct irq_data *d)
> > +{
> > +     pci_msi_mask_irq(d);
> > +     irq_chip_mask_parent(d);
> > +}
> > +
> > +static void imsic_pci_unmask_irq(struct irq_data *d)
> > +{
> > +     irq_chip_unmask_parent(d);
> > +     pci_msi_unmask_irq(d);
> > +}
> > +
> > +#define MATCH_PCI_MSI                BIT(DOMAIN_BUS_PCI_MSI)
> > +
> > +#else
> > +
> > +#define MATCH_PCI_MSI                0
> > +
> > +#endif
> > +
> >  static bool imsic_init_dev_msi_info(struct device *dev,
> >                                   struct irq_domain *domain,
> >                                   struct irq_domain *real_parent,
> > @@ -231,6 +254,13 @@ static bool imsic_init_dev_msi_info(struct device *dev,
> >
> >       /* Is the target supported? */
> >       switch (info->bus_token) {
> > +#ifdef CONFIG_RISCV_IMSIC_PCI
> > +     case DOMAIN_BUS_PCI_DEVICE_MSI:
> > +     case DOMAIN_BUS_PCI_DEVICE_MSIX:
> > +             info->chip->irq_mask = imsic_pci_mask_irq;
> > +             info->chip->irq_unmask = imsic_pci_unmask_irq;
>
> irq_set_affinity()?

It's already set by the switch-case above.

Regards,
Anup

  reply	other threads:[~2024-02-22 13:30 UTC|newest]

Thread overview: 47+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-02-22  9:39 [PATCH v14 00/18] Linux RISC-V AIA Support Anup Patel
2024-02-22  9:39 ` [PATCH v14 01/18] irqchip/sifive-plic: Convert PLIC driver into a platform driver Anup Patel
2024-04-03  8:29   ` Lad, Prabhakar
2024-04-03 14:16     ` Anup Patel
2024-04-03 15:49       ` Lad, Prabhakar
2024-04-03 16:28         ` Samuel Holland
2024-04-03 18:10           ` Lad, Prabhakar
2024-04-03 16:42         ` Anup Patel
2024-04-03 17:19         ` Anup Patel
2024-05-29 14:22   ` Geert Uytterhoeven
2024-05-29 22:04     ` Samuel Holland
2024-05-30  7:06       ` Geert Uytterhoeven
2024-06-18 13:30   ` Emil Renner Berthing
2024-06-18 15:48     ` Anup Patel
2024-06-19 17:46       ` Emil Renner Berthing
2024-06-20  3:49         ` Anup Patel
2024-06-20 13:02           ` Emil Renner Berthing
2024-06-20 15:08             ` Anup Patel
2024-07-09  2:15               ` Charlie Jenkins
2024-07-09  9:51                 ` Conor Dooley
2024-02-22  9:39 ` [PATCH v14 02/18] irqchip/sifive-plic: Use dev_xyz() in-place of pr_xyz() Anup Patel
2024-02-22  9:39 ` [PATCH v14 03/18] irqchip/sifive-plic: Use devm_xyz() for managed allocation Anup Patel
2024-02-22  9:39 ` [PATCH v14 04/18] irqchip/sifive-plic: Use riscv_get_intc_hwnode() to get parent fwnode Anup Patel
2024-02-22  9:39 ` [PATCH v14 05/18] irqchip/sifive-plic: Cleanup PLIC contexts upon irqdomain creation failure Anup Patel
2024-02-22  9:39 ` [PATCH v14 06/18] irqchip/sifive-plic: Parse number of irqs and contexts early in plic_probe Anup Patel
2024-02-22  9:39 ` [PATCH v14 07/18] irqchip/sifive-plic: Improve locking safety by using irqsave/irqrestore Anup Patel
2024-02-22  9:39 ` [PATCH v14 08/18] irqchip/riscv-intc: Add support for RISC-V AIA Anup Patel
2024-02-22  9:39 ` [PATCH v14 09/18] dt-bindings: interrupt-controller: Add RISC-V incoming MSI controller Anup Patel
2024-02-22  9:39 ` [PATCH v14 10/18] genirq/matrix: Dynamic bitmap allocation Anup Patel
2024-02-22  9:39 ` [PATCH v14 11/18] irqchip: Add RISC-V incoming MSI controller early driver Anup Patel
2024-02-22 13:13   ` Björn Töpel
2024-02-22 13:42     ` Anup Patel
2024-02-22 14:15       ` Björn Töpel
2024-02-23  8:28   ` Thomas Gleixner
2024-02-23  9:52     ` Anup Patel
2024-02-22  9:40 ` [PATCH v14 12/18] irqchip/riscv-imsic: Add device MSI domain support for platform devices Anup Patel
2024-02-22 13:15   ` Björn Töpel
2024-02-22 13:44     ` Anup Patel
2024-02-22  9:40 ` [PATCH v14 13/18] irqchip/riscv-imsic: Add device MSI domain support for PCI devices Anup Patel
2024-02-22 13:14   ` Björn Töpel
2024-02-22 13:30     ` Anup Patel [this message]
2024-02-22 14:05       ` Björn Töpel
2024-02-22  9:40 ` [PATCH v14 14/18] dt-bindings: interrupt-controller: Add RISC-V advanced PLIC Anup Patel
2024-02-22  9:40 ` [PATCH v14 15/18] irqchip: Add RISC-V advanced PLIC driver for direct-mode Anup Patel
2024-02-22  9:40 ` [PATCH v14 16/18] irqchip/riscv-aplic: Add support for MSI-mode Anup Patel
2024-02-22  9:40 ` [PATCH v14 17/18] RISC-V: Select APLIC and IMSIC drivers Anup Patel
2024-02-22  9:40 ` [PATCH v14 18/18] MAINTAINERS: Add entry for RISC-V AIA drivers Anup Patel

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