* [PATCH 1/3] tty: serial: Fix mediatek UART driver setting baudrate issue
2014-10-22 13:12 [PATCH 0/3] tty: serial: Add mediatek MT8127 and MT8135 UART support Eddie Huang
@ 2014-10-22 13:12 ` Eddie Huang
2014-10-22 13:12 ` [PATCH 2/3] ARM: mediatek: add UART dts for mt8127 and mt8135 Eddie Huang
2014-10-22 13:12 ` [PATCH 3/3] DTS: serial: Add bindings document for the Mediatek UARTs Eddie Huang
2 siblings, 0 replies; 8+ messages in thread
From: Eddie Huang @ 2014-10-22 13:12 UTC (permalink / raw)
To: Rob Herring, Matthias Brugger, Greg Kroah-Hartman
Cc: Mark Rutland, devicetree, Russell King, srv_heupstream,
Pawel Moll, Ian Campbell, hc.yen, yh.chen, linux-kernel,
nathan.chung, linux-serial, Kumar Gala, Eddie Huang, Jiri Slaby,
Sascha Hauer, linux-arm-kernel, Alan Cox
In mtk8250_set_termios function, calculating quot value can not be zero,
otherwise, using DIV_ROUND_CLOSEST(port->uartclk, quot * baud) will fail due to
divisor is zero.
Signed-off-by: Eddie Huang <eddie.huang@mediatek.com>
---
drivers/tty/serial/8250/8250_mtk.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/tty/serial/8250/8250_mtk.c b/drivers/tty/serial/8250/8250_mtk.c
index 8f37d57..6f93123 100644
--- a/drivers/tty/serial/8250/8250_mtk.c
+++ b/drivers/tty/serial/8250/8250_mtk.c
@@ -74,14 +74,14 @@ mtk8250_set_termios(struct uart_port *port, struct ktermios *termios,
/* Set to next lower baudrate supported */
if ((baud == 500000) || (baud == 576000))
baud = 460800;
- quot = DIV_ROUND_CLOSEST(port->uartclk, 4 * baud);
+ quot = DIV_ROUND_UP(port->uartclk, 4 * baud);
} else {
serial_port_out(port, UART_MTK_HIGHS, 0x3);
/* Set to highest baudrate supported */
if (baud >= 1152000)
baud = 921600;
- quot = DIV_ROUND_CLOSEST(port->uartclk, 256 * baud);
+ quot = DIV_ROUND_UP(port->uartclk, 256 * baud);
}
/*
--
1.8.1.1.dirty
^ permalink raw reply related [flat|nested] 8+ messages in thread* [PATCH 2/3] ARM: mediatek: add UART dts for mt8127 and mt8135
2014-10-22 13:12 [PATCH 0/3] tty: serial: Add mediatek MT8127 and MT8135 UART support Eddie Huang
2014-10-22 13:12 ` [PATCH 1/3] tty: serial: Fix mediatek UART driver setting baudrate issue Eddie Huang
@ 2014-10-22 13:12 ` Eddie Huang
2014-10-24 15:04 ` Matthias Brugger
[not found] ` <1413983529-21887-3-git-send-email-eddie.huang-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org>
2014-10-22 13:12 ` [PATCH 3/3] DTS: serial: Add bindings document for the Mediatek UARTs Eddie Huang
2 siblings, 2 replies; 8+ messages in thread
From: Eddie Huang @ 2014-10-22 13:12 UTC (permalink / raw)
To: Rob Herring, Matthias Brugger, Greg Kroah-Hartman
Cc: Mark Rutland, devicetree, Russell King, srv_heupstream,
Pawel Moll, Ian Campbell, hc.yen, yh.chen, linux-kernel,
nathan.chung, linux-serial, Kumar Gala, Eddie Huang, Jiri Slaby,
Sascha Hauer, linux-arm-kernel, Alan Cox
This add dts support for mt8127 and mt8135 SOC UART
Signed-off-by: Eddie Huang <eddie.huang@mediatek.com>
---
arch/arm/boot/dts/mt8127.dtsi | 34 ++++++++++++++++++++++++++++++++++
arch/arm/boot/dts/mt8135.dtsi | 36 ++++++++++++++++++++++++++++++++++++
2 files changed, 70 insertions(+)
diff --git a/arch/arm/boot/dts/mt8127.dtsi b/arch/arm/boot/dts/mt8127.dtsi
index 25c9f69..249c218 100644
--- a/arch/arm/boot/dts/mt8127.dtsi
+++ b/arch/arm/boot/dts/mt8127.dtsi
@@ -64,6 +64,12 @@
clock-frequency = <32000>;
#clock-cells = <0>;
};
+
+ uart_clk: dummy26m {
+ compatible = "fixed-clock";
+ clock-frequency = <26000000>;
+ #clock-cells = <0>;
+ };
};
soc {
@@ -89,5 +95,33 @@
<0 0x10214000 0 0x2000>,
<0 0x10216000 0 0x2000>;
};
+
+ uart0: serial@11006000 {
+ compatible = "mediatek,mt8127-uart","mediatek,mt6577-uart";
+ reg = <0 0x11002000 0 0x400>;
+ interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_LOW>;
+ clocks = <&uart_clk>;
+ };
+
+ uart1: serial@11007000 {
+ compatible = "mediatek,mt8127-uart","mediatek,mt6577-uart";
+ reg = <0 0x11003000 0 0x400>;
+ interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_LOW>;
+ clocks = <&uart_clk>;
+ };
+
+ uart2: serial@11008000 {
+ compatible = "mediatek,mt8127-uart","mediatek,mt6577-uart";
+ reg = <0 0x11004000 0 0x400>;
+ interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_LOW>;
+ clocks = <&uart_clk>;
+ };
+
+ uart3: serial@11009000 {
+ compatible = "mediatek,mt8127-uart","mediatek,mt6577-uart";
+ reg = <0 0x11005000 0 0x400>;
+ interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_LOW>;
+ clocks = <&uart_clk>;
+ };
};
};
diff --git a/arch/arm/boot/dts/mt8135.dtsi b/arch/arm/boot/dts/mt8135.dtsi
index 90a56ad..683b761 100644
--- a/arch/arm/boot/dts/mt8135.dtsi
+++ b/arch/arm/boot/dts/mt8135.dtsi
@@ -86,6 +86,13 @@
clock-frequency = <32000>;
#clock-cells = <0>;
};
+
+ uart_clk: dummy26m {
+ compatible = "fixed-clock";
+ clock-frequency = <26000000>;
+ #clock-cells = <0>;
+ };
+
};
soc {
@@ -111,5 +118,34 @@
<0 0x10214000 0 0x2000>,
<0 0x10216000 0 0x2000>;
};
+
+ uart0: serial@11006000 {
+ compatible = "mediatek,mt8135-uart","mediatek,mt6577-uart";
+ reg = <0 0x11006000 0 0x400>;
+ interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_LOW>;
+ clocks = <&uart_clk>;
+ };
+
+ uart1: serial@11007000 {
+ compatible = "mediatek,mt8135-uart","mediatek,mt6577-uart";
+ reg = <0 0x11007000 0 0x400>;
+ interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_LOW>;
+ clocks = <&uart_clk>;
+ };
+
+ uart2: serial@11008000 {
+ compatible = "mediatek,mt8135-uart","mediatek,mt6577-uart";
+ reg = <0 0x11008000 0 0x400>;
+ interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_LOW>;
+ clocks = <&uart_clk>;
+ };
+
+ uart3: serial@11009000 {
+ compatible = "mediatek,mt8135-uart","mediatek,mt6577-uart";
+ reg = <0 0x11009000 0 0x400>;
+ interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_LOW>;
+ clocks = <&uart_clk>;
+ };
+
};
};
--
1.8.1.1.dirty
^ permalink raw reply related [flat|nested] 8+ messages in thread* Re: [PATCH 2/3] ARM: mediatek: add UART dts for mt8127 and mt8135
2014-10-22 13:12 ` [PATCH 2/3] ARM: mediatek: add UART dts for mt8127 and mt8135 Eddie Huang
@ 2014-10-24 15:04 ` Matthias Brugger
[not found] ` <1413983529-21887-3-git-send-email-eddie.huang-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org>
1 sibling, 0 replies; 8+ messages in thread
From: Matthias Brugger @ 2014-10-24 15:04 UTC (permalink / raw)
To: Eddie Huang
Cc: Rob Herring, Greg Kroah-Hartman, Pawel Moll, Mark Rutland,
Ian Campbell, Kumar Gala, Russell King, Jiri Slaby, Alan Cox,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-serial, Yuhau Chen,
Hsien-Chun Yen, Nathan Chung, srv_heupstream, Sascha Hauer
2014-10-22 15:12 GMT+02:00 Eddie Huang <eddie.huang@mediatek.com>:
> This add dts support for mt8127 and mt8135 SOC UART
>
> Signed-off-by: Eddie Huang <eddie.huang@mediatek.com>
> ---
> arch/arm/boot/dts/mt8127.dtsi | 34 ++++++++++++++++++++++++++++++++++
> arch/arm/boot/dts/mt8135.dtsi | 36 ++++++++++++++++++++++++++++++++++++
> 2 files changed, 70 insertions(+)
>
> diff --git a/arch/arm/boot/dts/mt8127.dtsi b/arch/arm/boot/dts/mt8127.dtsi
> index 25c9f69..249c218 100644
> --- a/arch/arm/boot/dts/mt8127.dtsi
> +++ b/arch/arm/boot/dts/mt8127.dtsi
> @@ -64,6 +64,12 @@
> clock-frequency = <32000>;
> #clock-cells = <0>;
> };
> +
> + uart_clk: dummy26m {
> + compatible = "fixed-clock";
> + clock-frequency = <26000000>;
> + #clock-cells = <0>;
> + };
> };
>
> soc {
> @@ -89,5 +95,33 @@
> <0 0x10214000 0 0x2000>,
> <0 0x10216000 0 0x2000>;
> };
> +
> + uart0: serial@11006000 {
> + compatible = "mediatek,mt8127-uart","mediatek,mt6577-uart";
> + reg = <0 0x11002000 0 0x400>;
> + interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_LOW>;
As long as the interrupt polarity patches from Joe are not
merged,IRQ_TYPE_LEVEL_LOW triggers won't work as the GIC does not
support them.
> + clocks = <&uart_clk>;
> + };
> +
> + uart1: serial@11007000 {
> + compatible = "mediatek,mt8127-uart","mediatek,mt6577-uart";
> + reg = <0 0x11003000 0 0x400>;
> + interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_LOW>;
> + clocks = <&uart_clk>;
> + };
> +
> + uart2: serial@11008000 {
> + compatible = "mediatek,mt8127-uart","mediatek,mt6577-uart";
> + reg = <0 0x11004000 0 0x400>;
> + interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_LOW>;
> + clocks = <&uart_clk>;
> + };
> +
> + uart3: serial@11009000 {
> + compatible = "mediatek,mt8127-uart","mediatek,mt6577-uart";
> + reg = <0 0x11005000 0 0x400>;
> + interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_LOW>;
> + clocks = <&uart_clk>;
> + };
> };
> };
> diff --git a/arch/arm/boot/dts/mt8135.dtsi b/arch/arm/boot/dts/mt8135.dtsi
> index 90a56ad..683b761 100644
> --- a/arch/arm/boot/dts/mt8135.dtsi
> +++ b/arch/arm/boot/dts/mt8135.dtsi
> @@ -86,6 +86,13 @@
> clock-frequency = <32000>;
> #clock-cells = <0>;
> };
> +
> + uart_clk: dummy26m {
> + compatible = "fixed-clock";
> + clock-frequency = <26000000>;
> + #clock-cells = <0>;
> + };
> +
> };
>
> soc {
> @@ -111,5 +118,34 @@
> <0 0x10214000 0 0x2000>,
> <0 0x10216000 0 0x2000>;
> };
> +
> + uart0: serial@11006000 {
> + compatible = "mediatek,mt8135-uart","mediatek,mt6577-uart";
> + reg = <0 0x11006000 0 0x400>;
> + interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_LOW>;
> + clocks = <&uart_clk>;
> + };
> +
> + uart1: serial@11007000 {
> + compatible = "mediatek,mt8135-uart","mediatek,mt6577-uart";
> + reg = <0 0x11007000 0 0x400>;
> + interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_LOW>;
> + clocks = <&uart_clk>;
> + };
> +
> + uart2: serial@11008000 {
> + compatible = "mediatek,mt8135-uart","mediatek,mt6577-uart";
> + reg = <0 0x11008000 0 0x400>;
> + interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_LOW>;
> + clocks = <&uart_clk>;
> + };
> +
> + uart3: serial@11009000 {
> + compatible = "mediatek,mt8135-uart","mediatek,mt6577-uart";
> + reg = <0 0x11009000 0 0x400>;
> + interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_LOW>;
> + clocks = <&uart_clk>;
> + };
> +
> };
> };
> --
> 1.8.1.1.dirty
>
--
motzblog.wordpress.com
^ permalink raw reply [flat|nested] 8+ messages in thread[parent not found: <1413983529-21887-3-git-send-email-eddie.huang-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org>]
* Re: [PATCH 2/3] ARM: mediatek: add UART dts for mt8127 and mt8135
[not found] ` <1413983529-21887-3-git-send-email-eddie.huang-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org>
@ 2015-01-02 10:23 ` Matthias Brugger
2015-01-02 18:21 ` Matthias Brugger
0 siblings, 1 reply; 8+ messages in thread
From: Matthias Brugger @ 2015-01-02 10:23 UTC (permalink / raw)
To: Eddie Huang
Cc: Rob Herring, Greg Kroah-Hartman, Pawel Moll, Mark Rutland,
Ian Campbell, Kumar Gala, Russell King, Jiri Slaby, Alan Cox,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-serial-u79uwXL29TY76Z2rM5mHXA,
YH Chen (陳昱豪), HC Yen, Nathan Chung,
srv_heupstream, Sascha Hauer
2014-10-22 15:12 GMT+02:00 Eddie Huang <eddie.huang-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org>:
> This add dts support for mt8127 and mt8135 SOC UART
>
> Signed-off-by: Eddie Huang <eddie.huang-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org>
> ---
> arch/arm/boot/dts/mt8127.dtsi | 34 ++++++++++++++++++++++++++++++++++
> arch/arm/boot/dts/mt8135.dtsi | 36 ++++++++++++++++++++++++++++++++++++
> 2 files changed, 70 insertions(+)
>
> diff --git a/arch/arm/boot/dts/mt8127.dtsi b/arch/arm/boot/dts/mt8127.dtsi
> index 25c9f69..249c218 100644
> --- a/arch/arm/boot/dts/mt8127.dtsi
> +++ b/arch/arm/boot/dts/mt8127.dtsi
> @@ -64,6 +64,12 @@
> clock-frequency = <32000>;
> #clock-cells = <0>;
> };
> +
> + uart_clk: dummy26m {
> + compatible = "fixed-clock";
> + clock-frequency = <26000000>;
> + #clock-cells = <0>;
> + };
> };
>
> soc {
> @@ -89,5 +95,33 @@
> <0 0x10214000 0 0x2000>,
> <0 0x10216000 0 0x2000>;
> };
> +
> + uart0: serial@11006000 {
> + compatible = "mediatek,mt8127-uart","mediatek,mt6577-uart";
> + reg = <0 0x11002000 0 0x400>;
> + interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_LOW>;
> + clocks = <&uart_clk>;
> + };
> +
> + uart1: serial@11007000 {
> + compatible = "mediatek,mt8127-uart","mediatek,mt6577-uart";
> + reg = <0 0x11003000 0 0x400>;
> + interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_LOW>;
> + clocks = <&uart_clk>;
> + };
> +
> + uart2: serial@11008000 {
> + compatible = "mediatek,mt8127-uart","mediatek,mt6577-uart";
> + reg = <0 0x11004000 0 0x400>;
> + interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_LOW>;
> + clocks = <&uart_clk>;
> + };
> +
> + uart3: serial@11009000 {
> + compatible = "mediatek,mt8127-uart","mediatek,mt6577-uart";
> + reg = <0 0x11005000 0 0x400>;
> + interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_LOW>;
> + clocks = <&uart_clk>;
> + };
> };
> };
> diff --git a/arch/arm/boot/dts/mt8135.dtsi b/arch/arm/boot/dts/mt8135.dtsi
> index 90a56ad..683b761 100644
> --- a/arch/arm/boot/dts/mt8135.dtsi
> +++ b/arch/arm/boot/dts/mt8135.dtsi
> @@ -86,6 +86,13 @@
> clock-frequency = <32000>;
> #clock-cells = <0>;
> };
> +
> + uart_clk: dummy26m {
> + compatible = "fixed-clock";
> + clock-frequency = <26000000>;
> + #clock-cells = <0>;
> + };
> +
> };
>
> soc {
> @@ -111,5 +118,34 @@
> <0 0x10214000 0 0x2000>,
> <0 0x10216000 0 0x2000>;
> };
> +
> + uart0: serial@11006000 {
> + compatible = "mediatek,mt8135-uart","mediatek,mt6577-uart";
> + reg = <0 0x11006000 0 0x400>;
> + interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_LOW>;
> + clocks = <&uart_clk>;
> + };
> +
> + uart1: serial@11007000 {
> + compatible = "mediatek,mt8135-uart","mediatek,mt6577-uart";
> + reg = <0 0x11007000 0 0x400>;
> + interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_LOW>;
> + clocks = <&uart_clk>;
> + };
> +
> + uart2: serial@11008000 {
> + compatible = "mediatek,mt8135-uart","mediatek,mt6577-uart";
> + reg = <0 0x11008000 0 0x400>;
> + interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_LOW>;
> + clocks = <&uart_clk>;
> + };
> +
> + uart3: serial@11009000 {
> + compatible = "mediatek,mt8135-uart","mediatek,mt6577-uart";
> + reg = <0 0x11009000 0 0x400>;
> + interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_LOW>;
> + clocks = <&uart_clk>;
> + };
> +
> };
> };
> --
> 1.8.1.1.dirty
>
Applied to v3.20-next/dts, thanks.
--
motzblog.wordpress.com
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply [flat|nested] 8+ messages in thread* Re: [PATCH 2/3] ARM: mediatek: add UART dts for mt8127 and mt8135
2015-01-02 10:23 ` Matthias Brugger
@ 2015-01-02 18:21 ` Matthias Brugger
0 siblings, 0 replies; 8+ messages in thread
From: Matthias Brugger @ 2015-01-02 18:21 UTC (permalink / raw)
To: Eddie Huang
Cc: Rob Herring, Greg Kroah-Hartman, Pawel Moll, Mark Rutland,
Ian Campbell, Kumar Gala, Russell King, Jiri Slaby, Alan Cox,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-serial,
YH Chen (陳昱豪), HC Yen, Nathan Chung,
srv_heupstream, Sascha Hauer
2015-01-02 11:23 GMT+01:00 Matthias Brugger <matthias.bgg@gmail.com>:
> 2014-10-22 15:12 GMT+02:00 Eddie Huang <eddie.huang@mediatek.com>:
>> This add dts support for mt8127 and mt8135 SOC UART
>>
>> Signed-off-by: Eddie Huang <eddie.huang@mediatek.com>
>> ---
>> arch/arm/boot/dts/mt8127.dtsi | 34 ++++++++++++++++++++++++++++++++++
>> arch/arm/boot/dts/mt8135.dtsi | 36 ++++++++++++++++++++++++++++++++++++
>> 2 files changed, 70 insertions(+)
>>
>> diff --git a/arch/arm/boot/dts/mt8127.dtsi b/arch/arm/boot/dts/mt8127.dtsi
>> index 25c9f69..249c218 100644
>> --- a/arch/arm/boot/dts/mt8127.dtsi
>> +++ b/arch/arm/boot/dts/mt8127.dtsi
>> @@ -64,6 +64,12 @@
>> clock-frequency = <32000>;
>> #clock-cells = <0>;
>> };
>> +
>> + uart_clk: dummy26m {
>> + compatible = "fixed-clock";
>> + clock-frequency = <26000000>;
>> + #clock-cells = <0>;
>> + };
>> };
>>
>> soc {
>> @@ -89,5 +95,33 @@
>> <0 0x10214000 0 0x2000>,
>> <0 0x10216000 0 0x2000>;
>> };
>> +
>> + uart0: serial@11006000 {
>> + compatible = "mediatek,mt8127-uart","mediatek,mt6577-uart";
>> + reg = <0 0x11002000 0 0x400>;
>> + interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_LOW>;
>> + clocks = <&uart_clk>;
>> + };
I just realized that you forgot to disable the uart ports by default
in the dtsi.
I fixed that for you, but please send a patch enabling the necessary
ports in the board dts file.
It depends on the board which uarts will be enabled rather then on the SoC.
>> +
>> + uart1: serial@11007000 {
>> + compatible = "mediatek,mt8127-uart","mediatek,mt6577-uart";
>> + reg = <0 0x11003000 0 0x400>;
>> + interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_LOW>;
>> + clocks = <&uart_clk>;
>> + };
>> +
>> + uart2: serial@11008000 {
>> + compatible = "mediatek,mt8127-uart","mediatek,mt6577-uart";
>> + reg = <0 0x11004000 0 0x400>;
>> + interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_LOW>;
>> + clocks = <&uart_clk>;
>> + };
>> +
>> + uart3: serial@11009000 {
>> + compatible = "mediatek,mt8127-uart","mediatek,mt6577-uart";
>> + reg = <0 0x11005000 0 0x400>;
>> + interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_LOW>;
>> + clocks = <&uart_clk>;
>> + };
>> };
>> };
>> diff --git a/arch/arm/boot/dts/mt8135.dtsi b/arch/arm/boot/dts/mt8135.dtsi
>> index 90a56ad..683b761 100644
>> --- a/arch/arm/boot/dts/mt8135.dtsi
>> +++ b/arch/arm/boot/dts/mt8135.dtsi
>> @@ -86,6 +86,13 @@
>> clock-frequency = <32000>;
>> #clock-cells = <0>;
>> };
>> +
>> + uart_clk: dummy26m {
>> + compatible = "fixed-clock";
>> + clock-frequency = <26000000>;
>> + #clock-cells = <0>;
>> + };
>> +
>> };
>>
>> soc {
>> @@ -111,5 +118,34 @@
>> <0 0x10214000 0 0x2000>,
>> <0 0x10216000 0 0x2000>;
>> };
>> +
>> + uart0: serial@11006000 {
>> + compatible = "mediatek,mt8135-uart","mediatek,mt6577-uart";
>> + reg = <0 0x11006000 0 0x400>;
>> + interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_LOW>;
>> + clocks = <&uart_clk>;
>> + };
>> +
>> + uart1: serial@11007000 {
>> + compatible = "mediatek,mt8135-uart","mediatek,mt6577-uart";
>> + reg = <0 0x11007000 0 0x400>;
>> + interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_LOW>;
>> + clocks = <&uart_clk>;
>> + };
>> +
>> + uart2: serial@11008000 {
>> + compatible = "mediatek,mt8135-uart","mediatek,mt6577-uart";
>> + reg = <0 0x11008000 0 0x400>;
>> + interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_LOW>;
>> + clocks = <&uart_clk>;
>> + };
>> +
>> + uart3: serial@11009000 {
>> + compatible = "mediatek,mt8135-uart","mediatek,mt6577-uart";
>> + reg = <0 0x11009000 0 0x400>;
>> + interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_LOW>;
>> + clocks = <&uart_clk>;
>> + };
>> +
>> };
>> };
>> --
>> 1.8.1.1.dirty
>>
>
> Applied to v3.20-next/dts, thanks.
>
> --
> motzblog.wordpress.com
--
motzblog.wordpress.com
^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH 3/3] DTS: serial: Add bindings document for the Mediatek UARTs
2014-10-22 13:12 [PATCH 0/3] tty: serial: Add mediatek MT8127 and MT8135 UART support Eddie Huang
2014-10-22 13:12 ` [PATCH 1/3] tty: serial: Fix mediatek UART driver setting baudrate issue Eddie Huang
2014-10-22 13:12 ` [PATCH 2/3] ARM: mediatek: add UART dts for mt8127 and mt8135 Eddie Huang
@ 2014-10-22 13:12 ` Eddie Huang
[not found] ` <1413983529-21887-4-git-send-email-eddie.huang-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org>
2 siblings, 1 reply; 8+ messages in thread
From: Eddie Huang @ 2014-10-22 13:12 UTC (permalink / raw)
To: Rob Herring, Matthias Brugger, Greg Kroah-Hartman
Cc: Mark Rutland, devicetree, Russell King, srv_heupstream,
Pawel Moll, Ian Campbell, hc.yen, yh.chen, linux-kernel,
nathan.chung, linux-serial, Kumar Gala, Eddie Huang, Jiri Slaby,
Sascha Hauer, linux-arm-kernel, Alan Cox
This patch add s devicetree document for Mediatek UART.
Signed-off-by: Eddie Huang <eddie.huang@mediatek.com>
---
Documentation/devicetree/bindings/serial/mtk-uart.txt | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/serial/mtk-uart.txt b/Documentation/devicetree/bindings/serial/mtk-uart.txt
index 48358a3..0eebbfe 100644
--- a/Documentation/devicetree/bindings/serial/mtk-uart.txt
+++ b/Documentation/devicetree/bindings/serial/mtk-uart.txt
@@ -2,6 +2,8 @@
Required properties:
- compatible should contain:
+ * "mediatek,mt8135-uart" for MT8135 compatible UARTS
+ * "mediatek,mt8127-uart" for MT8127 compatible UARTS
* "mediatek,mt6589-uart" for MT6589 compatible UARTS
* "mediatek,mt6582-uart" for MT6582 compatible UARTS
* "mediatek,mt6577-uart" for all compatible UARTS (MT6589, MT6582, MT6577)
--
1.8.1.1.dirty
^ permalink raw reply related [flat|nested] 8+ messages in thread