From: Jon Mason <jon.mason@broadcom.com>
To: "Rafał Miłecki" <zajec5@gmail.com>
Cc: Hauke Mehrtens <hauke@hauke-m.de>,
Rob Herring <robh+dt@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
Florian Fainelli <f.fainelli@gmail.com>,
"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
<devicetree@vger.kernel.org>,
linux-arm-kernel <linux-arm-kernel@lists.infradead.org>,
open list <linux-kernel@vger.kernel.org>,
BCM Kernel Feedback <bcm-kernel-feedback-list@broadcom.com>,
Jon Mason <jonmason@broadcom.com>
Subject: Re: [PATCH 1/2] ARM: dts: bcm5301x: Add TWD WD Support to DT
Date: Thu, 2 Mar 2017 14:00:45 -0500 [thread overview]
Message-ID: <CAC3K-4pg0TLF-1CV+NtgEh7a0-EHQBvxjNbbGJB32WsNa0U0wA@mail.gmail.com> (raw)
In-Reply-To: <de705b40-1a8a-faef-846e-3635682671f6@gmail.com>
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On Thu, Mar 2, 2017 at 1:54 PM, Rafał Miłecki <zajec5@gmail.com> wrote:
> On 02/28/2017 09:31 PM, Jon Mason wrote:
>
>> From: Jon Mason <jonmason@broadcom.com>
>>
>> Add support for the ARM TWD Watchdog to the bcm5301x device tree. The
>> ARM TWD timer allocated the register space for the WDT, so this patch
>> necessitated shrinking that. Also, the GIC masks were added for these.
>>
>> Signed-off-by: Jon Mason <jonmason@broadcom.com>
>> ---
>> arch/arm/boot/dts/bcm5301x.dtsi | 15 ++++++++++++---
>> 1 file changed, 12 insertions(+), 3 deletions(-)
>>
>> diff --git a/arch/arm/boot/dts/bcm5301x.dtsi
>> b/arch/arm/boot/dts/bcm5301x.dtsi
>> index 4fbb089..3fbc450 100644
>> --- a/arch/arm/boot/dts/bcm5301x.dtsi
>> +++ b/arch/arm/boot/dts/bcm5301x.dtsi
>> @@ -70,10 +70,19 @@
>> clocks = <&periph_clk>;
>> };
>>
>> - local-timer@20600 {
>> + timer@20600 {
>> compatible = "arm,cortex-a9-twd-timer";
>> - reg = <0x20600 0x100>;
>> - interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>;
>> + reg = <0x20600 0x20>;
>> + interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) |
>> + IRQ_TYPE_LEVEL_HIGH)>;
>> + clocks = <&periph_clk>;
>> + };
>>
>
> If you follow my recent e-mail thread:
> BCM5301X: GIC: PPI11 is secure or misconfigured (same for PPI13)
> you'll see IRQ_TYPE_LEVEL_HIGH type isn't correct. It should be
> IRQ_TYPE_EDGE_RISING.
>
> I believe patch switching to IRQ_TYPE_EDGE_RISING should be sent with Cc
> stable
> for kernels 4.8+.
>
> The same change is needed for "arm,cortex-a9-global-timer".
>
> Would you find time to revise this patch?
>
I'll do 2 patches. One to revise this one and one to address the issue
you've discovered. Will that be okay for you?
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next prev parent reply other threads:[~2017-03-02 19:00 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-02-28 20:31 [PATCH 0/2] ARM: dts: bcm5301x: Add TWD and I2C Jon Mason
2017-02-28 20:31 ` [PATCH 1/2] ARM: dts: bcm5301x: Add TWD WD Support to DT Jon Mason
2017-02-28 20:43 ` Rafał Miłecki
2017-02-28 20:46 ` Jon Mason
2017-02-28 20:48 ` Rafał Miłecki
2017-03-02 18:54 ` Rafał Miłecki
2017-03-02 19:00 ` Jon Mason [this message]
[not found] ` <CAC3K-4pg0TLF-1CV+NtgEh7a0-EHQBvxjNbbGJB32WsNa0U0wA-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2017-03-02 19:19 ` Rafał Miłecki
2017-02-28 20:31 ` [PATCH 2/2] ARM: dts: bcm5301x: Add I2C support to the DT Jon Mason
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