[PATCH 1/5] dt-bindings: pinctrl: Add st, stm32f769-pinctrl compatible to stm32-pinctrl

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* [PATCH 1/5] dt-bindings: pinctrl: Add st, stm32f769-pinctrl compatible to stm32-pinctrl
@ 2017-12-11  8:54 Alexandre Torgue
  2017-12-11  8:54 ` [PATCH 3/5] ARM: mach-stm32: Kconfig: introduce MACH_STM32F769 flag Alexandre Torgue
                   ` (2 more replies)
  0 siblings, 3 replies; 10+ messages in thread
From: Alexandre Torgue @ 2017-12-11  8:54 UTC (permalink / raw)
  To: Maxime Coquelin, Linus Walleij, Rob Herring, Mark Rutland,
	Jonathan Corbet, Russell King
  Cc: devicetree, linux-kernel, linux-arm-kernel

Add new compatible for stm32f769 MCU.

Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>

diff --git a/Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.txt
index 58c2a4c..fd7a4c7 100644
--- a/Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.txt
+++ b/Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.txt
@@ -11,6 +11,7 @@ Required properies:
    "st,stm32f429-pinctrl"
    "st,stm32f469-pinctrl"
    "st,stm32f746-pinctrl"
+   "st,stm32f769-pinctrl"
    "st,stm32h743-pinctrl"
  - #address-cells: The value of this property must be 1
  - #size-cells	: The value of this property must be 1
-- 
2.7.4

^ permalink raw reply related	[flat|nested] 10+ messages in thread

* [PATCH 3/5] ARM: mach-stm32: Kconfig: introduce MACH_STM32F769 flag
  2017-12-11  8:54 [PATCH 1/5] dt-bindings: pinctrl: Add st, stm32f769-pinctrl compatible to stm32-pinctrl Alexandre Torgue
@ 2017-12-11  8:54 ` Alexandre Torgue
  2017-12-11  8:54 ` [PATCH 4/5] ARM: mach-stm32: add new STM32F769 MCU Alexandre Torgue
       [not found] ` <1512982475-32661-2-git-send-email-alexandre.torgue-qxv4g6HH51o@public.gmane.org>
  2 siblings, 0 replies; 10+ messages in thread
From: Alexandre Torgue @ 2017-12-11  8:54 UTC (permalink / raw)
  To: Maxime Coquelin, Linus Walleij, Rob Herring, Mark Rutland,
	Jonathan Corbet, Russell King
  Cc: linux-arm-kernel, devicetree, linux-kernel

This patch introduces the MACH_STM32F769 to make possible to only select
STM32F769 pinctrl driver.

By default, all the MACH_STM32Fxxx flags will be set with STM32 defconfig.

Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>

diff --git a/arch/arm/mach-stm32/Kconfig b/arch/arm/mach-stm32/Kconfig
index 0d1889b..33b07db3 100644
--- a/arch/arm/mach-stm32/Kconfig
+++ b/arch/arm/mach-stm32/Kconfig
@@ -25,6 +25,11 @@ config MACH_STM32F746
 	depends on ARCH_STM32
 	default y
 
+config MACH_STM32F769
+	bool "STMicroelectronics STM32F769"
+	depends on ARCH_STM32
+	default y
+
 config MACH_STM32H743
 	bool "STMicrolectronics STM32H743"
 	depends on ARCH_STM32
-- 
2.7.4

^ permalink raw reply related	[flat|nested] 10+ messages in thread

* [PATCH 4/5] ARM: mach-stm32: add new STM32F769 MCU
  2017-12-11  8:54 [PATCH 1/5] dt-bindings: pinctrl: Add st, stm32f769-pinctrl compatible to stm32-pinctrl Alexandre Torgue
  2017-12-11  8:54 ` [PATCH 3/5] ARM: mach-stm32: Kconfig: introduce MACH_STM32F769 flag Alexandre Torgue
@ 2017-12-11  8:54 ` Alexandre Torgue
       [not found] ` <1512982475-32661-2-git-send-email-alexandre.torgue-qxv4g6HH51o@public.gmane.org>
  2 siblings, 0 replies; 10+ messages in thread
From: Alexandre Torgue @ 2017-12-11  8:54 UTC (permalink / raw)
  To: Maxime Coquelin, Linus Walleij, Rob Herring, Mark Rutland,
	Jonathan Corbet, Russell King
  Cc: linux-arm-kernel, devicetree, linux-kernel

Add new st,stm32f769 compatible machine name for STM32F769 MCU and update
documentation.

Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>

diff --git a/Documentation/arm/stm32/stm32f769-overview.txt b/Documentation/arm/stm32/stm32f769-overview.txt
new file mode 100644
index 0000000..9ab7e60
--- /dev/null
+++ b/Documentation/arm/stm32/stm32f769-overview.txt
@@ -0,0 +1,36 @@
+			STM32F769 Overview
+			==================
+
+  Introduction
+  ------------
+	The STM32F769 is a Cortex-M7 MCU aimed at various applications.
+	It features:
+	- Cortex-M7 core running up to @216MHz
+	- 2MB internal flash, 512KBytes internal RAM (+4KB of backup SRAM)
+	- FMC controller to connect SDRAM, NOR and NAND memories
+	- Dual mode QSPI
+	- SD/MMC/SDIO support*2
+	- Ethernet controller
+	- USB OTFG FS & HS controllers
+	- I2C*4, SPI*6, CAN*3 busses support
+	- Several 16 & 32 bits general purpose timers
+	- Serial Audio interface *2
+	- LCD controller
+	- HDMI-CEC
+	- DSI
+	- SPDIFRX
+	- MDIO salave interface
+
+  Resources
+  ---------
+	Datasheet and reference manual are publicly available on ST website:
+	- http://www.st.com/content/st_com/en/products/microcontrollers/stm32-32-bit-arm-cortex-mcus/stm32-high-performance-mcus/stm32f7-series/stm32f7x9/stm32f769ni.html
+
+  Document Author
+  ---------------
+	Alexandre Torgue <alexandre.torgue@st.com>
+
+
+
+
+
diff --git a/arch/arm/mach-stm32/board-dt.c b/arch/arm/mach-stm32/board-dt.c
index e918686..4824632 100644
--- a/arch/arm/mach-stm32/board-dt.c
+++ b/arch/arm/mach-stm32/board-dt.c
@@ -12,6 +12,7 @@ static const char *const stm32_compat[] __initconst = {
 	"st,stm32f429",
 	"st,stm32f469",
 	"st,stm32f746",
+	"st,stm32f769",
 	"st,stm32h743",
 	NULL
 };
-- 
2.7.4

^ permalink raw reply related	[flat|nested] 10+ messages in thread

[parent not found: <1512982475-32661-2-git-send-email-alexandre.torgue-qxv4g6HH51o@public.gmane.org>]

* [PATCH 2/5] pinctrl: stm32: add STM32F769 MCU support
       [not found] ` <1512982475-32661-2-git-send-email-alexandre.torgue-qxv4g6HH51o@public.gmane.org>
@ 2017-12-11  8:54   ` Alexandre Torgue
  2018-01-18 14:05     ` Patrice CHOTARD
  2018-01-22  8:25     ` Linus Walleij
  2017-12-11  8:54   ` [PATCH 5/5] ARM: dts: stm32: use dedicated files for pinctrl on stm32f7 family Alexandre Torgue
  2017-12-15 21:47   ` [PATCH 1/5] dt-bindings: pinctrl: Add st,stm32f769-pinctrl compatible to stm32-pinctrl Rob Herring
  2 siblings, 2 replies; 10+ messages in thread
From: Alexandre Torgue @ 2017-12-11  8:54 UTC (permalink / raw)
  To: Maxime Coquelin, Linus Walleij, Rob Herring, Mark Rutland,
	Jonathan Corbet, Russell King
  Cc: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
	devicetree-u79uwXL29TY76Z2rM5mHXA,
	linux-kernel-u79uwXL29TY76Z2rM5mHXA

This patch which adds STM32F769 pinctrl and GPIO support, relies on the
generic STM32 pinctrl driver.

Signed-off-by: Alexandre Torgue <alexandre.torgue-qxv4g6HH51o@public.gmane.org>

diff --git a/drivers/pinctrl/stm32/Kconfig b/drivers/pinctrl/stm32/Kconfig
index 7e1fe39..397f8c1 100644
--- a/drivers/pinctrl/stm32/Kconfig
+++ b/drivers/pinctrl/stm32/Kconfig
@@ -27,6 +27,12 @@ config PINCTRL_STM32F746
 	default MACH_STM32F746
 	select PINCTRL_STM32
 
+config PINCTRL_STM32F769
+	bool "STMicroelectronics STM32F769 pin control" if COMPILE_TEST && !MACH_STM32F769
+	depends on OF
+	default MACH_STM32F769
+	select PINCTRL_STM32
+
 config PINCTRL_STM32H743
 	bool "STMicroelectronics STM32H743 pin control" if COMPILE_TEST && !MACH_STM32H743
 	depends on OF
diff --git a/drivers/pinctrl/stm32/Makefile b/drivers/pinctrl/stm32/Makefile
index d13ca35..7d63e4a 100644
--- a/drivers/pinctrl/stm32/Makefile
+++ b/drivers/pinctrl/stm32/Makefile
@@ -6,4 +6,5 @@ obj-$(CONFIG_PINCTRL_STM32) += pinctrl-stm32.o
 obj-$(CONFIG_PINCTRL_STM32F429)	+= pinctrl-stm32f429.o
 obj-$(CONFIG_PINCTRL_STM32F469)	+= pinctrl-stm32f469.o
 obj-$(CONFIG_PINCTRL_STM32F746)	+= pinctrl-stm32f746.o
+obj-$(CONFIG_PINCTRL_STM32F769)	+= pinctrl-stm32f769.o
 obj-$(CONFIG_PINCTRL_STM32H743)	+= pinctrl-stm32h743.o
diff --git a/drivers/pinctrl/stm32/pinctrl-stm32f769.c b/drivers/pinctrl/stm32/pinctrl-stm32f769.c
new file mode 100644
index 0000000..f81c51c
--- /dev/null
+++ b/drivers/pinctrl/stm32/pinctrl-stm32f769.c
@@ -0,0 +1,1827 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) STMicroelectronics 2017
+ * Author:  Alexandre Torgue <alexandre.torgue-qxv4g6HH51o@public.gmane.org> for STMicroelectronics.
+ */
+#include <linux/init.h>
+#include <linux/of.h>
+#include <linux/platform_device.h>
+
+#include "pinctrl-stm32.h"
+
+static const struct stm32_desc_pin stm32f769_pins[] = {
+	STM32_PIN(
+		PINCTRL_PIN(0, "PA0"),
+		STM32_FUNCTION(0, "GPIOA0"),
+		STM32_FUNCTION(2, "TIM2_CH1 TIM2_ETR"),
+		STM32_FUNCTION(3, "TIM5_CH1"),
+		STM32_FUNCTION(4, "TIM8_ETR"),
+		STM32_FUNCTION(8, "USART2_CTS"),
+		STM32_FUNCTION(9, "UART4_TX"),
+		STM32_FUNCTION(11, "SAI2_SD_B"),
+		STM32_FUNCTION(12, "ETH_MII_CRS"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(1, "PA1"),
+		STM32_FUNCTION(0, "GPIOA1"),
+		STM32_FUNCTION(2, "TIM2_CH2"),
+		STM32_FUNCTION(3, "TIM5_CH2"),
+		STM32_FUNCTION(8, "USART2_RTS"),
+		STM32_FUNCTION(9, "UART4_RX"),
+		STM32_FUNCTION(10, "QUADSPI_BK1_IO3"),
+		STM32_FUNCTION(11, "SAI2_MCLK_B"),
+		STM32_FUNCTION(12, "ETH_MII_RX_CLK ETH_RMII_REF_CLK"),
+		STM32_FUNCTION(15, "LCD_R2"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(2, "PA2"),
+		STM32_FUNCTION(0, "GPIOA2"),
+		STM32_FUNCTION(2, "TIM2_CH3"),
+		STM32_FUNCTION(3, "TIM5_CH3"),
+		STM32_FUNCTION(4, "TIM9_CH1"),
+		STM32_FUNCTION(8, "USART2_TX"),
+		STM32_FUNCTION(9, "SAI2_SCK_B"),
+		STM32_FUNCTION(12, "ETH_MDIO"),
+		STM32_FUNCTION(13, "MDIOS_MDIO"),
+		STM32_FUNCTION(15, "LCD_R1"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(3, "PA3"),
+		STM32_FUNCTION(0, "GPIOA3"),
+		STM32_FUNCTION(2, "TIM2_CH4"),
+		STM32_FUNCTION(3, "TIM5_CH4"),
+		STM32_FUNCTION(4, "TIM9_CH2"),
+		STM32_FUNCTION(8, "USART2_RX"),
+		STM32_FUNCTION(10, "LCD_B2"),
+		STM32_FUNCTION(11, "OTG_HS_ULPI_D0"),
+		STM32_FUNCTION(12, "ETH_MII_COL"),
+		STM32_FUNCTION(15, "LCD_B5"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(4, "PA4"),
+		STM32_FUNCTION(0, "GPIOA4"),
+		STM32_FUNCTION(6, "SPI1_NSS I2S1_WS"),
+		STM32_FUNCTION(7, "SPI3_NSS I2S3_WS"),
+		STM32_FUNCTION(8, "USART2_CK"),
+		STM32_FUNCTION(9, "SPI6_NSS"),
+		STM32_FUNCTION(13, "OTG_HS_SOF"),
+		STM32_FUNCTION(14, "DCMI_HSYNC"),
+		STM32_FUNCTION(15, "LCD_VSYNC"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(5, "PA5"),
+		STM32_FUNCTION(0, "GPIOA5"),
+		STM32_FUNCTION(2, "TIM2_CH1 TIM2_ETR"),
+		STM32_FUNCTION(4, "TIM8_CH1N"),
+		STM32_FUNCTION(6, "SPI1_SCK I2S1_CK"),
+		STM32_FUNCTION(9, "SPI6_SCK"),
+		STM32_FUNCTION(11, "OTG_HS_ULPI_CK"),
+		STM32_FUNCTION(15, "LCD_R4"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(6, "PA6"),
+		STM32_FUNCTION(0, "GPIOA6"),
+		STM32_FUNCTION(2, "TIM1_BKIN"),
+		STM32_FUNCTION(3, "TIM3_CH1"),
+		STM32_FUNCTION(4, "TIM8_BKIN"),
+		STM32_FUNCTION(6, "SPI1_MISO"),
+		STM32_FUNCTION(9, "SPI6_MISO"),
+		STM32_FUNCTION(10, "TIM13_CH1"),
+		STM32_FUNCTION(13, "MDIOS_MDC"),
+		STM32_FUNCTION(14, "DCMI_PIXCLK"),
+		STM32_FUNCTION(15, "LCD_G2"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(7, "PA7"),
+		STM32_FUNCTION(0, "GPIOA7"),
+		STM32_FUNCTION(2, "TIM1_CH1N"),
+		STM32_FUNCTION(3, "TIM3_CH2"),
+		STM32_FUNCTION(4, "TIM8_CH1N"),
+		STM32_FUNCTION(6, "SPI1_MOSI I2S1_SD"),
+		STM32_FUNCTION(9, "SPI6_MOSI"),
+		STM32_FUNCTION(10, "TIM14_CH1"),
+		STM32_FUNCTION(12, "ETH_MII_RX_DV ETH_RMII_CRS_DV"),
+		STM32_FUNCTION(13, "FMC_SDNWE"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(8, "PA8"),
+		STM32_FUNCTION(0, "GPIOA8"),
+		STM32_FUNCTION(1, "MCO1"),
+		STM32_FUNCTION(2, "TIM1_CH1"),
+		STM32_FUNCTION(4, "TIM8_BKIN2"),
+		STM32_FUNCTION(5, "I2C3_SCL"),
+		STM32_FUNCTION(8, "USART1_CK"),
+		STM32_FUNCTION(11, "OTG_FS_SOF"),
+		STM32_FUNCTION(12, "CAN3_RX"),
+		STM32_FUNCTION(13, "UART7_RX"),
+		STM32_FUNCTION(14, "LCD_B3"),
+		STM32_FUNCTION(15, "LCD_R6"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(9, "PA9"),
+		STM32_FUNCTION(0, "GPIOA9"),
+		STM32_FUNCTION(2, "TIM1_CH2"),
+		STM32_FUNCTION(5, "I2C3_SMBA"),
+		STM32_FUNCTION(6, "SPI2_SCK I2S2_CK"),
+		STM32_FUNCTION(8, "USART1_TX"),
+		STM32_FUNCTION(14, "DCMI_D0"),
+		STM32_FUNCTION(15, "LCD_R5"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(10, "PA10"),
+		STM32_FUNCTION(0, "GPIOA10"),
+		STM32_FUNCTION(2, "TIM1_CH3"),
+		STM32_FUNCTION(8, "USART1_RX"),
+		STM32_FUNCTION(10, "LCD_B4"),
+		STM32_FUNCTION(11, "OTG_FS_ID"),
+		STM32_FUNCTION(13, "MDIOS_MDIO"),
+		STM32_FUNCTION(14, "DCMI_D1"),
+		STM32_FUNCTION(15, "LCD_B1"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(11, "PA11"),
+		STM32_FUNCTION(0, "GPIOA11"),
+		STM32_FUNCTION(2, "TIM1_CH4"),
+		STM32_FUNCTION(6, "SPI2_NSS I2S2_WS"),
+		STM32_FUNCTION(7, "UART4_RX"),
+		STM32_FUNCTION(8, "USART1_CTS"),
+		STM32_FUNCTION(10, "CAN1_RX"),
+		STM32_FUNCTION(11, "OTG_FS_DM"),
+		STM32_FUNCTION(15, "LCD_R4"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(12, "PA12"),
+		STM32_FUNCTION(0, "GPIOA12"),
+		STM32_FUNCTION(2, "TIM1_ETR"),
+		STM32_FUNCTION(6, "SPI2_SCK I2S2_CK"),
+		STM32_FUNCTION(7, "UART4_TX"),
+		STM32_FUNCTION(8, "USART1_RTS"),
+		STM32_FUNCTION(9, "SAI2_FS_B"),
+		STM32_FUNCTION(10, "CAN1_TX"),
+		STM32_FUNCTION(11, "OTG_FS_DP"),
+		STM32_FUNCTION(15, "LCD_R5"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(13, "PA13"),
+		STM32_FUNCTION(0, "GPIOA13"),
+		STM32_FUNCTION(1, "JTMS SWDIO"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(14, "PA14"),
+		STM32_FUNCTION(0, "GPIOA14"),
+		STM32_FUNCTION(1, "JTCK SWCLK"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(15, "PA15"),
+		STM32_FUNCTION(0, "GPIOA15"),
+		STM32_FUNCTION(1, "JTDI"),
+		STM32_FUNCTION(2, "TIM2_CH1 TIM2_ETR"),
+		STM32_FUNCTION(5, "HDMI_CEC"),
+		STM32_FUNCTION(6, "SPI1_NSS I2S1_WS"),
+		STM32_FUNCTION(7, "SPI3_NSS I2S3_WS"),
+		STM32_FUNCTION(8, "SPI6_NSS"),
+		STM32_FUNCTION(9, "UART4_RTS"),
+		STM32_FUNCTION(12, "CAN3_TX"),
+		STM32_FUNCTION(13, "UART7_TX"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(16, "PB0"),
+		STM32_FUNCTION(0, "GPIOB0"),
+		STM32_FUNCTION(2, "TIM1_CH2N"),
+		STM32_FUNCTION(3, "TIM3_CH3"),
+		STM32_FUNCTION(4, "TIM8_CH2N"),
+		STM32_FUNCTION(7, "DFSDM_CKOUT"),
+		STM32_FUNCTION(9, "UART4_CTS"),
+		STM32_FUNCTION(10, "LCD_R3"),
+		STM32_FUNCTION(11, "OTG_HS_ULPI_D1"),
+		STM32_FUNCTION(12, "ETH_MII_RXD2"),
+		STM32_FUNCTION(15, "LCD_G1"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(17, "PB1"),
+		STM32_FUNCTION(0, "GPIOB1"),
+		STM32_FUNCTION(2, "TIM1_CH3N"),
+		STM32_FUNCTION(3, "TIM3_CH4"),
+		STM32_FUNCTION(4, "TIM8_CH3N"),
+		STM32_FUNCTION(7, "DFSDM_DATIN1"),
+		STM32_FUNCTION(10, "LCD_R6"),
+		STM32_FUNCTION(11, "OTG_HS_ULPI_D2"),
+		STM32_FUNCTION(12, "ETH_MII_RXD3"),
+		STM32_FUNCTION(15, "LCD_G0"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(18, "PB2"),
+		STM32_FUNCTION(0, "GPIOB2"),
+		STM32_FUNCTION(7, "SAI1_SD_A"),
+		STM32_FUNCTION(8, "SPI3_MOSI I2S3_SD"),
+		STM32_FUNCTION(10, "QUADSPI_CLK"),
+		STM32_FUNCTION(11, "DFSDM_CKIN1"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(19, "PB3"),
+		STM32_FUNCTION(0, "GPIOB3"),
+		STM32_FUNCTION(1, "JTDO TRACESWO"),
+		STM32_FUNCTION(2, "TIM2_CH2"),
+		STM32_FUNCTION(6, "SPI1_SCK I2S1_CK"),
+		STM32_FUNCTION(7, "SPI3_SCK I2S3_CK"),
+		STM32_FUNCTION(9, "SPI6_SCK"),
+		STM32_FUNCTION(11, "SDMMC2_D2"),
+		STM32_FUNCTION(12, "CAN3_RX"),
+		STM32_FUNCTION(13, "UART7_RX"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(20, "PB4"),
+		STM32_FUNCTION(0, "GPIOB4"),
+		STM32_FUNCTION(1, "NJTRST"),
+		STM32_FUNCTION(3, "TIM3_CH1"),
+		STM32_FUNCTION(6, "SPI1_MISO"),
+		STM32_FUNCTION(7, "SPI3_MISO"),
+		STM32_FUNCTION(8, "SPI2_NSS I2S2_WS"),
+		STM32_FUNCTION(9, "SPI6_MISO"),
+		STM32_FUNCTION(11, "SDMMC2_D3"),
+		STM32_FUNCTION(12, "CAN3_TX"),
+		STM32_FUNCTION(13, "UART7_TX"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(21, "PB5"),
+		STM32_FUNCTION(0, "GPIOB5"),
+		STM32_FUNCTION(2, "UART5_RX"),
+		STM32_FUNCTION(3, "TIM3_CH2"),
+		STM32_FUNCTION(5, "I2C1_SMBA"),
+		STM32_FUNCTION(6, "SPI1_MOSI I2S1_SD"),
+		STM32_FUNCTION(7, "SPI3_MOSI I2S3_SD"),
+		STM32_FUNCTION(9, "SPI6_MOSI"),
+		STM32_FUNCTION(10, "CAN2_RX"),
+		STM32_FUNCTION(11, "OTG_HS_ULPI_D7"),
+		STM32_FUNCTION(12, "ETH_PPS_OUT"),
+		STM32_FUNCTION(13, "FMC_SDCKE1"),
+		STM32_FUNCTION(14, "DCMI_D10"),
+		STM32_FUNCTION(15, "LCD_G7"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(22, "PB6"),
+		STM32_FUNCTION(0, "GPIOB6"),
+		STM32_FUNCTION(2, "UART5_TX"),
+		STM32_FUNCTION(3, "TIM4_CH1"),
+		STM32_FUNCTION(4, "HDMI_CEC"),
+		STM32_FUNCTION(5, "I2C1_SCL"),
+		STM32_FUNCTION(7, "DFSDM_DATIN5"),
+		STM32_FUNCTION(8, "USART1_TX"),
+		STM32_FUNCTION(10, "CAN2_TX"),
+		STM32_FUNCTION(11, "QUADSPI_BK1_NCS"),
+		STM32_FUNCTION(12, "I2C4_SCL"),
+		STM32_FUNCTION(13, "FMC_SDNE1"),
+		STM32_FUNCTION(14, "DCMI_D5"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(23, "PB7"),
+		STM32_FUNCTION(0, "GPIOB7"),
+		STM32_FUNCTION(3, "TIM4_CH2"),
+		STM32_FUNCTION(5, "I2C1_SDA"),
+		STM32_FUNCTION(7, "DFSDM_CKIN5"),
+		STM32_FUNCTION(8, "USART1_RX"),
+		STM32_FUNCTION(12, "I2C4_SDA"),
+		STM32_FUNCTION(13, "FMC_NL"),
+		STM32_FUNCTION(14, "DCMI_VSYNC"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(24, "PB8"),
+		STM32_FUNCTION(0, "GPIOB8"),
+		STM32_FUNCTION(2, "I2C4_SCL"),
+		STM32_FUNCTION(3, "TIM4_CH3"),
+		STM32_FUNCTION(4, "TIM10_CH1"),
+		STM32_FUNCTION(5, "I2C1_SCL"),
+		STM32_FUNCTION(7, "DFSDM_CKIN7"),
+		STM32_FUNCTION(8, "UART5_RX"),
+		STM32_FUNCTION(10, "CAN1_RX"),
+		STM32_FUNCTION(11, "SDMMC2_D4"),
+		STM32_FUNCTION(12, "ETH_MII_TXD3"),
+		STM32_FUNCTION(13, "SDMMC1_D4"),
+		STM32_FUNCTION(14, "DCMI_D6"),
+		STM32_FUNCTION(15, "LCD_B6"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(25, "PB9"),
+		STM32_FUNCTION(0, "GPIOB9"),
+		STM32_FUNCTION(2, "I2C4_SDA"),
+		STM32_FUNCTION(3, "TIM4_CH4"),
+		STM32_FUNCTION(4, "TIM11_CH1"),
+		STM32_FUNCTION(5, "I2C1_SDA"),
+		STM32_FUNCTION(6, "SPI2_NSS I2S2_WS"),
+		STM32_FUNCTION(7, "DFSDM_DATIN7"),
+		STM32_FUNCTION(8, "UART5_TX"),
+		STM32_FUNCTION(10, "CAN1_TX"),
+		STM32_FUNCTION(11, "SDMMC2_D5"),
+		STM32_FUNCTION(12, "I2C4_SMBA"),
+		STM32_FUNCTION(13, "SDMMC1_D5"),
+		STM32_FUNCTION(14, "DCMI_D7"),
+		STM32_FUNCTION(15, "LCD_B7"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(26, "PB10"),
+		STM32_FUNCTION(0, "GPIOB10"),
+		STM32_FUNCTION(2, "TIM2_CH3"),
+		STM32_FUNCTION(5, "I2C2_SCL"),
+		STM32_FUNCTION(6, "SPI2_SCK I2S2_CK"),
+		STM32_FUNCTION(7, "DFSDM_DATIN7"),
+		STM32_FUNCTION(8, "USART3_TX"),
+		STM32_FUNCTION(10, "QUADSPI_BK1_NCS"),
+		STM32_FUNCTION(11, "OTG_HS_ULPI_D3"),
+		STM32_FUNCTION(12, "ETH_MII_RX_ER"),
+		STM32_FUNCTION(15, "LCD_G4"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(27, "PB11"),
+		STM32_FUNCTION(0, "GPIOB11"),
+		STM32_FUNCTION(2, "TIM2_CH4"),
+		STM32_FUNCTION(5, "I2C2_SDA"),
+		STM32_FUNCTION(7, "DFSDM_CKIN7"),
+		STM32_FUNCTION(8, "USART3_RX"),
+		STM32_FUNCTION(11, "OTG_HS_ULPI_D4"),
+		STM32_FUNCTION(12, "ETH_MII_TX_EN ETH_RMII_TX_EN"),
+		STM32_FUNCTION(14, "DSI_TE"),
+		STM32_FUNCTION(15, "LCD_G5"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(28, "PB12"),
+		STM32_FUNCTION(0, "GPIOB12"),
+		STM32_FUNCTION(2, "TIM1_BKIN"),
+		STM32_FUNCTION(5, "I2C2_SMBA"),
+		STM32_FUNCTION(6, "SPI2_NSS I2S2_WS"),
+		STM32_FUNCTION(7, "DFSDM_DATIN1"),
+		STM32_FUNCTION(8, "USART3_CK"),
+		STM32_FUNCTION(9, "UART5_RX"),
+		STM32_FUNCTION(10, "CAN2_RX"),
+		STM32_FUNCTION(11, "OTG_HS_ULPI_D5"),
+		STM32_FUNCTION(12, "ETH_MII_TXD0 ETH_RMII_TXD0"),
+		STM32_FUNCTION(13, "OTG_HS_ID"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(29, "PB13"),
+		STM32_FUNCTION(0, "GPIOB13"),
+		STM32_FUNCTION(2, "TIM1_CH1N"),
+		STM32_FUNCTION(6, "SPI2_SCK I2S2_CK"),
+		STM32_FUNCTION(7, "DFSDM_CKIN1"),
+		STM32_FUNCTION(8, "USART3_CTS"),
+		STM32_FUNCTION(9, "UART5_TX"),
+		STM32_FUNCTION(10, "CAN2_TX"),
+		STM32_FUNCTION(11, "OTG_HS_ULPI_D6"),
+		STM32_FUNCTION(12, "ETH_MII_TXD1 ETH_RMII_TXD1"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(30, "PB14"),
+		STM32_FUNCTION(0, "GPIOB14"),
+		STM32_FUNCTION(2, "TIM1_CH2N"),
+		STM32_FUNCTION(4, "TIM8_CH2N"),
+		STM32_FUNCTION(5, "USART1_TX"),
+		STM32_FUNCTION(6, "SPI2_MISO"),
+		STM32_FUNCTION(7, "DFSDM_DATIN2"),
+		STM32_FUNCTION(8, "USART3_RTS"),
+		STM32_FUNCTION(9, "UART4_RTS"),
+		STM32_FUNCTION(10, "TIM12_CH1"),
+		STM32_FUNCTION(11, "SDMMC2_D0"),
+		STM32_FUNCTION(13, "OTG_HS_DM"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(31, "PB15"),
+		STM32_FUNCTION(0, "GPIOB15"),
+		STM32_FUNCTION(1, "RTC_REFIN"),
+		STM32_FUNCTION(2, "TIM1_CH3N"),
+		STM32_FUNCTION(4, "TIM8_CH3N"),
+		STM32_FUNCTION(5, "USART1_RX"),
+		STM32_FUNCTION(6, "SPI2_MOSI I2S2_SD"),
+		STM32_FUNCTION(7, "DFSDM_CKIN2"),
+		STM32_FUNCTION(9, "UART4_CTS"),
+		STM32_FUNCTION(10, "TIM12_CH2"),
+		STM32_FUNCTION(11, "SDMMC2_D1"),
+		STM32_FUNCTION(13, "OTG_HS_DP"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(32, "PC0"),
+		STM32_FUNCTION(0, "GPIOC0"),
+		STM32_FUNCTION(4, "DFSDM_CKIN0"),
+		STM32_FUNCTION(7, "DFSDM_DATIN4"),
+		STM32_FUNCTION(9, "SAI2_FS_B"),
+		STM32_FUNCTION(11, "OTG_HS_ULPI_STP"),
+		STM32_FUNCTION(13, "FMC_SDNWE"),
+		STM32_FUNCTION(15, "LCD_R5"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(33, "PC1"),
+		STM32_FUNCTION(0, "GPIOC1"),
+		STM32_FUNCTION(1, "TRACED0"),
+		STM32_FUNCTION(4, "DFSDM_DATIN0"),
+		STM32_FUNCTION(6, "SPI2_MOSI I2S2_SD"),
+		STM32_FUNCTION(7, "SAI1_SD_A"),
+		STM32_FUNCTION(11, "DFSDM_CKIN4"),
+		STM32_FUNCTION(12, "ETH_MDC"),
+		STM32_FUNCTION(13, "MDIOS_MDC"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(34, "PC2"),
+		STM32_FUNCTION(0, "GPIOC2"),
+		STM32_FUNCTION(4, "DFSDM_CKIN1"),
+		STM32_FUNCTION(6, "SPI2_MISO"),
+		STM32_FUNCTION(7, "DFSDM_CKOUT"),
+		STM32_FUNCTION(11, "OTG_HS_ULPI_DIR"),
+		STM32_FUNCTION(12, "ETH_MII_TXD2"),
+		STM32_FUNCTION(13, "FMC_SDNE0"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(35, "PC3"),
+		STM32_FUNCTION(0, "GPIOC3"),
+		STM32_FUNCTION(4, "DFSDM_DATIN1"),
+		STM32_FUNCTION(6, "SPI2_MOSI I2S2_SD"),
+		STM32_FUNCTION(11, "OTG_HS_ULPI_NXT"),
+		STM32_FUNCTION(12, "ETH_MII_TX_CLK"),
+		STM32_FUNCTION(13, "FMC_SDCKE0"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(36, "PC4"),
+		STM32_FUNCTION(0, "GPIOC4"),
+		STM32_FUNCTION(4, "DFSDM_CKIN2"),
+		STM32_FUNCTION(6, "I2S1_MCK"),
+		STM32_FUNCTION(9, "SPDIF_RX2"),
+		STM32_FUNCTION(12, "ETH_MII_RXD0 ETH_RMII_RXD0"),
+		STM32_FUNCTION(13, "FMC_SDNE0"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(37, "PC5"),
+		STM32_FUNCTION(0, "GPIOC5"),
+		STM32_FUNCTION(4, "DFSDM_DATIN2"),
+		STM32_FUNCTION(9, "SPDIF_RX3"),
+		STM32_FUNCTION(12, "ETH_MII_RXD1 ETH_RMII_RXD1"),
+		STM32_FUNCTION(13, "FMC_SDCKE0"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(38, "PC6"),
+		STM32_FUNCTION(0, "GPIOC6"),
+		STM32_FUNCTION(3, "TIM3_CH1"),
+		STM32_FUNCTION(4, "TIM8_CH1"),
+		STM32_FUNCTION(6, "I2S2_MCK"),
+		STM32_FUNCTION(8, "DFSDM_CKIN3"),
+		STM32_FUNCTION(9, "USART6_TX"),
+		STM32_FUNCTION(10, "FMC_NWAIT"),
+		STM32_FUNCTION(11, "SDMMC2_D6"),
+		STM32_FUNCTION(13, "SDMMC1_D6"),
+		STM32_FUNCTION(14, "DCMI_D0"),
+		STM32_FUNCTION(15, "LCD_HSYNC"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(39, "PC7"),
+		STM32_FUNCTION(0, "GPIOC7"),
+		STM32_FUNCTION(3, "TIM3_CH2"),
+		STM32_FUNCTION(4, "TIM8_CH2"),
+		STM32_FUNCTION(7, "I2S3_MCK"),
+		STM32_FUNCTION(8, "DFSDM_DATIN3"),
+		STM32_FUNCTION(9, "USART6_RX"),
+		STM32_FUNCTION(10, "FMC_NE1"),
+		STM32_FUNCTION(11, "SDMMC2_D7"),
+		STM32_FUNCTION(13, "SDMMC1_D7"),
+		STM32_FUNCTION(14, "DCMI_D1"),
+		STM32_FUNCTION(15, "LCD_G6"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(40, "PC8"),
+		STM32_FUNCTION(0, "GPIOC8"),
+		STM32_FUNCTION(1, "TRACED1"),
+		STM32_FUNCTION(3, "TIM3_CH3"),
+		STM32_FUNCTION(4, "TIM8_CH3"),
+		STM32_FUNCTION(8, "UART5_RTS"),
+		STM32_FUNCTION(9, "USART6_CK"),
+		STM32_FUNCTION(10, "FMC_NE2 FMC_NCE"),
+		STM32_FUNCTION(13, "SDMMC1_D0"),
+		STM32_FUNCTION(14, "DCMI_D2"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(41, "PC9"),
+		STM32_FUNCTION(0, "GPIOC9"),
+		STM32_FUNCTION(1, "MCO2"),
+		STM32_FUNCTION(3, "TIM3_CH4"),
+		STM32_FUNCTION(4, "TIM8_CH4"),
+		STM32_FUNCTION(5, "I2C3_SDA"),
+		STM32_FUNCTION(6, "I2S_CKIN"),
+		STM32_FUNCTION(8, "UART5_CTS"),
+		STM32_FUNCTION(10, "QUADSPI_BK1_IO0"),
+		STM32_FUNCTION(11, "LCD_G3"),
+		STM32_FUNCTION(13, "SDMMC1_D1"),
+		STM32_FUNCTION(14, "DCMI_D3"),
+		STM32_FUNCTION(15, "LCD_B2"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(42, "PC10"),
+		STM32_FUNCTION(0, "GPIOC10"),
+		STM32_FUNCTION(4, "DFSDM_CKIN5"),
+		STM32_FUNCTION(7, "SPI3_SCK I2S3_CK"),
+		STM32_FUNCTION(8, "USART3_TX"),
+		STM32_FUNCTION(9, "UART4_TX"),
+		STM32_FUNCTION(10, "QUADSPI_BK1_IO1"),
+		STM32_FUNCTION(13, "SDMMC1_D2"),
+		STM32_FUNCTION(14, "DCMI_D8"),
+		STM32_FUNCTION(15, "LCD_R2"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(43, "PC11"),
+		STM32_FUNCTION(0, "GPIOC11"),
+		STM32_FUNCTION(4, "DFSDM_DATIN5"),
+		STM32_FUNCTION(7, "SPI3_MISO"),
+		STM32_FUNCTION(8, "USART3_RX"),
+		STM32_FUNCTION(9, "UART4_RX"),
+		STM32_FUNCTION(10, "QUADSPI_BK2_NCS"),
+		STM32_FUNCTION(13, "SDMMC1_D3"),
+		STM32_FUNCTION(14, "DCMI_D4"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(44, "PC12"),
+		STM32_FUNCTION(0, "GPIOC12"),
+		STM32_FUNCTION(1, "TRACED3"),
+		STM32_FUNCTION(7, "SPI3_MOSI I2S3_SD"),
+		STM32_FUNCTION(8, "USART3_CK"),
+		STM32_FUNCTION(9, "UART5_TX"),
+		STM32_FUNCTION(13, "SDMMC1_CK"),
+		STM32_FUNCTION(14, "DCMI_D9"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(45, "PC13"),
+		STM32_FUNCTION(0, "GPIOC13"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(46, "PC14"),
+		STM32_FUNCTION(0, "GPIOC14"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(47, "PC15"),
+		STM32_FUNCTION(0, "GPIOC15"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(48, "PD0"),
+		STM32_FUNCTION(0, "GPIOD0"),
+		STM32_FUNCTION(4, "DFSDM_CKIN6"),
+		STM32_FUNCTION(7, "DFSDM_DATIN7"),
+		STM32_FUNCTION(9, "UART4_RX"),
+		STM32_FUNCTION(10, "CAN1_RX"),
+		STM32_FUNCTION(13, "FMC_D2"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(49, "PD1"),
+		STM32_FUNCTION(0, "GPIOD1"),
+		STM32_FUNCTION(4, "DFSDM_DATIN6"),
+		STM32_FUNCTION(7, "DFSDM_CKIN7"),
+		STM32_FUNCTION(9, "UART4_TX"),
+		STM32_FUNCTION(10, "CAN1_TX"),
+		STM32_FUNCTION(13, "FMC_D3"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(50, "PD2"),
+		STM32_FUNCTION(0, "GPIOD2"),
+		STM32_FUNCTION(1, "TRACED2"),
+		STM32_FUNCTION(3, "TIM3_ETR"),
+		STM32_FUNCTION(9, "UART5_RX"),
+		STM32_FUNCTION(13, "SDMMC1_CMD"),
+		STM32_FUNCTION(14, "DCMI_D11"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(51, "PD3"),
+		STM32_FUNCTION(0, "GPIOD3"),
+		STM32_FUNCTION(4, "DFSDM_CKOUT"),
+		STM32_FUNCTION(6, "SPI2_SCK I2S2_CK"),
+		STM32_FUNCTION(7, "DFSDM_DATIN0"),
+		STM32_FUNCTION(8, "USART2_CTS"),
+		STM32_FUNCTION(13, "FMC_CLK"),
+		STM32_FUNCTION(14, "DCMI_D5"),
+		STM32_FUNCTION(15, "LCD_G7"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(52, "PD4"),
+		STM32_FUNCTION(0, "GPIOD4"),
+		STM32_FUNCTION(7, "DFSDM_CKIN0"),
+		STM32_FUNCTION(8, "USART2_RTS"),
+		STM32_FUNCTION(13, "FMC_NOE"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(53, "PD5"),
+		STM32_FUNCTION(0, "GPIOD5"),
+		STM32_FUNCTION(8, "USART2_TX"),
+		STM32_FUNCTION(13, "FMC_NWE"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(54, "PD6"),
+		STM32_FUNCTION(0, "GPIOD6"),
+		STM32_FUNCTION(4, "DFSDM_CKIN4"),
+		STM32_FUNCTION(6, "SPI3_MOSI I2S3_SD"),
+		STM32_FUNCTION(7, "SAI1_SD_A"),
+		STM32_FUNCTION(8, "USART2_RX"),
+		STM32_FUNCTION(11, "DFSDM_DATIN1"),
+		STM32_FUNCTION(12, "SDMMC2_CK"),
+		STM32_FUNCTION(13, "FMC_NWAIT"),
+		STM32_FUNCTION(14, "DCMI_D10"),
+		STM32_FUNCTION(15, "LCD_B2"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(55, "PD7"),
+		STM32_FUNCTION(0, "GPIOD7"),
+		STM32_FUNCTION(4, "DFSDM_DATIN4"),
+		STM32_FUNCTION(6, "SPI1_MOSI I2S1_SD"),
+		STM32_FUNCTION(7, "DFSDM_CKIN1"),
+		STM32_FUNCTION(8, "USART2_CK"),
+		STM32_FUNCTION(9, "SPDIF_RX0"),
+		STM32_FUNCTION(12, "SDMMC2_CMD"),
+		STM32_FUNCTION(13, "FMC_NE1"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(56, "PD8"),
+		STM32_FUNCTION(0, "GPIOD8"),
+		STM32_FUNCTION(4, "DFSDM_CKIN3"),
+		STM32_FUNCTION(8, "USART3_TX"),
+		STM32_FUNCTION(9, "SPDIF_RX1"),
+		STM32_FUNCTION(13, "FMC_D13"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(57, "PD9"),
+		STM32_FUNCTION(0, "GPIOD9"),
+		STM32_FUNCTION(4, "DFSDM_DATIN3"),
+		STM32_FUNCTION(8, "USART3_RX"),
+		STM32_FUNCTION(13, "FMC_D14"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(58, "PD10"),
+		STM32_FUNCTION(0, "GPIOD10"),
+		STM32_FUNCTION(4, "DFSDM_CKOUT"),
+		STM32_FUNCTION(8, "USART3_CK"),
+		STM32_FUNCTION(13, "FMC_D15"),
+		STM32_FUNCTION(15, "LCD_B3"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(59, "PD11"),
+		STM32_FUNCTION(0, "GPIOD11"),
+		STM32_FUNCTION(5, "I2C4_SMBA"),
+		STM32_FUNCTION(8, "USART3_CTS"),
+		STM32_FUNCTION(10, "QUADSPI_BK1_IO0"),
+		STM32_FUNCTION(11, "SAI2_SD_A"),
+		STM32_FUNCTION(13, "FMC_A16 FMC_CLE"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(60, "PD12"),
+		STM32_FUNCTION(0, "GPIOD12"),
+		STM32_FUNCTION(3, "TIM4_CH1"),
+		STM32_FUNCTION(4, "LPTIM1_IN1"),
+		STM32_FUNCTION(5, "I2C4_SCL"),
+		STM32_FUNCTION(8, "USART3_RTS"),
+		STM32_FUNCTION(10, "QUADSPI_BK1_IO1"),
+		STM32_FUNCTION(11, "SAI2_FS_A"),
+		STM32_FUNCTION(13, "FMC_A17 FMC_ALE"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(61, "PD13"),
+		STM32_FUNCTION(0, "GPIOD13"),
+		STM32_FUNCTION(3, "TIM4_CH2"),
+		STM32_FUNCTION(4, "LPTIM1_OUT"),
+		STM32_FUNCTION(5, "I2C4_SDA"),
+		STM32_FUNCTION(10, "QUADSPI_BK1_IO3"),
+		STM32_FUNCTION(11, "SAI2_SCK_A"),
+		STM32_FUNCTION(13, "FMC_A18"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(62, "PD14"),
+		STM32_FUNCTION(0, "GPIOD14"),
+		STM32_FUNCTION(3, "TIM4_CH3"),
+		STM32_FUNCTION(9, "UART8_CTS"),
+		STM32_FUNCTION(13, "FMC_D0"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(63, "PD15"),
+		STM32_FUNCTION(0, "GPIOD15"),
+		STM32_FUNCTION(3, "TIM4_CH4"),
+		STM32_FUNCTION(9, "UART8_RTS"),
+		STM32_FUNCTION(13, "FMC_D1"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(64, "PE0"),
+		STM32_FUNCTION(0, "GPIOE0"),
+		STM32_FUNCTION(3, "TIM4_ETR"),
+		STM32_FUNCTION(4, "LPTIM1_ETR"),
+		STM32_FUNCTION(9, "UART8_RX"),
+		STM32_FUNCTION(11, "SAI2_MCLK_A"),
+		STM32_FUNCTION(13, "FMC_NBL0"),
+		STM32_FUNCTION(14, "DCMI_D2"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(65, "PE1"),
+		STM32_FUNCTION(0, "GPIOE1"),
+		STM32_FUNCTION(4, "LPTIM1_IN2"),
+		STM32_FUNCTION(9, "UART8_TX"),
+		STM32_FUNCTION(13, "FMC_NBL1"),
+		STM32_FUNCTION(14, "DCMI_D3"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(66, "PE2"),
+		STM32_FUNCTION(0, "GPIOE2"),
+		STM32_FUNCTION(1, "TRACECLK"),
+		STM32_FUNCTION(6, "SPI4_SCK"),
+		STM32_FUNCTION(7, "SAI1_MCLK_A"),
+		STM32_FUNCTION(10, "QUADSPI_BK1_IO2"),
+		STM32_FUNCTION(12, "ETH_MII_TXD3"),
+		STM32_FUNCTION(13, "FMC_A23"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(67, "PE3"),
+		STM32_FUNCTION(0, "GPIOE3"),
+		STM32_FUNCTION(1, "TRACED0"),
+		STM32_FUNCTION(7, "SAI1_SD_B"),
+		STM32_FUNCTION(13, "FMC_A19"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(68, "PE4"),
+		STM32_FUNCTION(0, "GPIOE4"),
+		STM32_FUNCTION(1, "TRACED1"),
+		STM32_FUNCTION(6, "SPI4_NSS"),
+		STM32_FUNCTION(7, "SAI1_FS_A"),
+		STM32_FUNCTION(11, "DFSDM_DATIN3"),
+		STM32_FUNCTION(13, "FMC_A20"),
+		STM32_FUNCTION(14, "DCMI_D4"),
+		STM32_FUNCTION(15, "LCD_B0"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(69, "PE5"),
+		STM32_FUNCTION(0, "GPIOE5"),
+		STM32_FUNCTION(1, "TRACED2"),
+		STM32_FUNCTION(4, "TIM9_CH1"),
+		STM32_FUNCTION(6, "SPI4_MISO"),
+		STM32_FUNCTION(7, "SAI1_SCK_A"),
+		STM32_FUNCTION(11, "DFSDM_CKIN3"),
+		STM32_FUNCTION(13, "FMC_A21"),
+		STM32_FUNCTION(14, "DCMI_D6"),
+		STM32_FUNCTION(15, "LCD_G0"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(70, "PE6"),
+		STM32_FUNCTION(0, "GPIOE6"),
+		STM32_FUNCTION(1, "TRACED3"),
+		STM32_FUNCTION(2, "TIM1_BKIN2"),
+		STM32_FUNCTION(4, "TIM9_CH2"),
+		STM32_FUNCTION(6, "SPI4_MOSI"),
+		STM32_FUNCTION(7, "SAI1_SD_A"),
+		STM32_FUNCTION(11, "SAI2_MCLK_B"),
+		STM32_FUNCTION(13, "FMC_A22"),
+		STM32_FUNCTION(14, "DCMI_D7"),
+		STM32_FUNCTION(15, "LCD_G1"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(71, "PE7"),
+		STM32_FUNCTION(0, "GPIOE7"),
+		STM32_FUNCTION(2, "TIM1_ETR"),
+		STM32_FUNCTION(7, "DFSDM_DATIN2"),
+		STM32_FUNCTION(9, "UART7_RX"),
+		STM32_FUNCTION(11, "QUADSPI_BK2_IO0"),
+		STM32_FUNCTION(13, "FMC_D4"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(72, "PE8"),
+		STM32_FUNCTION(0, "GPIOE8"),
+		STM32_FUNCTION(2, "TIM1_CH1N"),
+		STM32_FUNCTION(7, "DFSDM_CKIN2"),
+		STM32_FUNCTION(9, "UART7_TX"),
+		STM32_FUNCTION(11, "QUADSPI_BK2_IO1"),
+		STM32_FUNCTION(13, "FMC_D5"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(73, "PE9"),
+		STM32_FUNCTION(0, "GPIOE9"),
+		STM32_FUNCTION(2, "TIM1_CH1"),
+		STM32_FUNCTION(7, "DFSDM_CKOUT"),
+		STM32_FUNCTION(9, "UART7_RTS"),
+		STM32_FUNCTION(11, "QUADSPI_BK2_IO2"),
+		STM32_FUNCTION(13, "FMC_D6"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(74, "PE10"),
+		STM32_FUNCTION(0, "GPIOE10"),
+		STM32_FUNCTION(2, "TIM1_CH2N"),
+		STM32_FUNCTION(7, "DFSDM_DATIN4"),
+		STM32_FUNCTION(9, "UART7_CTS"),
+		STM32_FUNCTION(11, "QUADSPI_BK2_IO3"),
+		STM32_FUNCTION(13, "FMC_D7"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(75, "PE11"),
+		STM32_FUNCTION(0, "GPIOE11"),
+		STM32_FUNCTION(2, "TIM1_CH2"),
+		STM32_FUNCTION(6, "SPI4_NSS"),
+		STM32_FUNCTION(7, "DFSDM_CKIN4"),
+		STM32_FUNCTION(11, "SAI2_SD_B"),
+		STM32_FUNCTION(13, "FMC_D8"),
+		STM32_FUNCTION(15, "LCD_G3"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(76, "PE12"),
+		STM32_FUNCTION(0, "GPIOE12"),
+		STM32_FUNCTION(2, "TIM1_CH3N"),
+		STM32_FUNCTION(6, "SPI4_SCK"),
+		STM32_FUNCTION(7, "DFSDM_DATIN5"),
+		STM32_FUNCTION(11, "SAI2_SCK_B"),
+		STM32_FUNCTION(13, "FMC_D9"),
+		STM32_FUNCTION(15, "LCD_B4"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(77, "PE13"),
+		STM32_FUNCTION(0, "GPIOE13"),
+		STM32_FUNCTION(2, "TIM1_CH3"),
+		STM32_FUNCTION(6, "SPI4_MISO"),
+		STM32_FUNCTION(7, "DFSDM_CKIN5"),
+		STM32_FUNCTION(11, "SAI2_FS_B"),
+		STM32_FUNCTION(13, "FMC_D10"),
+		STM32_FUNCTION(15, "LCD_DE"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(78, "PE14"),
+		STM32_FUNCTION(0, "GPIOE14"),
+		STM32_FUNCTION(2, "TIM1_CH4"),
+		STM32_FUNCTION(6, "SPI4_MOSI"),
+		STM32_FUNCTION(11, "SAI2_MCLK_B"),
+		STM32_FUNCTION(13, "FMC_D11"),
+		STM32_FUNCTION(15, "LCD_CLK"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(79, "PE15"),
+		STM32_FUNCTION(0, "GPIOE15"),
+		STM32_FUNCTION(2, "TIM1_BKIN"),
+		STM32_FUNCTION(13, "FMC_D12"),
+		STM32_FUNCTION(15, "LCD_R7"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(80, "PF0"),
+		STM32_FUNCTION(0, "GPIOF0"),
+		STM32_FUNCTION(5, "I2C2_SDA"),
+		STM32_FUNCTION(13, "FMC_A0"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(81, "PF1"),
+		STM32_FUNCTION(0, "GPIOF1"),
+		STM32_FUNCTION(5, "I2C2_SCL"),
+		STM32_FUNCTION(13, "FMC_A1"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(82, "PF2"),
+		STM32_FUNCTION(0, "GPIOF2"),
+		STM32_FUNCTION(5, "I2C2_SMBA"),
+		STM32_FUNCTION(13, "FMC_A2"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(83, "PF3"),
+		STM32_FUNCTION(0, "GPIOF3"),
+		STM32_FUNCTION(13, "FMC_A3"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(84, "PF4"),
+		STM32_FUNCTION(0, "GPIOF4"),
+		STM32_FUNCTION(13, "FMC_A4"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(85, "PF5"),
+		STM32_FUNCTION(0, "GPIOF5"),
+		STM32_FUNCTION(13, "FMC_A5"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(86, "PF6"),
+		STM32_FUNCTION(0, "GPIOF6"),
+		STM32_FUNCTION(4, "TIM10_CH1"),
+		STM32_FUNCTION(6, "SPI5_NSS"),
+		STM32_FUNCTION(7, "SAI1_SD_B"),
+		STM32_FUNCTION(9, "UART7_RX"),
+		STM32_FUNCTION(10, "QUADSPI_BK1_IO3"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(87, "PF7"),
+		STM32_FUNCTION(0, "GPIOF7"),
+		STM32_FUNCTION(4, "TIM11_CH1"),
+		STM32_FUNCTION(6, "SPI5_SCK"),
+		STM32_FUNCTION(7, "SAI1_MCLK_B"),
+		STM32_FUNCTION(9, "UART7_TX"),
+		STM32_FUNCTION(10, "QUADSPI_BK1_IO2"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(88, "PF8"),
+		STM32_FUNCTION(0, "GPIOF8"),
+		STM32_FUNCTION(6, "SPI5_MISO"),
+		STM32_FUNCTION(7, "SAI1_SCK_B"),
+		STM32_FUNCTION(9, "UART7_RTS"),
+		STM32_FUNCTION(10, "TIM13_CH1"),
+		STM32_FUNCTION(11, "QUADSPI_BK1_IO0"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(89, "PF9"),
+		STM32_FUNCTION(0, "GPIOF9"),
+		STM32_FUNCTION(6, "SPI5_MOSI"),
+		STM32_FUNCTION(7, "SAI1_FS_B"),
+		STM32_FUNCTION(9, "UART7_CTS"),
+		STM32_FUNCTION(10, "TIM14_CH1"),
+		STM32_FUNCTION(11, "QUADSPI_BK1_IO1"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(90, "PF10"),
+		STM32_FUNCTION(0, "GPIOF10"),
+		STM32_FUNCTION(10, "QUADSPI_CLK"),
+		STM32_FUNCTION(14, "DCMI_D11"),
+		STM32_FUNCTION(15, "LCD_DE"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(91, "PF11"),
+		STM32_FUNCTION(0, "GPIOF11"),
+		STM32_FUNCTION(6, "SPI5_MOSI"),
+		STM32_FUNCTION(11, "SAI2_SD_B"),
+		STM32_FUNCTION(13, "FMC_SDNRAS"),
+		STM32_FUNCTION(14, "DCMI_D12"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(92, "PF12"),
+		STM32_FUNCTION(0, "GPIOF12"),
+		STM32_FUNCTION(13, "FMC_A6"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(93, "PF13"),
+		STM32_FUNCTION(0, "GPIOF13"),
+		STM32_FUNCTION(5, "I2C4_SMBA"),
+		STM32_FUNCTION(7, "DFSDM_DATIN6"),
+		STM32_FUNCTION(13, "FMC_A7"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(94, "PF14"),
+		STM32_FUNCTION(0, "GPIOF14"),
+		STM32_FUNCTION(5, "I2C4_SCL"),
+		STM32_FUNCTION(7, "DFSDM_CKIN6"),
+		STM32_FUNCTION(13, "FMC_A8"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(95, "PF15"),
+		STM32_FUNCTION(0, "GPIOF15"),
+		STM32_FUNCTION(5, "I2C4_SDA"),
+		STM32_FUNCTION(13, "FMC_A9"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(96, "PG0"),
+		STM32_FUNCTION(0, "GPIOG0"),
+		STM32_FUNCTION(13, "FMC_A10"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(97, "PG1"),
+		STM32_FUNCTION(0, "GPIOG1"),
+		STM32_FUNCTION(13, "FMC_A11"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(98, "PG2"),
+		STM32_FUNCTION(0, "GPIOG2"),
+		STM32_FUNCTION(13, "FMC_A12"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(99, "PG3"),
+		STM32_FUNCTION(0, "GPIOG3"),
+		STM32_FUNCTION(13, "FMC_A13"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(100, "PG4"),
+		STM32_FUNCTION(0, "GPIOG4"),
+		STM32_FUNCTION(13, "FMC_A14 FMC_BA0"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(101, "PG5"),
+		STM32_FUNCTION(0, "GPIOG5"),
+		STM32_FUNCTION(13, "FMC_A15 FMC_BA1"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(102, "PG6"),
+		STM32_FUNCTION(0, "GPIOG6"),
+		STM32_FUNCTION(13, "FMC_NE3"),
+		STM32_FUNCTION(14, "DCMI_D12"),
+		STM32_FUNCTION(15, "LCD_R7"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(103, "PG7"),
+		STM32_FUNCTION(0, "GPIOG7"),
+		STM32_FUNCTION(7, "SAI1_MCLK_A"),
+		STM32_FUNCTION(9, "USART6_CK"),
+		STM32_FUNCTION(13, "FMC_INT"),
+		STM32_FUNCTION(14, "DCMI_D13"),
+		STM32_FUNCTION(15, "LCD_CLK"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(104, "PG8"),
+		STM32_FUNCTION(0, "GPIOG8"),
+		STM32_FUNCTION(6, "SPI6_NSS"),
+		STM32_FUNCTION(8, "SPDIF_RX2"),
+		STM32_FUNCTION(9, "USART6_RTS"),
+		STM32_FUNCTION(12, "ETH_PPS_OUT"),
+		STM32_FUNCTION(13, "FMC_SDCLK"),
+		STM32_FUNCTION(15, "LCD_G7"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(105, "PG9"),
+		STM32_FUNCTION(0, "GPIOG9"),
+		STM32_FUNCTION(6, "SPI1_MISO"),
+		STM32_FUNCTION(8, "SPDIF_RX3"),
+		STM32_FUNCTION(9, "USART6_RX"),
+		STM32_FUNCTION(10, "QUADSPI_BK2_IO2"),
+		STM32_FUNCTION(11, "SAI2_FS_B"),
+		STM32_FUNCTION(12, "SDMMC2_D0"),
+		STM32_FUNCTION(13, "FMC_NE2 FMC_NCE"),
+		STM32_FUNCTION(14, "DCMI_VSYNC"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(106, "PG10"),
+		STM32_FUNCTION(0, "GPIOG10"),
+		STM32_FUNCTION(6, "SPI1_NSS I2S1_WS"),
+		STM32_FUNCTION(10, "LCD_G3"),
+		STM32_FUNCTION(11, "SAI2_SD_B"),
+		STM32_FUNCTION(12, "SDMMC2_D1"),
+		STM32_FUNCTION(13, "FMC_NE3"),
+		STM32_FUNCTION(14, "DCMI_D2"),
+		STM32_FUNCTION(15, "LCD_B2"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(107, "PG11"),
+		STM32_FUNCTION(0, "GPIOG11"),
+		STM32_FUNCTION(6, "SPI1_SCK I2S1_CK"),
+		STM32_FUNCTION(8, "SPDIF_RX0"),
+		STM32_FUNCTION(11, "SDMMC2_D2"),
+		STM32_FUNCTION(12, "ETH_MII_TX_EN ETH_RMII_TX_EN"),
+		STM32_FUNCTION(14, "DCMI_D3"),
+		STM32_FUNCTION(15, "LCD_B3"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(108, "PG12"),
+		STM32_FUNCTION(0, "GPIOG12"),
+		STM32_FUNCTION(4, "LPTIM1_IN1"),
+		STM32_FUNCTION(6, "SPI6_MISO"),
+		STM32_FUNCTION(8, "SPDIF_RX1"),
+		STM32_FUNCTION(9, "USART6_RTS"),
+		STM32_FUNCTION(10, "LCD_B4"),
+		STM32_FUNCTION(12, "SDMMC2_D3"),
+		STM32_FUNCTION(13, "FMC_NE4"),
+		STM32_FUNCTION(15, "LCD_B1"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(109, "PG13"),
+		STM32_FUNCTION(0, "GPIOG13"),
+		STM32_FUNCTION(1, "TRACED0"),
+		STM32_FUNCTION(4, "LPTIM1_OUT"),
+		STM32_FUNCTION(6, "SPI6_SCK"),
+		STM32_FUNCTION(9, "USART6_CTS"),
+		STM32_FUNCTION(12, "ETH_MII_TXD0 ETH_RMII_TXD0"),
+		STM32_FUNCTION(13, "FMC_A24"),
+		STM32_FUNCTION(15, "LCD_R0"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(110, "PG14"),
+		STM32_FUNCTION(0, "GPIOG14"),
+		STM32_FUNCTION(1, "TRACED1"),
+		STM32_FUNCTION(4, "LPTIM1_ETR"),
+		STM32_FUNCTION(6, "SPI6_MOSI"),
+		STM32_FUNCTION(9, "USART6_TX"),
+		STM32_FUNCTION(10, "QUADSPI_BK2_IO3"),
+		STM32_FUNCTION(12, "ETH_MII_TXD1 ETH_RMII_TXD1"),
+		STM32_FUNCTION(13, "FMC_A25"),
+		STM32_FUNCTION(15, "LCD_B0"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(111, "PG15"),
+		STM32_FUNCTION(0, "GPIOG15"),
+		STM32_FUNCTION(9, "USART6_CTS"),
+		STM32_FUNCTION(13, "FMC_SDNCAS"),
+		STM32_FUNCTION(14, "DCMI_D13"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(112, "PH0"),
+		STM32_FUNCTION(0, "GPIOH0"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(113, "PH1"),
+		STM32_FUNCTION(0, "GPIOH1"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(114, "PH2"),
+		STM32_FUNCTION(0, "GPIOH2"),
+		STM32_FUNCTION(4, "LPTIM1_IN2"),
+		STM32_FUNCTION(10, "QUADSPI_BK2_IO0"),
+		STM32_FUNCTION(11, "SAI2_SCK_B"),
+		STM32_FUNCTION(12, "ETH_MII_CRS"),
+		STM32_FUNCTION(13, "FMC_SDCKE0"),
+		STM32_FUNCTION(15, "LCD_R0"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(115, "PH3"),
+		STM32_FUNCTION(0, "GPIOH3"),
+		STM32_FUNCTION(10, "QUADSPI_BK2_IO1"),
+		STM32_FUNCTION(11, "SAI2_MCLK_B"),
+		STM32_FUNCTION(12, "ETH_MII_COL"),
+		STM32_FUNCTION(13, "FMC_SDNE0"),
+		STM32_FUNCTION(15, "LCD_R1"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(116, "PH4"),
+		STM32_FUNCTION(0, "GPIOH4"),
+		STM32_FUNCTION(5, "I2C2_SCL"),
+		STM32_FUNCTION(10, "LCD_G5"),
+		STM32_FUNCTION(11, "OTG_HS_ULPI_NXT"),
+		STM32_FUNCTION(15, "LCD_G4"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(117, "PH5"),
+		STM32_FUNCTION(0, "GPIOH5"),
+		STM32_FUNCTION(5, "I2C2_SDA"),
+		STM32_FUNCTION(6, "SPI5_NSS"),
+		STM32_FUNCTION(13, "FMC_SDNWE"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(118, "PH6"),
+		STM32_FUNCTION(0, "GPIOH6"),
+		STM32_FUNCTION(5, "I2C2_SMBA"),
+		STM32_FUNCTION(6, "SPI5_SCK"),
+		STM32_FUNCTION(10, "TIM12_CH1"),
+		STM32_FUNCTION(12, "ETH_MII_RXD2"),
+		STM32_FUNCTION(13, "FMC_SDNE1"),
+		STM32_FUNCTION(14, "DCMI_D8"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(119, "PH7"),
+		STM32_FUNCTION(0, "GPIOH7"),
+		STM32_FUNCTION(5, "I2C3_SCL"),
+		STM32_FUNCTION(6, "SPI5_MISO"),
+		STM32_FUNCTION(12, "ETH_MII_RXD3"),
+		STM32_FUNCTION(13, "FMC_SDCKE1"),
+		STM32_FUNCTION(14, "DCMI_D9"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(120, "PH8"),
+		STM32_FUNCTION(0, "GPIOH8"),
+		STM32_FUNCTION(5, "I2C3_SDA"),
+		STM32_FUNCTION(13, "FMC_D16"),
+		STM32_FUNCTION(14, "DCMI_HSYNC"),
+		STM32_FUNCTION(15, "LCD_R2"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(121, "PH9"),
+		STM32_FUNCTION(0, "GPIOH9"),
+		STM32_FUNCTION(5, "I2C3_SMBA"),
+		STM32_FUNCTION(10, "TIM12_CH2"),
+		STM32_FUNCTION(13, "FMC_D17"),
+		STM32_FUNCTION(14, "DCMI_D0"),
+		STM32_FUNCTION(15, "LCD_R3"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(122, "PH10"),
+		STM32_FUNCTION(0, "GPIOH10"),
+		STM32_FUNCTION(3, "TIM5_CH1"),
+		STM32_FUNCTION(5, "I2C4_SMBA"),
+		STM32_FUNCTION(13, "FMC_D18"),
+		STM32_FUNCTION(14, "DCMI_D1"),
+		STM32_FUNCTION(15, "LCD_R4"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(123, "PH11"),
+		STM32_FUNCTION(0, "GPIOH11"),
+		STM32_FUNCTION(3, "TIM5_CH2"),
+		STM32_FUNCTION(5, "I2C4_SCL"),
+		STM32_FUNCTION(13, "FMC_D19"),
+		STM32_FUNCTION(14, "DCMI_D2"),
+		STM32_FUNCTION(15, "LCD_R5"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(124, "PH12"),
+		STM32_FUNCTION(0, "GPIOH12"),
+		STM32_FUNCTION(3, "TIM5_CH3"),
+		STM32_FUNCTION(5, "I2C4_SDA"),
+		STM32_FUNCTION(13, "FMC_D20"),
+		STM32_FUNCTION(14, "DCMI_D3"),
+		STM32_FUNCTION(15, "LCD_R6"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(125, "PH13"),
+		STM32_FUNCTION(0, "GPIOH13"),
+		STM32_FUNCTION(4, "TIM8_CH1N"),
+		STM32_FUNCTION(9, "UART4_TX"),
+		STM32_FUNCTION(10, "CAN1_TX"),
+		STM32_FUNCTION(13, "FMC_D21"),
+		STM32_FUNCTION(15, "LCD_G2"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(126, "PH14"),
+		STM32_FUNCTION(0, "GPIOH14"),
+		STM32_FUNCTION(4, "TIM8_CH2N"),
+		STM32_FUNCTION(9, "UART4_RX"),
+		STM32_FUNCTION(10, "CAN1_RX"),
+		STM32_FUNCTION(13, "FMC_D22"),
+		STM32_FUNCTION(14, "DCMI_D4"),
+		STM32_FUNCTION(15, "LCD_G3"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(127, "PH15"),
+		STM32_FUNCTION(0, "GPIOH15"),
+		STM32_FUNCTION(4, "TIM8_CH3N"),
+		STM32_FUNCTION(13, "FMC_D23"),
+		STM32_FUNCTION(14, "DCMI_D11"),
+		STM32_FUNCTION(15, "LCD_G4"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(128, "PI0"),
+		STM32_FUNCTION(0, "GPIOI0"),
+		STM32_FUNCTION(3, "TIM5_CH4"),
+		STM32_FUNCTION(6, "SPI2_NSS I2S2_WS"),
+		STM32_FUNCTION(13, "FMC_D24"),
+		STM32_FUNCTION(14, "DCMI_D13"),
+		STM32_FUNCTION(15, "LCD_G5"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(129, "PI1"),
+		STM32_FUNCTION(0, "GPIOI1"),
+		STM32_FUNCTION(4, "TIM8_BKIN2"),
+		STM32_FUNCTION(6, "SPI2_SCK I2S2_CK"),
+		STM32_FUNCTION(13, "FMC_D25"),
+		STM32_FUNCTION(14, "DCMI_D8"),
+		STM32_FUNCTION(15, "LCD_G6"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(130, "PI2"),
+		STM32_FUNCTION(0, "GPIOI2"),
+		STM32_FUNCTION(4, "TIM8_CH4"),
+		STM32_FUNCTION(6, "SPI2_MISO"),
+		STM32_FUNCTION(13, "FMC_D26"),
+		STM32_FUNCTION(14, "DCMI_D9"),
+		STM32_FUNCTION(15, "LCD_G7"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(131, "PI3"),
+		STM32_FUNCTION(0, "GPIOI3"),
+		STM32_FUNCTION(4, "TIM8_ETR"),
+		STM32_FUNCTION(6, "SPI2_MOSI I2S2_SD"),
+		STM32_FUNCTION(13, "FMC_D27"),
+		STM32_FUNCTION(14, "DCMI_D10"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(132, "PI4"),
+		STM32_FUNCTION(0, "GPIOI4"),
+		STM32_FUNCTION(4, "TIM8_BKIN"),
+		STM32_FUNCTION(11, "SAI2_MCLK_A"),
+		STM32_FUNCTION(13, "FMC_NBL2"),
+		STM32_FUNCTION(14, "DCMI_D5"),
+		STM32_FUNCTION(15, "LCD_B4"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(133, "PI5"),
+		STM32_FUNCTION(0, "GPIOI5"),
+		STM32_FUNCTION(4, "TIM8_CH1"),
+		STM32_FUNCTION(11, "SAI2_SCK_A"),
+		STM32_FUNCTION(13, "FMC_NBL3"),
+		STM32_FUNCTION(14, "DCMI_VSYNC"),
+		STM32_FUNCTION(15, "LCD_B5"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(134, "PI6"),
+		STM32_FUNCTION(0, "GPIOI6"),
+		STM32_FUNCTION(4, "TIM8_CH2"),
+		STM32_FUNCTION(11, "SAI2_SD_A"),
+		STM32_FUNCTION(13, "FMC_D28"),
+		STM32_FUNCTION(14, "DCMI_D6"),
+		STM32_FUNCTION(15, "LCD_B6"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(135, "PI7"),
+		STM32_FUNCTION(0, "GPIOI7"),
+		STM32_FUNCTION(4, "TIM8_CH3"),
+		STM32_FUNCTION(11, "SAI2_FS_A"),
+		STM32_FUNCTION(13, "FMC_D29"),
+		STM32_FUNCTION(14, "DCMI_D7"),
+		STM32_FUNCTION(15, "LCD_B7"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(136, "PI8"),
+		STM32_FUNCTION(0, "GPIOI8"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(137, "PI9"),
+		STM32_FUNCTION(0, "GPIOI9"),
+		STM32_FUNCTION(9, "UART4_RX"),
+		STM32_FUNCTION(10, "CAN1_RX"),
+		STM32_FUNCTION(13, "FMC_D30"),
+		STM32_FUNCTION(15, "LCD_VSYNC"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(138, "PI10"),
+		STM32_FUNCTION(0, "GPIOI10"),
+		STM32_FUNCTION(12, "ETH_MII_RX_ER"),
+		STM32_FUNCTION(13, "FMC_D31"),
+		STM32_FUNCTION(15, "LCD_HSYNC"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(139, "PI11"),
+		STM32_FUNCTION(0, "GPIOI11"),
+		STM32_FUNCTION(10, "LCD_G6"),
+		STM32_FUNCTION(11, "OTG_HS_ULPI_DIR"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(140, "PI12"),
+		STM32_FUNCTION(0, "GPIOI12"),
+		STM32_FUNCTION(15, "LCD_HSYNC"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(141, "PI13"),
+		STM32_FUNCTION(0, "GPIOI13"),
+		STM32_FUNCTION(15, "LCD_VSYNC"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(142, "PI14"),
+		STM32_FUNCTION(0, "GPIOI14"),
+		STM32_FUNCTION(15, "LCD_CLK"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(143, "PI15"),
+		STM32_FUNCTION(0, "GPIOI15"),
+		STM32_FUNCTION(10, "LCD_G2"),
+		STM32_FUNCTION(15, "LCD_R0"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(144, "PJ0"),
+		STM32_FUNCTION(0, "GPIOJ0"),
+		STM32_FUNCTION(10, "LCD_R7"),
+		STM32_FUNCTION(15, "LCD_R1"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(145, "PJ1"),
+		STM32_FUNCTION(0, "GPIOJ1"),
+		STM32_FUNCTION(15, "LCD_R2"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(146, "PJ2"),
+		STM32_FUNCTION(0, "GPIOJ2"),
+		STM32_FUNCTION(14, "DSI_TE"),
+		STM32_FUNCTION(15, "LCD_R3"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(147, "PJ3"),
+		STM32_FUNCTION(0, "GPIOJ3"),
+		STM32_FUNCTION(15, "LCD_R4"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(148, "PJ4"),
+		STM32_FUNCTION(0, "GPIOJ4"),
+		STM32_FUNCTION(15, "LCD_R5"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(149, "PJ5"),
+		STM32_FUNCTION(0, "GPIOJ5"),
+		STM32_FUNCTION(15, "LCD_R6"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(150, "PJ6"),
+		STM32_FUNCTION(0, "GPIOJ6"),
+		STM32_FUNCTION(15, "LCD_R7"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(151, "PJ7"),
+		STM32_FUNCTION(0, "GPIOJ7"),
+		STM32_FUNCTION(15, "LCD_G0"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(152, "PJ8"),
+		STM32_FUNCTION(0, "GPIOJ8"),
+		STM32_FUNCTION(15, "LCD_G1"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(153, "PJ9"),
+		STM32_FUNCTION(0, "GPIOJ9"),
+		STM32_FUNCTION(15, "LCD_G2"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(154, "PJ10"),
+		STM32_FUNCTION(0, "GPIOJ10"),
+		STM32_FUNCTION(15, "LCD_G3"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(155, "PJ11"),
+		STM32_FUNCTION(0, "GPIOJ11"),
+		STM32_FUNCTION(15, "LCD_G4"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(156, "PJ12"),
+		STM32_FUNCTION(0, "GPIOJ12"),
+		STM32_FUNCTION(10, "LCD_G3"),
+		STM32_FUNCTION(15, "LCD_B0"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(157, "PJ13"),
+		STM32_FUNCTION(0, "GPIOJ13"),
+		STM32_FUNCTION(10, "LCD_G4"),
+		STM32_FUNCTION(15, "LCD_B1"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(158, "PJ14"),
+		STM32_FUNCTION(0, "GPIOJ14"),
+		STM32_FUNCTION(15, "LCD_B2"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(159, "PJ15"),
+		STM32_FUNCTION(0, "GPIOJ15"),
+		STM32_FUNCTION(15, "LCD_B3"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(160, "PK0"),
+		STM32_FUNCTION(0, "GPIOK0"),
+		STM32_FUNCTION(15, "LCD_G5"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(161, "PK1"),
+		STM32_FUNCTION(0, "GPIOK1"),
+		STM32_FUNCTION(15, "LCD_G6"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(162, "PK2"),
+		STM32_FUNCTION(0, "GPIOK2"),
+		STM32_FUNCTION(15, "LCD_G7"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(163, "PK3"),
+		STM32_FUNCTION(0, "GPIOK3"),
+		STM32_FUNCTION(15, "LCD_B4"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(164, "PK4"),
+		STM32_FUNCTION(0, "GPIOK4"),
+		STM32_FUNCTION(15, "LCD_B5"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(165, "PK5"),
+		STM32_FUNCTION(0, "GPIOK5"),
+		STM32_FUNCTION(15, "LCD_B6"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(166, "PK6"),
+		STM32_FUNCTION(0, "GPIOK6"),
+		STM32_FUNCTION(15, "LCD_B7"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+	STM32_PIN(
+		PINCTRL_PIN(167, "PK7"),
+		STM32_FUNCTION(0, "GPIOK7"),
+		STM32_FUNCTION(15, "LCD_DE"),
+		STM32_FUNCTION(16, "EVENTOUT"),
+		STM32_FUNCTION(17, "ANALOG")
+	),
+};
+
+static struct stm32_pinctrl_match_data stm32f769_match_data = {
+	.pins = stm32f769_pins,
+	.npins = ARRAY_SIZE(stm32f769_pins),
+};
+
+static const struct of_device_id stm32f769_pctrl_match[] = {
+	{
+		.compatible = "st,stm32f769-pinctrl",
+		.data = &stm32f769_match_data,
+	},
+	{ }
+};
+
+static struct platform_driver stm32f769_pinctrl_driver = {
+	.probe = stm32_pctl_probe,
+	.driver = {
+		.name = "stm32f769-pinctrl",
+		.of_match_table = stm32f769_pctrl_match,
+	},
+};
+
+static int __init stm32f769_pinctrl_init(void)
+{
+	return platform_driver_register(&stm32f769_pinctrl_driver);
+}
+arch_initcall(stm32f769_pinctrl_init);
-- 
2.7.4

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^ permalink raw reply related	[flat|nested] 10+ messages in thread

* Re: [PATCH 2/5] pinctrl: stm32: add STM32F769 MCU support
  2017-12-11  8:54   ` [PATCH 2/5] pinctrl: stm32: add STM32F769 MCU support Alexandre Torgue
@ 2018-01-18 14:05     ` Patrice CHOTARD
       [not found]       ` <1249efb1-e553-2205-d953-8cbf98b6365d-qxv4g6HH51o@public.gmane.org>
  2018-01-22  8:25     ` Linus Walleij
  1 sibling, 1 reply; 10+ messages in thread
From: Patrice CHOTARD @ 2018-01-18 14:05 UTC (permalink / raw)
  To: Alexandre TORGUE, Maxime Coquelin, Linus Walleij, Rob Herring,
	Mark Rutland, Jonathan Corbet, Russell King
  Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org

Hi Linus

It's a gentle reminder because this patch seems not yet merged in any of 
your pinctrl branch.

Thanks

Patrice

On 12/11/2017 09:54 AM, Alexandre Torgue wrote:
> This patch which adds STM32F769 pinctrl and GPIO support, relies on the
> generic STM32 pinctrl driver.
> 
> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
> 
> diff --git a/drivers/pinctrl/stm32/Kconfig b/drivers/pinctrl/stm32/Kconfig
> index 7e1fe39..397f8c1 100644
> --- a/drivers/pinctrl/stm32/Kconfig
> +++ b/drivers/pinctrl/stm32/Kconfig
> @@ -27,6 +27,12 @@ config PINCTRL_STM32F746
>   	default MACH_STM32F746
>   	select PINCTRL_STM32
>   
> +config PINCTRL_STM32F769
> +	bool "STMicroelectronics STM32F769 pin control" if COMPILE_TEST && !MACH_STM32F769
> +	depends on OF
> +	default MACH_STM32F769
> +	select PINCTRL_STM32
> +
>   config PINCTRL_STM32H743
>   	bool "STMicroelectronics STM32H743 pin control" if COMPILE_TEST && !MACH_STM32H743
>   	depends on OF
> diff --git a/drivers/pinctrl/stm32/Makefile b/drivers/pinctrl/stm32/Makefile
> index d13ca35..7d63e4a 100644
> --- a/drivers/pinctrl/stm32/Makefile
> +++ b/drivers/pinctrl/stm32/Makefile
> @@ -6,4 +6,5 @@ obj-$(CONFIG_PINCTRL_STM32) += pinctrl-stm32.o
>   obj-$(CONFIG_PINCTRL_STM32F429)	+= pinctrl-stm32f429.o
>   obj-$(CONFIG_PINCTRL_STM32F469)	+= pinctrl-stm32f469.o
>   obj-$(CONFIG_PINCTRL_STM32F746)	+= pinctrl-stm32f746.o
> +obj-$(CONFIG_PINCTRL_STM32F769)	+= pinctrl-stm32f769.o
>   obj-$(CONFIG_PINCTRL_STM32H743)	+= pinctrl-stm32h743.o
> diff --git a/drivers/pinctrl/stm32/pinctrl-stm32f769.c b/drivers/pinctrl/stm32/pinctrl-stm32f769.c
> new file mode 100644
> index 0000000..f81c51c
> --- /dev/null
> +++ b/drivers/pinctrl/stm32/pinctrl-stm32f769.c
> @@ -0,0 +1,1827 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Copyright (C) STMicroelectronics 2017
> + * Author:  Alexandre Torgue <alexandre.torgue@st.com> for STMicroelectronics.
> + */
> +#include <linux/init.h>
> +#include <linux/of.h>
> +#include <linux/platform_device.h>
> +
> +#include "pinctrl-stm32.h"
> +
> +static const struct stm32_desc_pin stm32f769_pins[] = {
> +	STM32_PIN(
> +		PINCTRL_PIN(0, "PA0"),
> +		STM32_FUNCTION(0, "GPIOA0"),
> +		STM32_FUNCTION(2, "TIM2_CH1 TIM2_ETR"),
> +		STM32_FUNCTION(3, "TIM5_CH1"),
> +		STM32_FUNCTION(4, "TIM8_ETR"),
> +		STM32_FUNCTION(8, "USART2_CTS"),
> +		STM32_FUNCTION(9, "UART4_TX"),
> +		STM32_FUNCTION(11, "SAI2_SD_B"),
> +		STM32_FUNCTION(12, "ETH_MII_CRS"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(1, "PA1"),
> +		STM32_FUNCTION(0, "GPIOA1"),
> +		STM32_FUNCTION(2, "TIM2_CH2"),
> +		STM32_FUNCTION(3, "TIM5_CH2"),
> +		STM32_FUNCTION(8, "USART2_RTS"),
> +		STM32_FUNCTION(9, "UART4_RX"),
> +		STM32_FUNCTION(10, "QUADSPI_BK1_IO3"),
> +		STM32_FUNCTION(11, "SAI2_MCLK_B"),
> +		STM32_FUNCTION(12, "ETH_MII_RX_CLK ETH_RMII_REF_CLK"),
> +		STM32_FUNCTION(15, "LCD_R2"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(2, "PA2"),
> +		STM32_FUNCTION(0, "GPIOA2"),
> +		STM32_FUNCTION(2, "TIM2_CH3"),
> +		STM32_FUNCTION(3, "TIM5_CH3"),
> +		STM32_FUNCTION(4, "TIM9_CH1"),
> +		STM32_FUNCTION(8, "USART2_TX"),
> +		STM32_FUNCTION(9, "SAI2_SCK_B"),
> +		STM32_FUNCTION(12, "ETH_MDIO"),
> +		STM32_FUNCTION(13, "MDIOS_MDIO"),
> +		STM32_FUNCTION(15, "LCD_R1"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(3, "PA3"),
> +		STM32_FUNCTION(0, "GPIOA3"),
> +		STM32_FUNCTION(2, "TIM2_CH4"),
> +		STM32_FUNCTION(3, "TIM5_CH4"),
> +		STM32_FUNCTION(4, "TIM9_CH2"),
> +		STM32_FUNCTION(8, "USART2_RX"),
> +		STM32_FUNCTION(10, "LCD_B2"),
> +		STM32_FUNCTION(11, "OTG_HS_ULPI_D0"),
> +		STM32_FUNCTION(12, "ETH_MII_COL"),
> +		STM32_FUNCTION(15, "LCD_B5"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(4, "PA4"),
> +		STM32_FUNCTION(0, "GPIOA4"),
> +		STM32_FUNCTION(6, "SPI1_NSS I2S1_WS"),
> +		STM32_FUNCTION(7, "SPI3_NSS I2S3_WS"),
> +		STM32_FUNCTION(8, "USART2_CK"),
> +		STM32_FUNCTION(9, "SPI6_NSS"),
> +		STM32_FUNCTION(13, "OTG_HS_SOF"),
> +		STM32_FUNCTION(14, "DCMI_HSYNC"),
> +		STM32_FUNCTION(15, "LCD_VSYNC"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(5, "PA5"),
> +		STM32_FUNCTION(0, "GPIOA5"),
> +		STM32_FUNCTION(2, "TIM2_CH1 TIM2_ETR"),
> +		STM32_FUNCTION(4, "TIM8_CH1N"),
> +		STM32_FUNCTION(6, "SPI1_SCK I2S1_CK"),
> +		STM32_FUNCTION(9, "SPI6_SCK"),
> +		STM32_FUNCTION(11, "OTG_HS_ULPI_CK"),
> +		STM32_FUNCTION(15, "LCD_R4"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(6, "PA6"),
> +		STM32_FUNCTION(0, "GPIOA6"),
> +		STM32_FUNCTION(2, "TIM1_BKIN"),
> +		STM32_FUNCTION(3, "TIM3_CH1"),
> +		STM32_FUNCTION(4, "TIM8_BKIN"),
> +		STM32_FUNCTION(6, "SPI1_MISO"),
> +		STM32_FUNCTION(9, "SPI6_MISO"),
> +		STM32_FUNCTION(10, "TIM13_CH1"),
> +		STM32_FUNCTION(13, "MDIOS_MDC"),
> +		STM32_FUNCTION(14, "DCMI_PIXCLK"),
> +		STM32_FUNCTION(15, "LCD_G2"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(7, "PA7"),
> +		STM32_FUNCTION(0, "GPIOA7"),
> +		STM32_FUNCTION(2, "TIM1_CH1N"),
> +		STM32_FUNCTION(3, "TIM3_CH2"),
> +		STM32_FUNCTION(4, "TIM8_CH1N"),
> +		STM32_FUNCTION(6, "SPI1_MOSI I2S1_SD"),
> +		STM32_FUNCTION(9, "SPI6_MOSI"),
> +		STM32_FUNCTION(10, "TIM14_CH1"),
> +		STM32_FUNCTION(12, "ETH_MII_RX_DV ETH_RMII_CRS_DV"),
> +		STM32_FUNCTION(13, "FMC_SDNWE"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(8, "PA8"),
> +		STM32_FUNCTION(0, "GPIOA8"),
> +		STM32_FUNCTION(1, "MCO1"),
> +		STM32_FUNCTION(2, "TIM1_CH1"),
> +		STM32_FUNCTION(4, "TIM8_BKIN2"),
> +		STM32_FUNCTION(5, "I2C3_SCL"),
> +		STM32_FUNCTION(8, "USART1_CK"),
> +		STM32_FUNCTION(11, "OTG_FS_SOF"),
> +		STM32_FUNCTION(12, "CAN3_RX"),
> +		STM32_FUNCTION(13, "UART7_RX"),
> +		STM32_FUNCTION(14, "LCD_B3"),
> +		STM32_FUNCTION(15, "LCD_R6"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(9, "PA9"),
> +		STM32_FUNCTION(0, "GPIOA9"),
> +		STM32_FUNCTION(2, "TIM1_CH2"),
> +		STM32_FUNCTION(5, "I2C3_SMBA"),
> +		STM32_FUNCTION(6, "SPI2_SCK I2S2_CK"),
> +		STM32_FUNCTION(8, "USART1_TX"),
> +		STM32_FUNCTION(14, "DCMI_D0"),
> +		STM32_FUNCTION(15, "LCD_R5"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(10, "PA10"),
> +		STM32_FUNCTION(0, "GPIOA10"),
> +		STM32_FUNCTION(2, "TIM1_CH3"),
> +		STM32_FUNCTION(8, "USART1_RX"),
> +		STM32_FUNCTION(10, "LCD_B4"),
> +		STM32_FUNCTION(11, "OTG_FS_ID"),
> +		STM32_FUNCTION(13, "MDIOS_MDIO"),
> +		STM32_FUNCTION(14, "DCMI_D1"),
> +		STM32_FUNCTION(15, "LCD_B1"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(11, "PA11"),
> +		STM32_FUNCTION(0, "GPIOA11"),
> +		STM32_FUNCTION(2, "TIM1_CH4"),
> +		STM32_FUNCTION(6, "SPI2_NSS I2S2_WS"),
> +		STM32_FUNCTION(7, "UART4_RX"),
> +		STM32_FUNCTION(8, "USART1_CTS"),
> +		STM32_FUNCTION(10, "CAN1_RX"),
> +		STM32_FUNCTION(11, "OTG_FS_DM"),
> +		STM32_FUNCTION(15, "LCD_R4"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(12, "PA12"),
> +		STM32_FUNCTION(0, "GPIOA12"),
> +		STM32_FUNCTION(2, "TIM1_ETR"),
> +		STM32_FUNCTION(6, "SPI2_SCK I2S2_CK"),
> +		STM32_FUNCTION(7, "UART4_TX"),
> +		STM32_FUNCTION(8, "USART1_RTS"),
> +		STM32_FUNCTION(9, "SAI2_FS_B"),
> +		STM32_FUNCTION(10, "CAN1_TX"),
> +		STM32_FUNCTION(11, "OTG_FS_DP"),
> +		STM32_FUNCTION(15, "LCD_R5"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(13, "PA13"),
> +		STM32_FUNCTION(0, "GPIOA13"),
> +		STM32_FUNCTION(1, "JTMS SWDIO"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(14, "PA14"),
> +		STM32_FUNCTION(0, "GPIOA14"),
> +		STM32_FUNCTION(1, "JTCK SWCLK"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(15, "PA15"),
> +		STM32_FUNCTION(0, "GPIOA15"),
> +		STM32_FUNCTION(1, "JTDI"),
> +		STM32_FUNCTION(2, "TIM2_CH1 TIM2_ETR"),
> +		STM32_FUNCTION(5, "HDMI_CEC"),
> +		STM32_FUNCTION(6, "SPI1_NSS I2S1_WS"),
> +		STM32_FUNCTION(7, "SPI3_NSS I2S3_WS"),
> +		STM32_FUNCTION(8, "SPI6_NSS"),
> +		STM32_FUNCTION(9, "UART4_RTS"),
> +		STM32_FUNCTION(12, "CAN3_TX"),
> +		STM32_FUNCTION(13, "UART7_TX"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(16, "PB0"),
> +		STM32_FUNCTION(0, "GPIOB0"),
> +		STM32_FUNCTION(2, "TIM1_CH2N"),
> +		STM32_FUNCTION(3, "TIM3_CH3"),
> +		STM32_FUNCTION(4, "TIM8_CH2N"),
> +		STM32_FUNCTION(7, "DFSDM_CKOUT"),
> +		STM32_FUNCTION(9, "UART4_CTS"),
> +		STM32_FUNCTION(10, "LCD_R3"),
> +		STM32_FUNCTION(11, "OTG_HS_ULPI_D1"),
> +		STM32_FUNCTION(12, "ETH_MII_RXD2"),
> +		STM32_FUNCTION(15, "LCD_G1"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(17, "PB1"),
> +		STM32_FUNCTION(0, "GPIOB1"),
> +		STM32_FUNCTION(2, "TIM1_CH3N"),
> +		STM32_FUNCTION(3, "TIM3_CH4"),
> +		STM32_FUNCTION(4, "TIM8_CH3N"),
> +		STM32_FUNCTION(7, "DFSDM_DATIN1"),
> +		STM32_FUNCTION(10, "LCD_R6"),
> +		STM32_FUNCTION(11, "OTG_HS_ULPI_D2"),
> +		STM32_FUNCTION(12, "ETH_MII_RXD3"),
> +		STM32_FUNCTION(15, "LCD_G0"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(18, "PB2"),
> +		STM32_FUNCTION(0, "GPIOB2"),
> +		STM32_FUNCTION(7, "SAI1_SD_A"),
> +		STM32_FUNCTION(8, "SPI3_MOSI I2S3_SD"),
> +		STM32_FUNCTION(10, "QUADSPI_CLK"),
> +		STM32_FUNCTION(11, "DFSDM_CKIN1"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(19, "PB3"),
> +		STM32_FUNCTION(0, "GPIOB3"),
> +		STM32_FUNCTION(1, "JTDO TRACESWO"),
> +		STM32_FUNCTION(2, "TIM2_CH2"),
> +		STM32_FUNCTION(6, "SPI1_SCK I2S1_CK"),
> +		STM32_FUNCTION(7, "SPI3_SCK I2S3_CK"),
> +		STM32_FUNCTION(9, "SPI6_SCK"),
> +		STM32_FUNCTION(11, "SDMMC2_D2"),
> +		STM32_FUNCTION(12, "CAN3_RX"),
> +		STM32_FUNCTION(13, "UART7_RX"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(20, "PB4"),
> +		STM32_FUNCTION(0, "GPIOB4"),
> +		STM32_FUNCTION(1, "NJTRST"),
> +		STM32_FUNCTION(3, "TIM3_CH1"),
> +		STM32_FUNCTION(6, "SPI1_MISO"),
> +		STM32_FUNCTION(7, "SPI3_MISO"),
> +		STM32_FUNCTION(8, "SPI2_NSS I2S2_WS"),
> +		STM32_FUNCTION(9, "SPI6_MISO"),
> +		STM32_FUNCTION(11, "SDMMC2_D3"),
> +		STM32_FUNCTION(12, "CAN3_TX"),
> +		STM32_FUNCTION(13, "UART7_TX"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(21, "PB5"),
> +		STM32_FUNCTION(0, "GPIOB5"),
> +		STM32_FUNCTION(2, "UART5_RX"),
> +		STM32_FUNCTION(3, "TIM3_CH2"),
> +		STM32_FUNCTION(5, "I2C1_SMBA"),
> +		STM32_FUNCTION(6, "SPI1_MOSI I2S1_SD"),
> +		STM32_FUNCTION(7, "SPI3_MOSI I2S3_SD"),
> +		STM32_FUNCTION(9, "SPI6_MOSI"),
> +		STM32_FUNCTION(10, "CAN2_RX"),
> +		STM32_FUNCTION(11, "OTG_HS_ULPI_D7"),
> +		STM32_FUNCTION(12, "ETH_PPS_OUT"),
> +		STM32_FUNCTION(13, "FMC_SDCKE1"),
> +		STM32_FUNCTION(14, "DCMI_D10"),
> +		STM32_FUNCTION(15, "LCD_G7"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(22, "PB6"),
> +		STM32_FUNCTION(0, "GPIOB6"),
> +		STM32_FUNCTION(2, "UART5_TX"),
> +		STM32_FUNCTION(3, "TIM4_CH1"),
> +		STM32_FUNCTION(4, "HDMI_CEC"),
> +		STM32_FUNCTION(5, "I2C1_SCL"),
> +		STM32_FUNCTION(7, "DFSDM_DATIN5"),
> +		STM32_FUNCTION(8, "USART1_TX"),
> +		STM32_FUNCTION(10, "CAN2_TX"),
> +		STM32_FUNCTION(11, "QUADSPI_BK1_NCS"),
> +		STM32_FUNCTION(12, "I2C4_SCL"),
> +		STM32_FUNCTION(13, "FMC_SDNE1"),
> +		STM32_FUNCTION(14, "DCMI_D5"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(23, "PB7"),
> +		STM32_FUNCTION(0, "GPIOB7"),
> +		STM32_FUNCTION(3, "TIM4_CH2"),
> +		STM32_FUNCTION(5, "I2C1_SDA"),
> +		STM32_FUNCTION(7, "DFSDM_CKIN5"),
> +		STM32_FUNCTION(8, "USART1_RX"),
> +		STM32_FUNCTION(12, "I2C4_SDA"),
> +		STM32_FUNCTION(13, "FMC_NL"),
> +		STM32_FUNCTION(14, "DCMI_VSYNC"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(24, "PB8"),
> +		STM32_FUNCTION(0, "GPIOB8"),
> +		STM32_FUNCTION(2, "I2C4_SCL"),
> +		STM32_FUNCTION(3, "TIM4_CH3"),
> +		STM32_FUNCTION(4, "TIM10_CH1"),
> +		STM32_FUNCTION(5, "I2C1_SCL"),
> +		STM32_FUNCTION(7, "DFSDM_CKIN7"),
> +		STM32_FUNCTION(8, "UART5_RX"),
> +		STM32_FUNCTION(10, "CAN1_RX"),
> +		STM32_FUNCTION(11, "SDMMC2_D4"),
> +		STM32_FUNCTION(12, "ETH_MII_TXD3"),
> +		STM32_FUNCTION(13, "SDMMC1_D4"),
> +		STM32_FUNCTION(14, "DCMI_D6"),
> +		STM32_FUNCTION(15, "LCD_B6"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(25, "PB9"),
> +		STM32_FUNCTION(0, "GPIOB9"),
> +		STM32_FUNCTION(2, "I2C4_SDA"),
> +		STM32_FUNCTION(3, "TIM4_CH4"),
> +		STM32_FUNCTION(4, "TIM11_CH1"),
> +		STM32_FUNCTION(5, "I2C1_SDA"),
> +		STM32_FUNCTION(6, "SPI2_NSS I2S2_WS"),
> +		STM32_FUNCTION(7, "DFSDM_DATIN7"),
> +		STM32_FUNCTION(8, "UART5_TX"),
> +		STM32_FUNCTION(10, "CAN1_TX"),
> +		STM32_FUNCTION(11, "SDMMC2_D5"),
> +		STM32_FUNCTION(12, "I2C4_SMBA"),
> +		STM32_FUNCTION(13, "SDMMC1_D5"),
> +		STM32_FUNCTION(14, "DCMI_D7"),
> +		STM32_FUNCTION(15, "LCD_B7"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(26, "PB10"),
> +		STM32_FUNCTION(0, "GPIOB10"),
> +		STM32_FUNCTION(2, "TIM2_CH3"),
> +		STM32_FUNCTION(5, "I2C2_SCL"),
> +		STM32_FUNCTION(6, "SPI2_SCK I2S2_CK"),
> +		STM32_FUNCTION(7, "DFSDM_DATIN7"),
> +		STM32_FUNCTION(8, "USART3_TX"),
> +		STM32_FUNCTION(10, "QUADSPI_BK1_NCS"),
> +		STM32_FUNCTION(11, "OTG_HS_ULPI_D3"),
> +		STM32_FUNCTION(12, "ETH_MII_RX_ER"),
> +		STM32_FUNCTION(15, "LCD_G4"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(27, "PB11"),
> +		STM32_FUNCTION(0, "GPIOB11"),
> +		STM32_FUNCTION(2, "TIM2_CH4"),
> +		STM32_FUNCTION(5, "I2C2_SDA"),
> +		STM32_FUNCTION(7, "DFSDM_CKIN7"),
> +		STM32_FUNCTION(8, "USART3_RX"),
> +		STM32_FUNCTION(11, "OTG_HS_ULPI_D4"),
> +		STM32_FUNCTION(12, "ETH_MII_TX_EN ETH_RMII_TX_EN"),
> +		STM32_FUNCTION(14, "DSI_TE"),
> +		STM32_FUNCTION(15, "LCD_G5"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(28, "PB12"),
> +		STM32_FUNCTION(0, "GPIOB12"),
> +		STM32_FUNCTION(2, "TIM1_BKIN"),
> +		STM32_FUNCTION(5, "I2C2_SMBA"),
> +		STM32_FUNCTION(6, "SPI2_NSS I2S2_WS"),
> +		STM32_FUNCTION(7, "DFSDM_DATIN1"),
> +		STM32_FUNCTION(8, "USART3_CK"),
> +		STM32_FUNCTION(9, "UART5_RX"),
> +		STM32_FUNCTION(10, "CAN2_RX"),
> +		STM32_FUNCTION(11, "OTG_HS_ULPI_D5"),
> +		STM32_FUNCTION(12, "ETH_MII_TXD0 ETH_RMII_TXD0"),
> +		STM32_FUNCTION(13, "OTG_HS_ID"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(29, "PB13"),
> +		STM32_FUNCTION(0, "GPIOB13"),
> +		STM32_FUNCTION(2, "TIM1_CH1N"),
> +		STM32_FUNCTION(6, "SPI2_SCK I2S2_CK"),
> +		STM32_FUNCTION(7, "DFSDM_CKIN1"),
> +		STM32_FUNCTION(8, "USART3_CTS"),
> +		STM32_FUNCTION(9, "UART5_TX"),
> +		STM32_FUNCTION(10, "CAN2_TX"),
> +		STM32_FUNCTION(11, "OTG_HS_ULPI_D6"),
> +		STM32_FUNCTION(12, "ETH_MII_TXD1 ETH_RMII_TXD1"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(30, "PB14"),
> +		STM32_FUNCTION(0, "GPIOB14"),
> +		STM32_FUNCTION(2, "TIM1_CH2N"),
> +		STM32_FUNCTION(4, "TIM8_CH2N"),
> +		STM32_FUNCTION(5, "USART1_TX"),
> +		STM32_FUNCTION(6, "SPI2_MISO"),
> +		STM32_FUNCTION(7, "DFSDM_DATIN2"),
> +		STM32_FUNCTION(8, "USART3_RTS"),
> +		STM32_FUNCTION(9, "UART4_RTS"),
> +		STM32_FUNCTION(10, "TIM12_CH1"),
> +		STM32_FUNCTION(11, "SDMMC2_D0"),
> +		STM32_FUNCTION(13, "OTG_HS_DM"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(31, "PB15"),
> +		STM32_FUNCTION(0, "GPIOB15"),
> +		STM32_FUNCTION(1, "RTC_REFIN"),
> +		STM32_FUNCTION(2, "TIM1_CH3N"),
> +		STM32_FUNCTION(4, "TIM8_CH3N"),
> +		STM32_FUNCTION(5, "USART1_RX"),
> +		STM32_FUNCTION(6, "SPI2_MOSI I2S2_SD"),
> +		STM32_FUNCTION(7, "DFSDM_CKIN2"),
> +		STM32_FUNCTION(9, "UART4_CTS"),
> +		STM32_FUNCTION(10, "TIM12_CH2"),
> +		STM32_FUNCTION(11, "SDMMC2_D1"),
> +		STM32_FUNCTION(13, "OTG_HS_DP"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(32, "PC0"),
> +		STM32_FUNCTION(0, "GPIOC0"),
> +		STM32_FUNCTION(4, "DFSDM_CKIN0"),
> +		STM32_FUNCTION(7, "DFSDM_DATIN4"),
> +		STM32_FUNCTION(9, "SAI2_FS_B"),
> +		STM32_FUNCTION(11, "OTG_HS_ULPI_STP"),
> +		STM32_FUNCTION(13, "FMC_SDNWE"),
> +		STM32_FUNCTION(15, "LCD_R5"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(33, "PC1"),
> +		STM32_FUNCTION(0, "GPIOC1"),
> +		STM32_FUNCTION(1, "TRACED0"),
> +		STM32_FUNCTION(4, "DFSDM_DATIN0"),
> +		STM32_FUNCTION(6, "SPI2_MOSI I2S2_SD"),
> +		STM32_FUNCTION(7, "SAI1_SD_A"),
> +		STM32_FUNCTION(11, "DFSDM_CKIN4"),
> +		STM32_FUNCTION(12, "ETH_MDC"),
> +		STM32_FUNCTION(13, "MDIOS_MDC"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(34, "PC2"),
> +		STM32_FUNCTION(0, "GPIOC2"),
> +		STM32_FUNCTION(4, "DFSDM_CKIN1"),
> +		STM32_FUNCTION(6, "SPI2_MISO"),
> +		STM32_FUNCTION(7, "DFSDM_CKOUT"),
> +		STM32_FUNCTION(11, "OTG_HS_ULPI_DIR"),
> +		STM32_FUNCTION(12, "ETH_MII_TXD2"),
> +		STM32_FUNCTION(13, "FMC_SDNE0"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(35, "PC3"),
> +		STM32_FUNCTION(0, "GPIOC3"),
> +		STM32_FUNCTION(4, "DFSDM_DATIN1"),
> +		STM32_FUNCTION(6, "SPI2_MOSI I2S2_SD"),
> +		STM32_FUNCTION(11, "OTG_HS_ULPI_NXT"),
> +		STM32_FUNCTION(12, "ETH_MII_TX_CLK"),
> +		STM32_FUNCTION(13, "FMC_SDCKE0"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(36, "PC4"),
> +		STM32_FUNCTION(0, "GPIOC4"),
> +		STM32_FUNCTION(4, "DFSDM_CKIN2"),
> +		STM32_FUNCTION(6, "I2S1_MCK"),
> +		STM32_FUNCTION(9, "SPDIF_RX2"),
> +		STM32_FUNCTION(12, "ETH_MII_RXD0 ETH_RMII_RXD0"),
> +		STM32_FUNCTION(13, "FMC_SDNE0"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(37, "PC5"),
> +		STM32_FUNCTION(0, "GPIOC5"),
> +		STM32_FUNCTION(4, "DFSDM_DATIN2"),
> +		STM32_FUNCTION(9, "SPDIF_RX3"),
> +		STM32_FUNCTION(12, "ETH_MII_RXD1 ETH_RMII_RXD1"),
> +		STM32_FUNCTION(13, "FMC_SDCKE0"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(38, "PC6"),
> +		STM32_FUNCTION(0, "GPIOC6"),
> +		STM32_FUNCTION(3, "TIM3_CH1"),
> +		STM32_FUNCTION(4, "TIM8_CH1"),
> +		STM32_FUNCTION(6, "I2S2_MCK"),
> +		STM32_FUNCTION(8, "DFSDM_CKIN3"),
> +		STM32_FUNCTION(9, "USART6_TX"),
> +		STM32_FUNCTION(10, "FMC_NWAIT"),
> +		STM32_FUNCTION(11, "SDMMC2_D6"),
> +		STM32_FUNCTION(13, "SDMMC1_D6"),
> +		STM32_FUNCTION(14, "DCMI_D0"),
> +		STM32_FUNCTION(15, "LCD_HSYNC"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(39, "PC7"),
> +		STM32_FUNCTION(0, "GPIOC7"),
> +		STM32_FUNCTION(3, "TIM3_CH2"),
> +		STM32_FUNCTION(4, "TIM8_CH2"),
> +		STM32_FUNCTION(7, "I2S3_MCK"),
> +		STM32_FUNCTION(8, "DFSDM_DATIN3"),
> +		STM32_FUNCTION(9, "USART6_RX"),
> +		STM32_FUNCTION(10, "FMC_NE1"),
> +		STM32_FUNCTION(11, "SDMMC2_D7"),
> +		STM32_FUNCTION(13, "SDMMC1_D7"),
> +		STM32_FUNCTION(14, "DCMI_D1"),
> +		STM32_FUNCTION(15, "LCD_G6"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(40, "PC8"),
> +		STM32_FUNCTION(0, "GPIOC8"),
> +		STM32_FUNCTION(1, "TRACED1"),
> +		STM32_FUNCTION(3, "TIM3_CH3"),
> +		STM32_FUNCTION(4, "TIM8_CH3"),
> +		STM32_FUNCTION(8, "UART5_RTS"),
> +		STM32_FUNCTION(9, "USART6_CK"),
> +		STM32_FUNCTION(10, "FMC_NE2 FMC_NCE"),
> +		STM32_FUNCTION(13, "SDMMC1_D0"),
> +		STM32_FUNCTION(14, "DCMI_D2"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(41, "PC9"),
> +		STM32_FUNCTION(0, "GPIOC9"),
> +		STM32_FUNCTION(1, "MCO2"),
> +		STM32_FUNCTION(3, "TIM3_CH4"),
> +		STM32_FUNCTION(4, "TIM8_CH4"),
> +		STM32_FUNCTION(5, "I2C3_SDA"),
> +		STM32_FUNCTION(6, "I2S_CKIN"),
> +		STM32_FUNCTION(8, "UART5_CTS"),
> +		STM32_FUNCTION(10, "QUADSPI_BK1_IO0"),
> +		STM32_FUNCTION(11, "LCD_G3"),
> +		STM32_FUNCTION(13, "SDMMC1_D1"),
> +		STM32_FUNCTION(14, "DCMI_D3"),
> +		STM32_FUNCTION(15, "LCD_B2"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(42, "PC10"),
> +		STM32_FUNCTION(0, "GPIOC10"),
> +		STM32_FUNCTION(4, "DFSDM_CKIN5"),
> +		STM32_FUNCTION(7, "SPI3_SCK I2S3_CK"),
> +		STM32_FUNCTION(8, "USART3_TX"),
> +		STM32_FUNCTION(9, "UART4_TX"),
> +		STM32_FUNCTION(10, "QUADSPI_BK1_IO1"),
> +		STM32_FUNCTION(13, "SDMMC1_D2"),
> +		STM32_FUNCTION(14, "DCMI_D8"),
> +		STM32_FUNCTION(15, "LCD_R2"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(43, "PC11"),
> +		STM32_FUNCTION(0, "GPIOC11"),
> +		STM32_FUNCTION(4, "DFSDM_DATIN5"),
> +		STM32_FUNCTION(7, "SPI3_MISO"),
> +		STM32_FUNCTION(8, "USART3_RX"),
> +		STM32_FUNCTION(9, "UART4_RX"),
> +		STM32_FUNCTION(10, "QUADSPI_BK2_NCS"),
> +		STM32_FUNCTION(13, "SDMMC1_D3"),
> +		STM32_FUNCTION(14, "DCMI_D4"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(44, "PC12"),
> +		STM32_FUNCTION(0, "GPIOC12"),
> +		STM32_FUNCTION(1, "TRACED3"),
> +		STM32_FUNCTION(7, "SPI3_MOSI I2S3_SD"),
> +		STM32_FUNCTION(8, "USART3_CK"),
> +		STM32_FUNCTION(9, "UART5_TX"),
> +		STM32_FUNCTION(13, "SDMMC1_CK"),
> +		STM32_FUNCTION(14, "DCMI_D9"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(45, "PC13"),
> +		STM32_FUNCTION(0, "GPIOC13"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(46, "PC14"),
> +		STM32_FUNCTION(0, "GPIOC14"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(47, "PC15"),
> +		STM32_FUNCTION(0, "GPIOC15"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(48, "PD0"),
> +		STM32_FUNCTION(0, "GPIOD0"),
> +		STM32_FUNCTION(4, "DFSDM_CKIN6"),
> +		STM32_FUNCTION(7, "DFSDM_DATIN7"),
> +		STM32_FUNCTION(9, "UART4_RX"),
> +		STM32_FUNCTION(10, "CAN1_RX"),
> +		STM32_FUNCTION(13, "FMC_D2"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(49, "PD1"),
> +		STM32_FUNCTION(0, "GPIOD1"),
> +		STM32_FUNCTION(4, "DFSDM_DATIN6"),
> +		STM32_FUNCTION(7, "DFSDM_CKIN7"),
> +		STM32_FUNCTION(9, "UART4_TX"),
> +		STM32_FUNCTION(10, "CAN1_TX"),
> +		STM32_FUNCTION(13, "FMC_D3"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(50, "PD2"),
> +		STM32_FUNCTION(0, "GPIOD2"),
> +		STM32_FUNCTION(1, "TRACED2"),
> +		STM32_FUNCTION(3, "TIM3_ETR"),
> +		STM32_FUNCTION(9, "UART5_RX"),
> +		STM32_FUNCTION(13, "SDMMC1_CMD"),
> +		STM32_FUNCTION(14, "DCMI_D11"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(51, "PD3"),
> +		STM32_FUNCTION(0, "GPIOD3"),
> +		STM32_FUNCTION(4, "DFSDM_CKOUT"),
> +		STM32_FUNCTION(6, "SPI2_SCK I2S2_CK"),
> +		STM32_FUNCTION(7, "DFSDM_DATIN0"),
> +		STM32_FUNCTION(8, "USART2_CTS"),
> +		STM32_FUNCTION(13, "FMC_CLK"),
> +		STM32_FUNCTION(14, "DCMI_D5"),
> +		STM32_FUNCTION(15, "LCD_G7"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(52, "PD4"),
> +		STM32_FUNCTION(0, "GPIOD4"),
> +		STM32_FUNCTION(7, "DFSDM_CKIN0"),
> +		STM32_FUNCTION(8, "USART2_RTS"),
> +		STM32_FUNCTION(13, "FMC_NOE"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(53, "PD5"),
> +		STM32_FUNCTION(0, "GPIOD5"),
> +		STM32_FUNCTION(8, "USART2_TX"),
> +		STM32_FUNCTION(13, "FMC_NWE"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(54, "PD6"),
> +		STM32_FUNCTION(0, "GPIOD6"),
> +		STM32_FUNCTION(4, "DFSDM_CKIN4"),
> +		STM32_FUNCTION(6, "SPI3_MOSI I2S3_SD"),
> +		STM32_FUNCTION(7, "SAI1_SD_A"),
> +		STM32_FUNCTION(8, "USART2_RX"),
> +		STM32_FUNCTION(11, "DFSDM_DATIN1"),
> +		STM32_FUNCTION(12, "SDMMC2_CK"),
> +		STM32_FUNCTION(13, "FMC_NWAIT"),
> +		STM32_FUNCTION(14, "DCMI_D10"),
> +		STM32_FUNCTION(15, "LCD_B2"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(55, "PD7"),
> +		STM32_FUNCTION(0, "GPIOD7"),
> +		STM32_FUNCTION(4, "DFSDM_DATIN4"),
> +		STM32_FUNCTION(6, "SPI1_MOSI I2S1_SD"),
> +		STM32_FUNCTION(7, "DFSDM_CKIN1"),
> +		STM32_FUNCTION(8, "USART2_CK"),
> +		STM32_FUNCTION(9, "SPDIF_RX0"),
> +		STM32_FUNCTION(12, "SDMMC2_CMD"),
> +		STM32_FUNCTION(13, "FMC_NE1"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(56, "PD8"),
> +		STM32_FUNCTION(0, "GPIOD8"),
> +		STM32_FUNCTION(4, "DFSDM_CKIN3"),
> +		STM32_FUNCTION(8, "USART3_TX"),
> +		STM32_FUNCTION(9, "SPDIF_RX1"),
> +		STM32_FUNCTION(13, "FMC_D13"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(57, "PD9"),
> +		STM32_FUNCTION(0, "GPIOD9"),
> +		STM32_FUNCTION(4, "DFSDM_DATIN3"),
> +		STM32_FUNCTION(8, "USART3_RX"),
> +		STM32_FUNCTION(13, "FMC_D14"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(58, "PD10"),
> +		STM32_FUNCTION(0, "GPIOD10"),
> +		STM32_FUNCTION(4, "DFSDM_CKOUT"),
> +		STM32_FUNCTION(8, "USART3_CK"),
> +		STM32_FUNCTION(13, "FMC_D15"),
> +		STM32_FUNCTION(15, "LCD_B3"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(59, "PD11"),
> +		STM32_FUNCTION(0, "GPIOD11"),
> +		STM32_FUNCTION(5, "I2C4_SMBA"),
> +		STM32_FUNCTION(8, "USART3_CTS"),
> +		STM32_FUNCTION(10, "QUADSPI_BK1_IO0"),
> +		STM32_FUNCTION(11, "SAI2_SD_A"),
> +		STM32_FUNCTION(13, "FMC_A16 FMC_CLE"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(60, "PD12"),
> +		STM32_FUNCTION(0, "GPIOD12"),
> +		STM32_FUNCTION(3, "TIM4_CH1"),
> +		STM32_FUNCTION(4, "LPTIM1_IN1"),
> +		STM32_FUNCTION(5, "I2C4_SCL"),
> +		STM32_FUNCTION(8, "USART3_RTS"),
> +		STM32_FUNCTION(10, "QUADSPI_BK1_IO1"),
> +		STM32_FUNCTION(11, "SAI2_FS_A"),
> +		STM32_FUNCTION(13, "FMC_A17 FMC_ALE"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(61, "PD13"),
> +		STM32_FUNCTION(0, "GPIOD13"),
> +		STM32_FUNCTION(3, "TIM4_CH2"),
> +		STM32_FUNCTION(4, "LPTIM1_OUT"),
> +		STM32_FUNCTION(5, "I2C4_SDA"),
> +		STM32_FUNCTION(10, "QUADSPI_BK1_IO3"),
> +		STM32_FUNCTION(11, "SAI2_SCK_A"),
> +		STM32_FUNCTION(13, "FMC_A18"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(62, "PD14"),
> +		STM32_FUNCTION(0, "GPIOD14"),
> +		STM32_FUNCTION(3, "TIM4_CH3"),
> +		STM32_FUNCTION(9, "UART8_CTS"),
> +		STM32_FUNCTION(13, "FMC_D0"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(63, "PD15"),
> +		STM32_FUNCTION(0, "GPIOD15"),
> +		STM32_FUNCTION(3, "TIM4_CH4"),
> +		STM32_FUNCTION(9, "UART8_RTS"),
> +		STM32_FUNCTION(13, "FMC_D1"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(64, "PE0"),
> +		STM32_FUNCTION(0, "GPIOE0"),
> +		STM32_FUNCTION(3, "TIM4_ETR"),
> +		STM32_FUNCTION(4, "LPTIM1_ETR"),
> +		STM32_FUNCTION(9, "UART8_RX"),
> +		STM32_FUNCTION(11, "SAI2_MCLK_A"),
> +		STM32_FUNCTION(13, "FMC_NBL0"),
> +		STM32_FUNCTION(14, "DCMI_D2"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(65, "PE1"),
> +		STM32_FUNCTION(0, "GPIOE1"),
> +		STM32_FUNCTION(4, "LPTIM1_IN2"),
> +		STM32_FUNCTION(9, "UART8_TX"),
> +		STM32_FUNCTION(13, "FMC_NBL1"),
> +		STM32_FUNCTION(14, "DCMI_D3"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(66, "PE2"),
> +		STM32_FUNCTION(0, "GPIOE2"),
> +		STM32_FUNCTION(1, "TRACECLK"),
> +		STM32_FUNCTION(6, "SPI4_SCK"),
> +		STM32_FUNCTION(7, "SAI1_MCLK_A"),
> +		STM32_FUNCTION(10, "QUADSPI_BK1_IO2"),
> +		STM32_FUNCTION(12, "ETH_MII_TXD3"),
> +		STM32_FUNCTION(13, "FMC_A23"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(67, "PE3"),
> +		STM32_FUNCTION(0, "GPIOE3"),
> +		STM32_FUNCTION(1, "TRACED0"),
> +		STM32_FUNCTION(7, "SAI1_SD_B"),
> +		STM32_FUNCTION(13, "FMC_A19"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(68, "PE4"),
> +		STM32_FUNCTION(0, "GPIOE4"),
> +		STM32_FUNCTION(1, "TRACED1"),
> +		STM32_FUNCTION(6, "SPI4_NSS"),
> +		STM32_FUNCTION(7, "SAI1_FS_A"),
> +		STM32_FUNCTION(11, "DFSDM_DATIN3"),
> +		STM32_FUNCTION(13, "FMC_A20"),
> +		STM32_FUNCTION(14, "DCMI_D4"),
> +		STM32_FUNCTION(15, "LCD_B0"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(69, "PE5"),
> +		STM32_FUNCTION(0, "GPIOE5"),
> +		STM32_FUNCTION(1, "TRACED2"),
> +		STM32_FUNCTION(4, "TIM9_CH1"),
> +		STM32_FUNCTION(6, "SPI4_MISO"),
> +		STM32_FUNCTION(7, "SAI1_SCK_A"),
> +		STM32_FUNCTION(11, "DFSDM_CKIN3"),
> +		STM32_FUNCTION(13, "FMC_A21"),
> +		STM32_FUNCTION(14, "DCMI_D6"),
> +		STM32_FUNCTION(15, "LCD_G0"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(70, "PE6"),
> +		STM32_FUNCTION(0, "GPIOE6"),
> +		STM32_FUNCTION(1, "TRACED3"),
> +		STM32_FUNCTION(2, "TIM1_BKIN2"),
> +		STM32_FUNCTION(4, "TIM9_CH2"),
> +		STM32_FUNCTION(6, "SPI4_MOSI"),
> +		STM32_FUNCTION(7, "SAI1_SD_A"),
> +		STM32_FUNCTION(11, "SAI2_MCLK_B"),
> +		STM32_FUNCTION(13, "FMC_A22"),
> +		STM32_FUNCTION(14, "DCMI_D7"),
> +		STM32_FUNCTION(15, "LCD_G1"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(71, "PE7"),
> +		STM32_FUNCTION(0, "GPIOE7"),
> +		STM32_FUNCTION(2, "TIM1_ETR"),
> +		STM32_FUNCTION(7, "DFSDM_DATIN2"),
> +		STM32_FUNCTION(9, "UART7_RX"),
> +		STM32_FUNCTION(11, "QUADSPI_BK2_IO0"),
> +		STM32_FUNCTION(13, "FMC_D4"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(72, "PE8"),
> +		STM32_FUNCTION(0, "GPIOE8"),
> +		STM32_FUNCTION(2, "TIM1_CH1N"),
> +		STM32_FUNCTION(7, "DFSDM_CKIN2"),
> +		STM32_FUNCTION(9, "UART7_TX"),
> +		STM32_FUNCTION(11, "QUADSPI_BK2_IO1"),
> +		STM32_FUNCTION(13, "FMC_D5"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(73, "PE9"),
> +		STM32_FUNCTION(0, "GPIOE9"),
> +		STM32_FUNCTION(2, "TIM1_CH1"),
> +		STM32_FUNCTION(7, "DFSDM_CKOUT"),
> +		STM32_FUNCTION(9, "UART7_RTS"),
> +		STM32_FUNCTION(11, "QUADSPI_BK2_IO2"),
> +		STM32_FUNCTION(13, "FMC_D6"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(74, "PE10"),
> +		STM32_FUNCTION(0, "GPIOE10"),
> +		STM32_FUNCTION(2, "TIM1_CH2N"),
> +		STM32_FUNCTION(7, "DFSDM_DATIN4"),
> +		STM32_FUNCTION(9, "UART7_CTS"),
> +		STM32_FUNCTION(11, "QUADSPI_BK2_IO3"),
> +		STM32_FUNCTION(13, "FMC_D7"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(75, "PE11"),
> +		STM32_FUNCTION(0, "GPIOE11"),
> +		STM32_FUNCTION(2, "TIM1_CH2"),
> +		STM32_FUNCTION(6, "SPI4_NSS"),
> +		STM32_FUNCTION(7, "DFSDM_CKIN4"),
> +		STM32_FUNCTION(11, "SAI2_SD_B"),
> +		STM32_FUNCTION(13, "FMC_D8"),
> +		STM32_FUNCTION(15, "LCD_G3"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(76, "PE12"),
> +		STM32_FUNCTION(0, "GPIOE12"),
> +		STM32_FUNCTION(2, "TIM1_CH3N"),
> +		STM32_FUNCTION(6, "SPI4_SCK"),
> +		STM32_FUNCTION(7, "DFSDM_DATIN5"),
> +		STM32_FUNCTION(11, "SAI2_SCK_B"),
> +		STM32_FUNCTION(13, "FMC_D9"),
> +		STM32_FUNCTION(15, "LCD_B4"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(77, "PE13"),
> +		STM32_FUNCTION(0, "GPIOE13"),
> +		STM32_FUNCTION(2, "TIM1_CH3"),
> +		STM32_FUNCTION(6, "SPI4_MISO"),
> +		STM32_FUNCTION(7, "DFSDM_CKIN5"),
> +		STM32_FUNCTION(11, "SAI2_FS_B"),
> +		STM32_FUNCTION(13, "FMC_D10"),
> +		STM32_FUNCTION(15, "LCD_DE"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(78, "PE14"),
> +		STM32_FUNCTION(0, "GPIOE14"),
> +		STM32_FUNCTION(2, "TIM1_CH4"),
> +		STM32_FUNCTION(6, "SPI4_MOSI"),
> +		STM32_FUNCTION(11, "SAI2_MCLK_B"),
> +		STM32_FUNCTION(13, "FMC_D11"),
> +		STM32_FUNCTION(15, "LCD_CLK"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(79, "PE15"),
> +		STM32_FUNCTION(0, "GPIOE15"),
> +		STM32_FUNCTION(2, "TIM1_BKIN"),
> +		STM32_FUNCTION(13, "FMC_D12"),
> +		STM32_FUNCTION(15, "LCD_R7"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(80, "PF0"),
> +		STM32_FUNCTION(0, "GPIOF0"),
> +		STM32_FUNCTION(5, "I2C2_SDA"),
> +		STM32_FUNCTION(13, "FMC_A0"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(81, "PF1"),
> +		STM32_FUNCTION(0, "GPIOF1"),
> +		STM32_FUNCTION(5, "I2C2_SCL"),
> +		STM32_FUNCTION(13, "FMC_A1"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(82, "PF2"),
> +		STM32_FUNCTION(0, "GPIOF2"),
> +		STM32_FUNCTION(5, "I2C2_SMBA"),
> +		STM32_FUNCTION(13, "FMC_A2"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(83, "PF3"),
> +		STM32_FUNCTION(0, "GPIOF3"),
> +		STM32_FUNCTION(13, "FMC_A3"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(84, "PF4"),
> +		STM32_FUNCTION(0, "GPIOF4"),
> +		STM32_FUNCTION(13, "FMC_A4"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(85, "PF5"),
> +		STM32_FUNCTION(0, "GPIOF5"),
> +		STM32_FUNCTION(13, "FMC_A5"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(86, "PF6"),
> +		STM32_FUNCTION(0, "GPIOF6"),
> +		STM32_FUNCTION(4, "TIM10_CH1"),
> +		STM32_FUNCTION(6, "SPI5_NSS"),
> +		STM32_FUNCTION(7, "SAI1_SD_B"),
> +		STM32_FUNCTION(9, "UART7_RX"),
> +		STM32_FUNCTION(10, "QUADSPI_BK1_IO3"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(87, "PF7"),
> +		STM32_FUNCTION(0, "GPIOF7"),
> +		STM32_FUNCTION(4, "TIM11_CH1"),
> +		STM32_FUNCTION(6, "SPI5_SCK"),
> +		STM32_FUNCTION(7, "SAI1_MCLK_B"),
> +		STM32_FUNCTION(9, "UART7_TX"),
> +		STM32_FUNCTION(10, "QUADSPI_BK1_IO2"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(88, "PF8"),
> +		STM32_FUNCTION(0, "GPIOF8"),
> +		STM32_FUNCTION(6, "SPI5_MISO"),
> +		STM32_FUNCTION(7, "SAI1_SCK_B"),
> +		STM32_FUNCTION(9, "UART7_RTS"),
> +		STM32_FUNCTION(10, "TIM13_CH1"),
> +		STM32_FUNCTION(11, "QUADSPI_BK1_IO0"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(89, "PF9"),
> +		STM32_FUNCTION(0, "GPIOF9"),
> +		STM32_FUNCTION(6, "SPI5_MOSI"),
> +		STM32_FUNCTION(7, "SAI1_FS_B"),
> +		STM32_FUNCTION(9, "UART7_CTS"),
> +		STM32_FUNCTION(10, "TIM14_CH1"),
> +		STM32_FUNCTION(11, "QUADSPI_BK1_IO1"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(90, "PF10"),
> +		STM32_FUNCTION(0, "GPIOF10"),
> +		STM32_FUNCTION(10, "QUADSPI_CLK"),
> +		STM32_FUNCTION(14, "DCMI_D11"),
> +		STM32_FUNCTION(15, "LCD_DE"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(91, "PF11"),
> +		STM32_FUNCTION(0, "GPIOF11"),
> +		STM32_FUNCTION(6, "SPI5_MOSI"),
> +		STM32_FUNCTION(11, "SAI2_SD_B"),
> +		STM32_FUNCTION(13, "FMC_SDNRAS"),
> +		STM32_FUNCTION(14, "DCMI_D12"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(92, "PF12"),
> +		STM32_FUNCTION(0, "GPIOF12"),
> +		STM32_FUNCTION(13, "FMC_A6"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(93, "PF13"),
> +		STM32_FUNCTION(0, "GPIOF13"),
> +		STM32_FUNCTION(5, "I2C4_SMBA"),
> +		STM32_FUNCTION(7, "DFSDM_DATIN6"),
> +		STM32_FUNCTION(13, "FMC_A7"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(94, "PF14"),
> +		STM32_FUNCTION(0, "GPIOF14"),
> +		STM32_FUNCTION(5, "I2C4_SCL"),
> +		STM32_FUNCTION(7, "DFSDM_CKIN6"),
> +		STM32_FUNCTION(13, "FMC_A8"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(95, "PF15"),
> +		STM32_FUNCTION(0, "GPIOF15"),
> +		STM32_FUNCTION(5, "I2C4_SDA"),
> +		STM32_FUNCTION(13, "FMC_A9"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(96, "PG0"),
> +		STM32_FUNCTION(0, "GPIOG0"),
> +		STM32_FUNCTION(13, "FMC_A10"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(97, "PG1"),
> +		STM32_FUNCTION(0, "GPIOG1"),
> +		STM32_FUNCTION(13, "FMC_A11"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(98, "PG2"),
> +		STM32_FUNCTION(0, "GPIOG2"),
> +		STM32_FUNCTION(13, "FMC_A12"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(99, "PG3"),
> +		STM32_FUNCTION(0, "GPIOG3"),
> +		STM32_FUNCTION(13, "FMC_A13"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(100, "PG4"),
> +		STM32_FUNCTION(0, "GPIOG4"),
> +		STM32_FUNCTION(13, "FMC_A14 FMC_BA0"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(101, "PG5"),
> +		STM32_FUNCTION(0, "GPIOG5"),
> +		STM32_FUNCTION(13, "FMC_A15 FMC_BA1"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(102, "PG6"),
> +		STM32_FUNCTION(0, "GPIOG6"),
> +		STM32_FUNCTION(13, "FMC_NE3"),
> +		STM32_FUNCTION(14, "DCMI_D12"),
> +		STM32_FUNCTION(15, "LCD_R7"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(103, "PG7"),
> +		STM32_FUNCTION(0, "GPIOG7"),
> +		STM32_FUNCTION(7, "SAI1_MCLK_A"),
> +		STM32_FUNCTION(9, "USART6_CK"),
> +		STM32_FUNCTION(13, "FMC_INT"),
> +		STM32_FUNCTION(14, "DCMI_D13"),
> +		STM32_FUNCTION(15, "LCD_CLK"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(104, "PG8"),
> +		STM32_FUNCTION(0, "GPIOG8"),
> +		STM32_FUNCTION(6, "SPI6_NSS"),
> +		STM32_FUNCTION(8, "SPDIF_RX2"),
> +		STM32_FUNCTION(9, "USART6_RTS"),
> +		STM32_FUNCTION(12, "ETH_PPS_OUT"),
> +		STM32_FUNCTION(13, "FMC_SDCLK"),
> +		STM32_FUNCTION(15, "LCD_G7"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(105, "PG9"),
> +		STM32_FUNCTION(0, "GPIOG9"),
> +		STM32_FUNCTION(6, "SPI1_MISO"),
> +		STM32_FUNCTION(8, "SPDIF_RX3"),
> +		STM32_FUNCTION(9, "USART6_RX"),
> +		STM32_FUNCTION(10, "QUADSPI_BK2_IO2"),
> +		STM32_FUNCTION(11, "SAI2_FS_B"),
> +		STM32_FUNCTION(12, "SDMMC2_D0"),
> +		STM32_FUNCTION(13, "FMC_NE2 FMC_NCE"),
> +		STM32_FUNCTION(14, "DCMI_VSYNC"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(106, "PG10"),
> +		STM32_FUNCTION(0, "GPIOG10"),
> +		STM32_FUNCTION(6, "SPI1_NSS I2S1_WS"),
> +		STM32_FUNCTION(10, "LCD_G3"),
> +		STM32_FUNCTION(11, "SAI2_SD_B"),
> +		STM32_FUNCTION(12, "SDMMC2_D1"),
> +		STM32_FUNCTION(13, "FMC_NE3"),
> +		STM32_FUNCTION(14, "DCMI_D2"),
> +		STM32_FUNCTION(15, "LCD_B2"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(107, "PG11"),
> +		STM32_FUNCTION(0, "GPIOG11"),
> +		STM32_FUNCTION(6, "SPI1_SCK I2S1_CK"),
> +		STM32_FUNCTION(8, "SPDIF_RX0"),
> +		STM32_FUNCTION(11, "SDMMC2_D2"),
> +		STM32_FUNCTION(12, "ETH_MII_TX_EN ETH_RMII_TX_EN"),
> +		STM32_FUNCTION(14, "DCMI_D3"),
> +		STM32_FUNCTION(15, "LCD_B3"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(108, "PG12"),
> +		STM32_FUNCTION(0, "GPIOG12"),
> +		STM32_FUNCTION(4, "LPTIM1_IN1"),
> +		STM32_FUNCTION(6, "SPI6_MISO"),
> +		STM32_FUNCTION(8, "SPDIF_RX1"),
> +		STM32_FUNCTION(9, "USART6_RTS"),
> +		STM32_FUNCTION(10, "LCD_B4"),
> +		STM32_FUNCTION(12, "SDMMC2_D3"),
> +		STM32_FUNCTION(13, "FMC_NE4"),
> +		STM32_FUNCTION(15, "LCD_B1"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(109, "PG13"),
> +		STM32_FUNCTION(0, "GPIOG13"),
> +		STM32_FUNCTION(1, "TRACED0"),
> +		STM32_FUNCTION(4, "LPTIM1_OUT"),
> +		STM32_FUNCTION(6, "SPI6_SCK"),
> +		STM32_FUNCTION(9, "USART6_CTS"),
> +		STM32_FUNCTION(12, "ETH_MII_TXD0 ETH_RMII_TXD0"),
> +		STM32_FUNCTION(13, "FMC_A24"),
> +		STM32_FUNCTION(15, "LCD_R0"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(110, "PG14"),
> +		STM32_FUNCTION(0, "GPIOG14"),
> +		STM32_FUNCTION(1, "TRACED1"),
> +		STM32_FUNCTION(4, "LPTIM1_ETR"),
> +		STM32_FUNCTION(6, "SPI6_MOSI"),
> +		STM32_FUNCTION(9, "USART6_TX"),
> +		STM32_FUNCTION(10, "QUADSPI_BK2_IO3"),
> +		STM32_FUNCTION(12, "ETH_MII_TXD1 ETH_RMII_TXD1"),
> +		STM32_FUNCTION(13, "FMC_A25"),
> +		STM32_FUNCTION(15, "LCD_B0"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(111, "PG15"),
> +		STM32_FUNCTION(0, "GPIOG15"),
> +		STM32_FUNCTION(9, "USART6_CTS"),
> +		STM32_FUNCTION(13, "FMC_SDNCAS"),
> +		STM32_FUNCTION(14, "DCMI_D13"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(112, "PH0"),
> +		STM32_FUNCTION(0, "GPIOH0"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(113, "PH1"),
> +		STM32_FUNCTION(0, "GPIOH1"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(114, "PH2"),
> +		STM32_FUNCTION(0, "GPIOH2"),
> +		STM32_FUNCTION(4, "LPTIM1_IN2"),
> +		STM32_FUNCTION(10, "QUADSPI_BK2_IO0"),
> +		STM32_FUNCTION(11, "SAI2_SCK_B"),
> +		STM32_FUNCTION(12, "ETH_MII_CRS"),
> +		STM32_FUNCTION(13, "FMC_SDCKE0"),
> +		STM32_FUNCTION(15, "LCD_R0"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(115, "PH3"),
> +		STM32_FUNCTION(0, "GPIOH3"),
> +		STM32_FUNCTION(10, "QUADSPI_BK2_IO1"),
> +		STM32_FUNCTION(11, "SAI2_MCLK_B"),
> +		STM32_FUNCTION(12, "ETH_MII_COL"),
> +		STM32_FUNCTION(13, "FMC_SDNE0"),
> +		STM32_FUNCTION(15, "LCD_R1"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(116, "PH4"),
> +		STM32_FUNCTION(0, "GPIOH4"),
> +		STM32_FUNCTION(5, "I2C2_SCL"),
> +		STM32_FUNCTION(10, "LCD_G5"),
> +		STM32_FUNCTION(11, "OTG_HS_ULPI_NXT"),
> +		STM32_FUNCTION(15, "LCD_G4"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(117, "PH5"),
> +		STM32_FUNCTION(0, "GPIOH5"),
> +		STM32_FUNCTION(5, "I2C2_SDA"),
> +		STM32_FUNCTION(6, "SPI5_NSS"),
> +		STM32_FUNCTION(13, "FMC_SDNWE"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(118, "PH6"),
> +		STM32_FUNCTION(0, "GPIOH6"),
> +		STM32_FUNCTION(5, "I2C2_SMBA"),
> +		STM32_FUNCTION(6, "SPI5_SCK"),
> +		STM32_FUNCTION(10, "TIM12_CH1"),
> +		STM32_FUNCTION(12, "ETH_MII_RXD2"),
> +		STM32_FUNCTION(13, "FMC_SDNE1"),
> +		STM32_FUNCTION(14, "DCMI_D8"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(119, "PH7"),
> +		STM32_FUNCTION(0, "GPIOH7"),
> +		STM32_FUNCTION(5, "I2C3_SCL"),
> +		STM32_FUNCTION(6, "SPI5_MISO"),
> +		STM32_FUNCTION(12, "ETH_MII_RXD3"),
> +		STM32_FUNCTION(13, "FMC_SDCKE1"),
> +		STM32_FUNCTION(14, "DCMI_D9"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(120, "PH8"),
> +		STM32_FUNCTION(0, "GPIOH8"),
> +		STM32_FUNCTION(5, "I2C3_SDA"),
> +		STM32_FUNCTION(13, "FMC_D16"),
> +		STM32_FUNCTION(14, "DCMI_HSYNC"),
> +		STM32_FUNCTION(15, "LCD_R2"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(121, "PH9"),
> +		STM32_FUNCTION(0, "GPIOH9"),
> +		STM32_FUNCTION(5, "I2C3_SMBA"),
> +		STM32_FUNCTION(10, "TIM12_CH2"),
> +		STM32_FUNCTION(13, "FMC_D17"),
> +		STM32_FUNCTION(14, "DCMI_D0"),
> +		STM32_FUNCTION(15, "LCD_R3"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(122, "PH10"),
> +		STM32_FUNCTION(0, "GPIOH10"),
> +		STM32_FUNCTION(3, "TIM5_CH1"),
> +		STM32_FUNCTION(5, "I2C4_SMBA"),
> +		STM32_FUNCTION(13, "FMC_D18"),
> +		STM32_FUNCTION(14, "DCMI_D1"),
> +		STM32_FUNCTION(15, "LCD_R4"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(123, "PH11"),
> +		STM32_FUNCTION(0, "GPIOH11"),
> +		STM32_FUNCTION(3, "TIM5_CH2"),
> +		STM32_FUNCTION(5, "I2C4_SCL"),
> +		STM32_FUNCTION(13, "FMC_D19"),
> +		STM32_FUNCTION(14, "DCMI_D2"),
> +		STM32_FUNCTION(15, "LCD_R5"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(124, "PH12"),
> +		STM32_FUNCTION(0, "GPIOH12"),
> +		STM32_FUNCTION(3, "TIM5_CH3"),
> +		STM32_FUNCTION(5, "I2C4_SDA"),
> +		STM32_FUNCTION(13, "FMC_D20"),
> +		STM32_FUNCTION(14, "DCMI_D3"),
> +		STM32_FUNCTION(15, "LCD_R6"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(125, "PH13"),
> +		STM32_FUNCTION(0, "GPIOH13"),
> +		STM32_FUNCTION(4, "TIM8_CH1N"),
> +		STM32_FUNCTION(9, "UART4_TX"),
> +		STM32_FUNCTION(10, "CAN1_TX"),
> +		STM32_FUNCTION(13, "FMC_D21"),
> +		STM32_FUNCTION(15, "LCD_G2"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(126, "PH14"),
> +		STM32_FUNCTION(0, "GPIOH14"),
> +		STM32_FUNCTION(4, "TIM8_CH2N"),
> +		STM32_FUNCTION(9, "UART4_RX"),
> +		STM32_FUNCTION(10, "CAN1_RX"),
> +		STM32_FUNCTION(13, "FMC_D22"),
> +		STM32_FUNCTION(14, "DCMI_D4"),
> +		STM32_FUNCTION(15, "LCD_G3"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(127, "PH15"),
> +		STM32_FUNCTION(0, "GPIOH15"),
> +		STM32_FUNCTION(4, "TIM8_CH3N"),
> +		STM32_FUNCTION(13, "FMC_D23"),
> +		STM32_FUNCTION(14, "DCMI_D11"),
> +		STM32_FUNCTION(15, "LCD_G4"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(128, "PI0"),
> +		STM32_FUNCTION(0, "GPIOI0"),
> +		STM32_FUNCTION(3, "TIM5_CH4"),
> +		STM32_FUNCTION(6, "SPI2_NSS I2S2_WS"),
> +		STM32_FUNCTION(13, "FMC_D24"),
> +		STM32_FUNCTION(14, "DCMI_D13"),
> +		STM32_FUNCTION(15, "LCD_G5"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(129, "PI1"),
> +		STM32_FUNCTION(0, "GPIOI1"),
> +		STM32_FUNCTION(4, "TIM8_BKIN2"),
> +		STM32_FUNCTION(6, "SPI2_SCK I2S2_CK"),
> +		STM32_FUNCTION(13, "FMC_D25"),
> +		STM32_FUNCTION(14, "DCMI_D8"),
> +		STM32_FUNCTION(15, "LCD_G6"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(130, "PI2"),
> +		STM32_FUNCTION(0, "GPIOI2"),
> +		STM32_FUNCTION(4, "TIM8_CH4"),
> +		STM32_FUNCTION(6, "SPI2_MISO"),
> +		STM32_FUNCTION(13, "FMC_D26"),
> +		STM32_FUNCTION(14, "DCMI_D9"),
> +		STM32_FUNCTION(15, "LCD_G7"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(131, "PI3"),
> +		STM32_FUNCTION(0, "GPIOI3"),
> +		STM32_FUNCTION(4, "TIM8_ETR"),
> +		STM32_FUNCTION(6, "SPI2_MOSI I2S2_SD"),
> +		STM32_FUNCTION(13, "FMC_D27"),
> +		STM32_FUNCTION(14, "DCMI_D10"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(132, "PI4"),
> +		STM32_FUNCTION(0, "GPIOI4"),
> +		STM32_FUNCTION(4, "TIM8_BKIN"),
> +		STM32_FUNCTION(11, "SAI2_MCLK_A"),
> +		STM32_FUNCTION(13, "FMC_NBL2"),
> +		STM32_FUNCTION(14, "DCMI_D5"),
> +		STM32_FUNCTION(15, "LCD_B4"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(133, "PI5"),
> +		STM32_FUNCTION(0, "GPIOI5"),
> +		STM32_FUNCTION(4, "TIM8_CH1"),
> +		STM32_FUNCTION(11, "SAI2_SCK_A"),
> +		STM32_FUNCTION(13, "FMC_NBL3"),
> +		STM32_FUNCTION(14, "DCMI_VSYNC"),
> +		STM32_FUNCTION(15, "LCD_B5"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(134, "PI6"),
> +		STM32_FUNCTION(0, "GPIOI6"),
> +		STM32_FUNCTION(4, "TIM8_CH2"),
> +		STM32_FUNCTION(11, "SAI2_SD_A"),
> +		STM32_FUNCTION(13, "FMC_D28"),
> +		STM32_FUNCTION(14, "DCMI_D6"),
> +		STM32_FUNCTION(15, "LCD_B6"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(135, "PI7"),
> +		STM32_FUNCTION(0, "GPIOI7"),
> +		STM32_FUNCTION(4, "TIM8_CH3"),
> +		STM32_FUNCTION(11, "SAI2_FS_A"),
> +		STM32_FUNCTION(13, "FMC_D29"),
> +		STM32_FUNCTION(14, "DCMI_D7"),
> +		STM32_FUNCTION(15, "LCD_B7"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(136, "PI8"),
> +		STM32_FUNCTION(0, "GPIOI8"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(137, "PI9"),
> +		STM32_FUNCTION(0, "GPIOI9"),
> +		STM32_FUNCTION(9, "UART4_RX"),
> +		STM32_FUNCTION(10, "CAN1_RX"),
> +		STM32_FUNCTION(13, "FMC_D30"),
> +		STM32_FUNCTION(15, "LCD_VSYNC"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(138, "PI10"),
> +		STM32_FUNCTION(0, "GPIOI10"),
> +		STM32_FUNCTION(12, "ETH_MII_RX_ER"),
> +		STM32_FUNCTION(13, "FMC_D31"),
> +		STM32_FUNCTION(15, "LCD_HSYNC"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(139, "PI11"),
> +		STM32_FUNCTION(0, "GPIOI11"),
> +		STM32_FUNCTION(10, "LCD_G6"),
> +		STM32_FUNCTION(11, "OTG_HS_ULPI_DIR"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(140, "PI12"),
> +		STM32_FUNCTION(0, "GPIOI12"),
> +		STM32_FUNCTION(15, "LCD_HSYNC"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(141, "PI13"),
> +		STM32_FUNCTION(0, "GPIOI13"),
> +		STM32_FUNCTION(15, "LCD_VSYNC"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(142, "PI14"),
> +		STM32_FUNCTION(0, "GPIOI14"),
> +		STM32_FUNCTION(15, "LCD_CLK"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(143, "PI15"),
> +		STM32_FUNCTION(0, "GPIOI15"),
> +		STM32_FUNCTION(10, "LCD_G2"),
> +		STM32_FUNCTION(15, "LCD_R0"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(144, "PJ0"),
> +		STM32_FUNCTION(0, "GPIOJ0"),
> +		STM32_FUNCTION(10, "LCD_R7"),
> +		STM32_FUNCTION(15, "LCD_R1"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(145, "PJ1"),
> +		STM32_FUNCTION(0, "GPIOJ1"),
> +		STM32_FUNCTION(15, "LCD_R2"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(146, "PJ2"),
> +		STM32_FUNCTION(0, "GPIOJ2"),
> +		STM32_FUNCTION(14, "DSI_TE"),
> +		STM32_FUNCTION(15, "LCD_R3"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(147, "PJ3"),
> +		STM32_FUNCTION(0, "GPIOJ3"),
> +		STM32_FUNCTION(15, "LCD_R4"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(148, "PJ4"),
> +		STM32_FUNCTION(0, "GPIOJ4"),
> +		STM32_FUNCTION(15, "LCD_R5"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(149, "PJ5"),
> +		STM32_FUNCTION(0, "GPIOJ5"),
> +		STM32_FUNCTION(15, "LCD_R6"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(150, "PJ6"),
> +		STM32_FUNCTION(0, "GPIOJ6"),
> +		STM32_FUNCTION(15, "LCD_R7"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(151, "PJ7"),
> +		STM32_FUNCTION(0, "GPIOJ7"),
> +		STM32_FUNCTION(15, "LCD_G0"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(152, "PJ8"),
> +		STM32_FUNCTION(0, "GPIOJ8"),
> +		STM32_FUNCTION(15, "LCD_G1"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(153, "PJ9"),
> +		STM32_FUNCTION(0, "GPIOJ9"),
> +		STM32_FUNCTION(15, "LCD_G2"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(154, "PJ10"),
> +		STM32_FUNCTION(0, "GPIOJ10"),
> +		STM32_FUNCTION(15, "LCD_G3"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(155, "PJ11"),
> +		STM32_FUNCTION(0, "GPIOJ11"),
> +		STM32_FUNCTION(15, "LCD_G4"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(156, "PJ12"),
> +		STM32_FUNCTION(0, "GPIOJ12"),
> +		STM32_FUNCTION(10, "LCD_G3"),
> +		STM32_FUNCTION(15, "LCD_B0"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(157, "PJ13"),
> +		STM32_FUNCTION(0, "GPIOJ13"),
> +		STM32_FUNCTION(10, "LCD_G4"),
> +		STM32_FUNCTION(15, "LCD_B1"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(158, "PJ14"),
> +		STM32_FUNCTION(0, "GPIOJ14"),
> +		STM32_FUNCTION(15, "LCD_B2"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(159, "PJ15"),
> +		STM32_FUNCTION(0, "GPIOJ15"),
> +		STM32_FUNCTION(15, "LCD_B3"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(160, "PK0"),
> +		STM32_FUNCTION(0, "GPIOK0"),
> +		STM32_FUNCTION(15, "LCD_G5"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(161, "PK1"),
> +		STM32_FUNCTION(0, "GPIOK1"),
> +		STM32_FUNCTION(15, "LCD_G6"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(162, "PK2"),
> +		STM32_FUNCTION(0, "GPIOK2"),
> +		STM32_FUNCTION(15, "LCD_G7"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(163, "PK3"),
> +		STM32_FUNCTION(0, "GPIOK3"),
> +		STM32_FUNCTION(15, "LCD_B4"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(164, "PK4"),
> +		STM32_FUNCTION(0, "GPIOK4"),
> +		STM32_FUNCTION(15, "LCD_B5"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(165, "PK5"),
> +		STM32_FUNCTION(0, "GPIOK5"),
> +		STM32_FUNCTION(15, "LCD_B6"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(166, "PK6"),
> +		STM32_FUNCTION(0, "GPIOK6"),
> +		STM32_FUNCTION(15, "LCD_B7"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +	STM32_PIN(
> +		PINCTRL_PIN(167, "PK7"),
> +		STM32_FUNCTION(0, "GPIOK7"),
> +		STM32_FUNCTION(15, "LCD_DE"),
> +		STM32_FUNCTION(16, "EVENTOUT"),
> +		STM32_FUNCTION(17, "ANALOG")
> +	),
> +};
> +
> +static struct stm32_pinctrl_match_data stm32f769_match_data = {
> +	.pins = stm32f769_pins,
> +	.npins = ARRAY_SIZE(stm32f769_pins),
> +};
> +
> +static const struct of_device_id stm32f769_pctrl_match[] = {
> +	{
> +		.compatible = "st,stm32f769-pinctrl",
> +		.data = &stm32f769_match_data,
> +	},
> +	{ }
> +};
> +
> +static struct platform_driver stm32f769_pinctrl_driver = {
> +	.probe = stm32_pctl_probe,
> +	.driver = {
> +		.name = "stm32f769-pinctrl",
> +		.of_match_table = stm32f769_pctrl_match,
> +	},
> +};
> +
> +static int __init stm32f769_pinctrl_init(void)
> +{
> +	return platform_driver_register(&stm32f769_pinctrl_driver);
> +}
> +arch_initcall(stm32f769_pinctrl_init);
> 

^ permalink raw reply	[flat|nested] 10+ messages in thread

[parent not found: <1249efb1-e553-2205-d953-8cbf98b6365d-qxv4g6HH51o@public.gmane.org>]

* Re: [PATCH 2/5] pinctrl: stm32: add STM32F769 MCU support
       [not found]       ` <1249efb1-e553-2205-d953-8cbf98b6365d-qxv4g6HH51o@public.gmane.org>
@ 2018-01-22  8:28         ` Linus Walleij
  0 siblings, 0 replies; 10+ messages in thread
From: Linus Walleij @ 2018-01-22  8:28 UTC (permalink / raw)
  To: Patrice CHOTARD
  Cc: Alexandre TORGUE, Maxime Coquelin, Rob Herring, Mark Rutland,
	Jonathan Corbet, Russell King,
	devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org

On Thu, Jan 18, 2018 at 3:05 PM, Patrice CHOTARD <patrice.chotard-qxv4g6HH51o@public.gmane.org> wrote:

> It's a gentle reminder because this patch seems not yet merged in any of
> your pinctrl branch.
>
> Thanks
>
> Patrice

Poking is fine.

> On 12/11/2017 09:54 AM, Alexandre Torgue wrote:
>> This patch which adds STM32F769 pinctrl and GPIO support, relies on the
>> generic STM32 pinctrl driver.
>>
>> Signed-off-by: Alexandre Torgue <alexandre.torgue-qxv4g6HH51o@public.gmane.org>

Since you are so eager to get it in I will record it with
your Acked-by :)

(Maybe you acked 0/5 or something, sorry for the mess.)

Yours,
Linus Walleij
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

^ permalink raw reply	[flat|nested] 10+ messages in thread

* Re: [PATCH 2/5] pinctrl: stm32: add STM32F769 MCU support
  2017-12-11  8:54   ` [PATCH 2/5] pinctrl: stm32: add STM32F769 MCU support Alexandre Torgue
  2018-01-18 14:05     ` Patrice CHOTARD
@ 2018-01-22  8:25     ` Linus Walleij
       [not found]       ` <CACRpkdYTbjXx5tx9LjRKkbZ7zCBZz0Fhe_cmRm4DMq_3hTTmtA-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
  1 sibling, 1 reply; 10+ messages in thread
From: Linus Walleij @ 2018-01-22  8:25 UTC (permalink / raw)
  To: Alexandre Torgue
  Cc: Mark Rutland,
	open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
	Jonathan Corbet, Russell King, linux-kernel@vger.kernel.org,
	Rob Herring, Maxime Coquelin, Linux ARM

On Mon, Dec 11, 2017 at 9:54 AM, Alexandre Torgue
<alexandre.torgue@st.com> wrote:

> This patch which adds STM32F769 pinctrl and GPIO support, relies on the
> generic STM32 pinctrl driver.
>
> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>

Patch applied as Patrice poked me.

I hope it works fine being applied in isolation from the other
patches?

Yours,
Linus Walleij

^ permalink raw reply	[flat|nested] 10+ messages in thread

[parent not found: <CACRpkdYTbjXx5tx9LjRKkbZ7zCBZz0Fhe_cmRm4DMq_3hTTmtA-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>]

* Re: [PATCH 2/5] pinctrl: stm32: add STM32F769 MCU support
       [not found]       ` <CACRpkdYTbjXx5tx9LjRKkbZ7zCBZz0Fhe_cmRm4DMq_3hTTmtA-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
@ 2018-01-23  8:44         ` Alexandre Torgue
  0 siblings, 0 replies; 10+ messages in thread
From: Alexandre Torgue @ 2018-01-23  8:44 UTC (permalink / raw)
  To: Linus Walleij
  Cc: Maxime Coquelin, Rob Herring, Mark Rutland, Jonathan Corbet,
	Russell King, Linux ARM,
	open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
	linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org



On 01/22/2018 09:25 AM, Linus Walleij wrote:
> On Mon, Dec 11, 2017 at 9:54 AM, Alexandre Torgue
> <alexandre.torgue-qxv4g6HH51o@public.gmane.org> wrote:
> 
>> This patch which adds STM32F769 pinctrl and GPIO support, relies on the
>> generic STM32 pinctrl driver.
>>
>> Signed-off-by: Alexandre Torgue <alexandre.torgue-qxv4g6HH51o@public.gmane.org>
> 
> Patch applied as Patrice poked me.
> 
> I hope it works fine being applied in isolation from the other
> patches?

Yes it does. I will add other patches in my next pull request (for v4.17).

Thanks
Alex

> 
> Yours,
> Linus Walleij
> 
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
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^ permalink raw reply	[flat|nested] 10+ messages in thread

* [PATCH 5/5] ARM: dts: stm32: use dedicated files for pinctrl on stm32f7 family
       [not found] ` <1512982475-32661-2-git-send-email-alexandre.torgue-qxv4g6HH51o@public.gmane.org>
  2017-12-11  8:54   ` [PATCH 2/5] pinctrl: stm32: add STM32F769 MCU support Alexandre Torgue
@ 2017-12-11  8:54   ` Alexandre Torgue
  2017-12-15 21:47   ` [PATCH 1/5] dt-bindings: pinctrl: Add st,stm32f769-pinctrl compatible to stm32-pinctrl Rob Herring
  2 siblings, 0 replies; 10+ messages in thread
From: Alexandre Torgue @ 2017-12-11  8:54 UTC (permalink / raw)
  To: Maxime Coquelin, Linus Walleij, Rob Herring, Mark Rutland,
	Jonathan Corbet, Russell King
  Cc: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
	devicetree-u79uwXL29TY76Z2rM5mHXA,
	linux-kernel-u79uwXL29TY76Z2rM5mHXA

Currently, same stm32f746-pinctrl driver is used for stm32f746 and
stm32f769 MCU. As pin map is different between those 2 MCUs,
a stm32f769-pinctrl driver has been recently added.
This patch
 -allows to use stm32f769-pinctrl driver for stm32f769 boards
 -reworks stm32 devicetree files to fit with stm32f746 / stm32f769

Signed-off-by: Alexandre Torgue <alexandre.torgue-qxv4g6HH51o@public.gmane.org>

diff --git a/arch/arm/boot/dts/stm32746g-eval.dts b/arch/arm/boot/dts/stm32746g-eval.dts
index 2d4e717..b2d4b8c 100644
--- a/arch/arm/boot/dts/stm32746g-eval.dts
+++ b/arch/arm/boot/dts/stm32746g-eval.dts
@@ -42,6 +42,7 @@
 
 /dts-v1/;
 #include "stm32f746.dtsi"
+#include "stm32f746-pinctrl.dtsi"
 #include <dt-bindings/input/input.h>
 
 / {
diff --git a/arch/arm/boot/dts/stm32f7-pinctrl.dtsi b/arch/arm/boot/dts/stm32f7-pinctrl.dtsi
new file mode 100644
index 0000000..4c66fa40
--- /dev/null
+++ b/arch/arm/boot/dts/stm32f7-pinctrl.dtsi
@@ -0,0 +1,227 @@
+/* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */
+/*
+ * Copyright (C) STMicroelectronics 2017 - All Rights Reserved
+ * Author: Alexandre Torgue  <alexandre.torgue-qxv4g6HH51o@public.gmane.org> for STMicroelectronics.
+ */
+
+#include <dt-bindings/pinctrl/stm32-pinfunc.h>
+#include <dt-bindings/mfd/stm32f7-rcc.h>
+
+/ {
+	soc {
+		pinctrl: pin-controller {
+			#address-cells = <1>;
+			#size-cells = <1>;
+			ranges = <0 0x40020000 0x3000>;
+			interrupt-parent = <&exti>;
+			st,syscfg = <&syscfg 0x8>;
+			pins-are-numbered;
+
+			gpioa: gpio@40020000 {
+				gpio-controller;
+				#gpio-cells = <2>;
+				interrupt-controller;
+				#interrupt-cells = <2>;
+				reg = <0x0 0x400>;
+				clocks = <&rcc 0 STM32F7_AHB1_CLOCK(GPIOA)>;
+				st,bank-name = "GPIOA";
+			};
+
+			gpiob: gpio@40020400 {
+				gpio-controller;
+				#gpio-cells = <2>;
+				interrupt-controller;
+				#interrupt-cells = <2>;
+				reg = <0x400 0x400>;
+				clocks = <&rcc 0 STM32F7_AHB1_CLOCK(GPIOB)>;
+				st,bank-name = "GPIOB";
+			};
+
+			gpioc: gpio@40020800 {
+				gpio-controller;
+				#gpio-cells = <2>;
+				interrupt-controller;
+				#interrupt-cells = <2>;
+				reg = <0x800 0x400>;
+				clocks = <&rcc 0 STM32F7_AHB1_CLOCK(GPIOC)>;
+				st,bank-name = "GPIOC";
+			};
+
+			gpiod: gpio@40020c00 {
+				gpio-controller;
+				#gpio-cells = <2>;
+				interrupt-controller;
+				#interrupt-cells = <2>;
+				reg = <0xc00 0x400>;
+				clocks = <&rcc 0 STM32F7_AHB1_CLOCK(GPIOD)>;
+				st,bank-name = "GPIOD";
+			};
+
+			gpioe: gpio@40021000 {
+				gpio-controller;
+				#gpio-cells = <2>;
+				interrupt-controller;
+				#interrupt-cells = <2>;
+				reg = <0x1000 0x400>;
+				clocks = <&rcc 0 STM32F7_AHB1_CLOCK(GPIOE)>;
+				st,bank-name = "GPIOE";
+			};
+
+			gpiof: gpio@40021400 {
+				gpio-controller;
+				#gpio-cells = <2>;
+				interrupt-controller;
+				#interrupt-cells = <2>;
+				reg = <0x1400 0x400>;
+				clocks = <&rcc 0 STM32F7_AHB1_CLOCK(GPIOF)>;
+				st,bank-name = "GPIOF";
+			};
+
+			gpiog: gpio@40021800 {
+				gpio-controller;
+				#gpio-cells = <2>;
+				interrupt-controller;
+				#interrupt-cells = <2>;
+				reg = <0x1800 0x400>;
+				clocks = <&rcc 0 STM32F7_AHB1_CLOCK(GPIOG)>;
+				st,bank-name = "GPIOG";
+			};
+
+			gpioh: gpio@40021c00 {
+				gpio-controller;
+				#gpio-cells = <2>;
+				interrupt-controller;
+				#interrupt-cells = <2>;
+				reg = <0x1c00 0x400>;
+				clocks = <&rcc 0 STM32F7_AHB1_CLOCK(GPIOH)>;
+				st,bank-name = "GPIOH";
+			};
+
+			gpioi: gpio@40022000 {
+				gpio-controller;
+				#gpio-cells = <2>;
+				interrupt-controller;
+				#interrupt-cells = <2>;
+				reg = <0x2000 0x400>;
+				clocks = <&rcc 0 STM32F7_AHB1_CLOCK(GPIOI)>;
+				st,bank-name = "GPIOI";
+			};
+
+			gpioj: gpio@40022400 {
+				gpio-controller;
+				#gpio-cells = <2>;
+				interrupt-controller;
+				#interrupt-cells = <2>;
+				reg = <0x2400 0x400>;
+				clocks = <&rcc 0 STM32F7_AHB1_CLOCK(GPIOJ)>;
+				st,bank-name = "GPIOJ";
+			};
+
+			gpiok: gpio@40022800 {
+				gpio-controller;
+				#gpio-cells = <2>;
+				interrupt-controller;
+				#interrupt-cells = <2>;
+				reg = <0x2800 0x400>;
+				clocks = <&rcc 0 STM32F7_AHB1_CLOCK(GPIOK)>;
+				st,bank-name = "GPIOK";
+			};
+
+			cec_pins_a: cec@0 {
+				pins {
+					pinmux = <STM32_PINMUX('A', 15, AF4)>; /* HDMI CEC */
+					slew-rate = <0>;
+					drive-open-drain;
+					bias-disable;
+				};
+			};
+
+			usart1_pins_a: usart1@0 {
+				pins1 {
+					pinmux = <STM32_PINMUX('A', 9, AF7)>; /* USART1_TX */
+					bias-disable;
+					drive-push-pull;
+					slew-rate = <0>;
+				};
+				pins2 {
+					pinmux = <STM32_PINMUX('A', 10, AF7)>; /* USART1_RX */
+					bias-disable;
+				};
+			};
+
+			usart1_pins_b: usart1@1 {
+				pins1 {
+					pinmux = <STM32_PINMUX('A', 9, AF7)>; /* USART1_TX */
+					bias-disable;
+					drive-push-pull;
+					slew-rate = <0>;
+				};
+				pins2 {
+					pinmux = <STM32_PINMUX('B', 7, AF7)>; /* USART1_RX */
+					bias-disable;
+				};
+			};
+
+			i2c1_pins_b: i2c1@0 {
+				pins {
+					pinmux = <STM32_PINMUX('B', 9, AF4)>, /* I2C1 SDA */
+						 <STM32_PINMUX('B', 8, AF4)>; /* I2C1 SCL */
+					bias-disable;
+					drive-open-drain;
+					slew-rate = <0>;
+				};
+			};
+
+			usbotg_hs_pins_a: usbotg-hs@0 {
+				pins {
+					pinmux = <STM32_PINMUX('H', 4, AF10)>, /* OTG_HS_ULPI_NXT */
+						 <STM32_PINMUX('I', 11, AF10)>, /* OTG_HS_ULPI_DIR */
+						 <STM32_PINMUX('C', 0, AF10)>, /* OTG_HS_ULPI_STP */
+						 <STM32_PINMUX('A', 5, AF10)>, /* OTG_HS_ULPI_CK */
+						 <STM32_PINMUX('A', 3, AF10)>, /* OTG_HS_ULPI_D0 */
+						 <STM32_PINMUX('B', 0, AF10)>, /* OTG_HS_ULPI_D1 */
+						 <STM32_PINMUX('B', 1, AF10)>, /* OTG_HS_ULPI_D2 */
+						 <STM32_PINMUX('B', 10, AF10)>, /* OTG_HS_ULPI_D3 */
+						 <STM32_PINMUX('B', 11, AF10)>, /* OTG_HS_ULPI_D4 */
+						 <STM32_PINMUX('B', 12, AF10)>, /* OTG_HS_ULPI_D5 */
+						 <STM32_PINMUX('B', 13, AF10)>, /* OTG_HS_ULPI_D6 */
+						 <STM32_PINMUX('B', 5, AF10)>; /* OTG_HS_ULPI_D7 */
+					bias-disable;
+					drive-push-pull;
+					slew-rate = <2>;
+				};
+			};
+
+			usbotg_hs_pins_b: usbotg-hs@1 {
+				pins {
+					pinmux = <STM32_PINMUX('H', 4, AF10)>, /* OTG_HS_ULPI_NXT */
+						 <STM32_PINMUX('C', 2, AF10)>, /* OTG_HS_ULPI_DIR */
+						 <STM32_PINMUX('C', 0, AF10)>, /* OTG_HS_ULPI_STP */
+						 <STM32_PINMUX('A', 5, AF10)>, /* OTG_HS_ULPI_CK */
+						 <STM32_PINMUX('A', 3, AF10)>, /* OTG_HS_ULPI_D0 */
+						 <STM32_PINMUX('B', 0, AF10)>, /* OTG_HS_ULPI_D1 */
+						 <STM32_PINMUX('B', 1, AF10)>, /* OTG_HS_ULPI_D2 */
+						 <STM32_PINMUX('B', 10, AF10)>, /* OTG_HS_ULPI_D3 */
+						 <STM32_PINMUX('B', 11, AF10)>, /* OTG_HS_ULPI_D4 */
+						 <STM32_PINMUX('B', 12, AF10)>, /* OTG_HS_ULPI_D5 */
+						 <STM32_PINMUX('B', 13, AF10)>, /* OTG_HS_ULPI_D6 */
+						 <STM32_PINMUX('B', 5, AF10)>; /* OTG_HS_ULPI_D7 */
+					bias-disable;
+					drive-push-pull;
+					slew-rate = <2>;
+				};
+			};
+
+			usbotg_fs_pins_a: usbotg-fs@0 {
+				pins {
+					pinmux = <STM32_PINMUX('A', 10, AF10)>, /* OTG_FS_ID */
+						 <STM32_PINMUX('A', 11, AF10)>, /* OTG_FS_DM */
+						 <STM32_PINMUX('A', 12, AF10)>; /* OTG_FS_DP */
+					bias-disable;
+					drive-push-pull;
+					slew-rate = <2>;
+				};
+			};
+		};
+	};
+};
diff --git a/arch/arm/boot/dts/stm32f746-disco.dts b/arch/arm/boot/dts/stm32f746-disco.dts
index 4d85dba..623b6f2 100644
--- a/arch/arm/boot/dts/stm32f746-disco.dts
+++ b/arch/arm/boot/dts/stm32f746-disco.dts
@@ -42,6 +42,7 @@
 
 /dts-v1/;
 #include "stm32f746.dtsi"
+#include "stm32f746-pinctrl.dtsi"
 #include <dt-bindings/input/input.h>
 
 / {
diff --git a/arch/arm/boot/dts/stm32f746-pinctrl.dtsi b/arch/arm/boot/dts/stm32f746-pinctrl.dtsi
new file mode 100644
index 0000000..f0e6309
--- /dev/null
+++ b/arch/arm/boot/dts/stm32f746-pinctrl.dtsi
@@ -0,0 +1,11 @@
+/* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */
+/*
+ * Copyright (C) STMicroelectronics 2017 - All Rights Reserved
+ * Author: Alexandre Torgue  <alexandre.torgue-qxv4g6HH51o@public.gmane.org> for STMicroelectronics.
+ */
+
+#include "stm32f7-pinctrl.dtsi"
+
+&pinctrl{
+	compatible = "st,stm32f746-pinctrl";
+};
diff --git a/arch/arm/boot/dts/stm32f746.dtsi b/arch/arm/boot/dts/stm32f746.dtsi
index 5f66d15..8fe96d6 100644
--- a/arch/arm/boot/dts/stm32f746.dtsi
+++ b/arch/arm/boot/dts/stm32f746.dtsi
@@ -42,7 +42,6 @@
 
 #include "skeleton.dtsi"
 #include "armv7-m.dtsi"
-#include <dt-bindings/pinctrl/stm32-pinfunc.h>
 #include <dt-bindings/clock/stm32fx-clock.h>
 #include <dt-bindings/mfd/stm32f7-rcc.h>
 
@@ -498,222 +497,6 @@
 			reg = <0x40007000 0x400>;
 		};
 
-		pin-controller {
-			#address-cells = <1>;
-			#size-cells = <1>;
-			compatible = "st,stm32f746-pinctrl";
-			ranges = <0 0x40020000 0x3000>;
-			interrupt-parent = <&exti>;
-			st,syscfg = <&syscfg 0x8>;
-			pins-are-numbered;
-
-			gpioa: gpio@40020000 {
-				gpio-controller;
-				#gpio-cells = <2>;
-				interrupt-controller;
-				#interrupt-cells = <2>;
-				reg = <0x0 0x400>;
-				clocks = <&rcc 0 STM32F7_AHB1_CLOCK(GPIOA)>;
-				st,bank-name = "GPIOA";
-			};
-
-			gpiob: gpio@40020400 {
-				gpio-controller;
-				#gpio-cells = <2>;
-				interrupt-controller;
-				#interrupt-cells = <2>;
-				reg = <0x400 0x400>;
-				clocks = <&rcc 0 STM32F7_AHB1_CLOCK(GPIOB)>;
-				st,bank-name = "GPIOB";
-			};
-
-			gpioc: gpio@40020800 {
-				gpio-controller;
-				#gpio-cells = <2>;
-				interrupt-controller;
-				#interrupt-cells = <2>;
-				reg = <0x800 0x400>;
-				clocks = <&rcc 0 STM32F7_AHB1_CLOCK(GPIOC)>;
-				st,bank-name = "GPIOC";
-			};
-
-			gpiod: gpio@40020c00 {
-				gpio-controller;
-				#gpio-cells = <2>;
-				interrupt-controller;
-				#interrupt-cells = <2>;
-				reg = <0xc00 0x400>;
-				clocks = <&rcc 0 STM32F7_AHB1_CLOCK(GPIOD)>;
-				st,bank-name = "GPIOD";
-			};
-
-			gpioe: gpio@40021000 {
-				gpio-controller;
-				#gpio-cells = <2>;
-				interrupt-controller;
-				#interrupt-cells = <2>;
-				reg = <0x1000 0x400>;
-				clocks = <&rcc 0 STM32F7_AHB1_CLOCK(GPIOE)>;
-				st,bank-name = "GPIOE";
-			};
-
-			gpiof: gpio@40021400 {
-				gpio-controller;
-				#gpio-cells = <2>;
-				interrupt-controller;
-				#interrupt-cells = <2>;
-				reg = <0x1400 0x400>;
-				clocks = <&rcc 0 STM32F7_AHB1_CLOCK(GPIOF)>;
-				st,bank-name = "GPIOF";
-			};
-
-			gpiog: gpio@40021800 {
-				gpio-controller;
-				#gpio-cells = <2>;
-				interrupt-controller;
-				#interrupt-cells = <2>;
-				reg = <0x1800 0x400>;
-				clocks = <&rcc 0 STM32F7_AHB1_CLOCK(GPIOG)>;
-				st,bank-name = "GPIOG";
-			};
-
-			gpioh: gpio@40021c00 {
-				gpio-controller;
-				#gpio-cells = <2>;
-				interrupt-controller;
-				#interrupt-cells = <2>;
-				reg = <0x1c00 0x400>;
-				clocks = <&rcc 0 STM32F7_AHB1_CLOCK(GPIOH)>;
-				st,bank-name = "GPIOH";
-			};
-
-			gpioi: gpio@40022000 {
-				gpio-controller;
-				#gpio-cells = <2>;
-				interrupt-controller;
-				#interrupt-cells = <2>;
-				reg = <0x2000 0x400>;
-				clocks = <&rcc 0 STM32F7_AHB1_CLOCK(GPIOI)>;
-				st,bank-name = "GPIOI";
-			};
-
-			gpioj: gpio@40022400 {
-				gpio-controller;
-				#gpio-cells = <2>;
-				interrupt-controller;
-				#interrupt-cells = <2>;
-				reg = <0x2400 0x400>;
-				clocks = <&rcc 0 STM32F7_AHB1_CLOCK(GPIOJ)>;
-				st,bank-name = "GPIOJ";
-			};
-
-			gpiok: gpio@40022800 {
-				gpio-controller;
-				#gpio-cells = <2>;
-				interrupt-controller;
-				#interrupt-cells = <2>;
-				reg = <0x2800 0x400>;
-				clocks = <&rcc 0 STM32F7_AHB1_CLOCK(GPIOK)>;
-				st,bank-name = "GPIOK";
-			};
-
-			cec_pins_a: cec@0 {
-				pins {
-					pinmux = <STM32_PINMUX('A', 15, AF4)>; /* HDMI CEC */
-					slew-rate = <0>;
-					drive-open-drain;
-					bias-disable;
-				};
-			};
-
-			usart1_pins_a: usart1@0 {
-				pins1 {
-					pinmux = <STM32_PINMUX('A', 9, AF7)>; /* USART1_TX */
-					bias-disable;
-					drive-push-pull;
-					slew-rate = <0>;
-				};
-				pins2 {
-					pinmux = <STM32_PINMUX('A', 10, AF7)>; /* USART1_RX */
-					bias-disable;
-				};
-			};
-
-			usart1_pins_b: usart1@1 {
-				pins1 {
-					pinmux = <STM32_PINMUX('A', 9, AF7)>; /* USART1_TX */
-					bias-disable;
-					drive-push-pull;
-					slew-rate = <0>;
-				};
-				pins2 {
-					pinmux = <STM32_PINMUX('B', 7, AF7)>; /* USART1_RX */
-					bias-disable;
-				};
-			};
-
-			i2c1_pins_b: i2c1@0 {
-				pins {
-					pinmux = <STM32_PINMUX('B', 9, AF4)>, /* I2C1 SDA */
-						 <STM32_PINMUX('B', 8, AF4)>; /* I2C1 SCL */
-					bias-disable;
-					drive-open-drain;
-					slew-rate = <0>;
-				};
-			};
-
-			usbotg_hs_pins_a: usbotg-hs@0 {
-				pins {
-					pinmux = <STM32_PINMUX('H', 4, AF10)>, /* OTG_HS_ULPI_NXT */
-						 <STM32_PINMUX('I', 11, AF10)>, /* OTG_HS_ULPI_DIR */
-						 <STM32_PINMUX('C', 0, AF10)>, /* OTG_HS_ULPI_STP */
-						 <STM32_PINMUX('A', 5, AF10)>, /* OTG_HS_ULPI_CK */
-						 <STM32_PINMUX('A', 3, AF10)>, /* OTG_HS_ULPI_D0 */
-						 <STM32_PINMUX('B', 0, AF10)>, /* OTG_HS_ULPI_D1 */
-						 <STM32_PINMUX('B', 1, AF10)>, /* OTG_HS_ULPI_D2 */
-						 <STM32_PINMUX('B', 10, AF10)>, /* OTG_HS_ULPI_D3 */
-						 <STM32_PINMUX('B', 11, AF10)>, /* OTG_HS_ULPI_D4 */
-						 <STM32_PINMUX('B', 12, AF10)>, /* OTG_HS_ULPI_D5 */
-						 <STM32_PINMUX('B', 13, AF10)>, /* OTG_HS_ULPI_D6 */
-						 <STM32_PINMUX('B', 5, AF10)>; /* OTG_HS_ULPI_D7 */
-					bias-disable;
-					drive-push-pull;
-					slew-rate = <2>;
-				};
-			};
-
-			usbotg_hs_pins_b: usbotg-hs@1 {
-				pins {
-					pinmux = <STM32_PINMUX('H', 4, AF10)>, /* OTG_HS_ULPI_NXT */
-						 <STM32_PINMUX('C', 2, AF10)>, /* OTG_HS_ULPI_DIR */
-						 <STM32_PINMUX('C', 0, AF10)>, /* OTG_HS_ULPI_STP */
-						 <STM32_PINMUX('A', 5, AF10)>, /* OTG_HS_ULPI_CK */
-						 <STM32_PINMUX('A', 3, AF10)>, /* OTG_HS_ULPI_D0 */
-						 <STM32_PINMUX('B', 0, AF10)>, /* OTG_HS_ULPI_D1 */
-						 <STM32_PINMUX('B', 1, AF10)>, /* OTG_HS_ULPI_D2 */
-						 <STM32_PINMUX('B', 10, AF10)>, /* OTG_HS_ULPI_D3 */
-						 <STM32_PINMUX('B', 11, AF10)>, /* OTG_HS_ULPI_D4 */
-						 <STM32_PINMUX('B', 12, AF10)>, /* OTG_HS_ULPI_D5 */
-						 <STM32_PINMUX('B', 13, AF10)>, /* OTG_HS_ULPI_D6 */
-						 <STM32_PINMUX('B', 5, AF10)>; /* OTG_HS_ULPI_D7 */
-					bias-disable;
-					drive-push-pull;
-					slew-rate = <2>;
-				};
-			};
-
-			usbotg_fs_pins_a: usbotg-fs@0 {
-				pins {
-					pinmux = <STM32_PINMUX('A', 10, AF10)>, /* OTG_FS_ID */
-						 <STM32_PINMUX('A', 11, AF10)>, /* OTG_FS_DM */
-						 <STM32_PINMUX('A', 12, AF10)>; /* OTG_FS_DP */
-					bias-disable;
-					drive-push-pull;
-					slew-rate = <2>;
-				};
-			};
-		};
-
 		crc: crc@40023000 {
 			compatible = "st,stm32f7-crc";
 			reg = <0x40023000 0x400>;
diff --git a/arch/arm/boot/dts/stm32f769-disco.dts b/arch/arm/boot/dts/stm32f769-disco.dts
index 4463ca1..9dba286 100644
--- a/arch/arm/boot/dts/stm32f769-disco.dts
+++ b/arch/arm/boot/dts/stm32f769-disco.dts
@@ -42,11 +42,12 @@
 
 /dts-v1/;
 #include "stm32f746.dtsi"
+#include "stm32f769-pinctrl.dtsi"
 #include <dt-bindings/input/input.h>
 
 / {
 	model = "STMicroelectronics STM32F769-DISCO board";
-	compatible = "st,stm32f769-disco", "st,stm32f7";
+	compatible = "st,stm32f769-disco", "st,stm32f769";
 
 	chosen {
 		bootargs = "root=/dev/ram";
diff --git a/arch/arm/boot/dts/stm32f769-pinctrl.dtsi b/arch/arm/boot/dts/stm32f769-pinctrl.dtsi
new file mode 100644
index 0000000..787da27
--- /dev/null
+++ b/arch/arm/boot/dts/stm32f769-pinctrl.dtsi
@@ -0,0 +1,11 @@
+/* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */
+/*
+ * Copyright (C) STMicroelectronics 2017 - All Rights Reserved
+ * Author: Alexandre Torgue  <alexandre.torgue-qxv4g6HH51o@public.gmane.org> for STMicroelectronics.
+ */
+
+#include "stm32f7-pinctrl.dtsi"
+
+&pinctrl{
+	compatible = "st,stm32f769-pinctrl";
+};
-- 
2.7.4

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^ permalink raw reply related	[flat|nested] 10+ messages in thread

* Re: [PATCH 1/5] dt-bindings: pinctrl: Add st,stm32f769-pinctrl compatible to stm32-pinctrl
       [not found] ` <1512982475-32661-2-git-send-email-alexandre.torgue-qxv4g6HH51o@public.gmane.org>
  2017-12-11  8:54   ` [PATCH 2/5] pinctrl: stm32: add STM32F769 MCU support Alexandre Torgue
  2017-12-11  8:54   ` [PATCH 5/5] ARM: dts: stm32: use dedicated files for pinctrl on stm32f7 family Alexandre Torgue
@ 2017-12-15 21:47   ` Rob Herring
  2 siblings, 0 replies; 10+ messages in thread
From: Rob Herring @ 2017-12-15 21:47 UTC (permalink / raw)
  To: Alexandre Torgue
  Cc: Maxime Coquelin, Linus Walleij, Mark Rutland, Jonathan Corbet,
	Russell King, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
	devicetree-u79uwXL29TY76Z2rM5mHXA,
	linux-kernel-u79uwXL29TY76Z2rM5mHXA

On Mon, Dec 11, 2017 at 09:54:31AM +0100, Alexandre Torgue wrote:
> Add new compatible for stm32f769 MCU.
> 
> Signed-off-by: Alexandre Torgue <alexandre.torgue-qxv4g6HH51o@public.gmane.org>

Reviewed-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
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^ permalink raw reply	[flat|nested] 10+ messages in thread

end of thread, other threads:[~2018-01-23  8:44 UTC | newest]

Thread overview: 10+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2017-12-11  8:54 [PATCH 1/5] dt-bindings: pinctrl: Add st, stm32f769-pinctrl compatible to stm32-pinctrl Alexandre Torgue
2017-12-11  8:54 ` [PATCH 3/5] ARM: mach-stm32: Kconfig: introduce MACH_STM32F769 flag Alexandre Torgue
2017-12-11  8:54 ` [PATCH 4/5] ARM: mach-stm32: add new STM32F769 MCU Alexandre Torgue
     [not found] ` <1512982475-32661-2-git-send-email-alexandre.torgue-qxv4g6HH51o@public.gmane.org>
2017-12-11  8:54   ` [PATCH 2/5] pinctrl: stm32: add STM32F769 MCU support Alexandre Torgue
2018-01-18 14:05     ` Patrice CHOTARD
     [not found]       ` <1249efb1-e553-2205-d953-8cbf98b6365d-qxv4g6HH51o@public.gmane.org>
2018-01-22  8:28         ` Linus Walleij
2018-01-22  8:25     ` Linus Walleij
     [not found]       ` <CACRpkdYTbjXx5tx9LjRKkbZ7zCBZz0Fhe_cmRm4DMq_3hTTmtA-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2018-01-23  8:44         ` Alexandre Torgue
2017-12-11  8:54   ` [PATCH 5/5] ARM: dts: stm32: use dedicated files for pinctrl on stm32f7 family Alexandre Torgue
2017-12-15 21:47   ` [PATCH 1/5] dt-bindings: pinctrl: Add st,stm32f769-pinctrl compatible to stm32-pinctrl Rob Herring

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