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From: Linus Walleij <linus.walleij@linaro.org>
To: Matthias Brugger <matthias.bgg@gmail.com>
Cc: Zhiyong Tao <zhiyong.tao@mediatek.com>,
	Rob Herring <robh+dt@kernel.org>,
	Mark Rutland <mark.rutland@arm.com>,
	Sean Wang <sean.wang@kernel.org>,
	srv_heupstream@mediatek.com, hui.liu@mediatek.com,
	huang eddie <eddie.huang@mediatek.com>,
	chuanjia.liu@mediatek.com, Biao Huang <biao.huang@mediatek.com>,
	Hongzhou Yang <hongzhou.yang@mediatek.com>,
	Erin Lo <erin.lo@mediatek.com>,
	Sean Wang <sean.wang@mediatek.com>,
	"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
	<devicetree@vger.kernel.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	Linux ARM <linux-arm-kernel@lists.infradead.org>,
	"moderated list:ARM/Mediatek SoC support"
	<linux-mediatek@lists.infradead.org>,
	"open list:GPIO SUBSYSTEM" <linux-gpio@vger.kernel.org>
Subject: Re: [PATCH RESEND v3 4/4] pinctrl: add drive for I2C related pins on MT8183
Date: Tue, 23 Apr 2019 12:59:13 +0200	[thread overview]
Message-ID: <CACRpkdYV5cYUs21xCDMhMm=kUpFcOipE+3dZOEJYto2-w=8NtQ@mail.gmail.com> (raw)
In-Reply-To: <206361ee-b238-4017-83fe-702ea59ae9c5@gmail.com>

On Tue, Apr 16, 2019 at 10:08 AM Matthias Brugger
<matthias.bgg@gmail.com> wrote:
> On 25/03/2019 13:41, Zhiyong Tao wrote:
> > This patch provides the advanced drive for I2C used pins on MT8183.
> > The detail strength specification description of the I2C pin:
> > When E1=0/E0=0, the strength is 0.125mA.
> > When E1=0/E0=1, the strength is 0.25mA.
> > When E1=1/E0=0, the strength is 0.5mA.
> > When E1=1/E0=1, the strength is 1mA.
> > For I2C pins, there are existing generic driving setup and the above
> > specific driving setup. I2C pins can only support 2/4/6/8/10/12/14/16mA
> > driving adjustment in generic driving setup. But in specific driving
> > setup, they can support 0.125/0.25/0.5/1mA adjustment.
> > If we enable specific driving setup for I2C pins,
> > the existing generic driving setup will be disabled.
> > For some special features, we need the I2C pins specific driving setup.
> > The specific driving setup is controlled by E1E0EN.
> > So we need add extra vendor driving preperty instead of the generic
> > driving property. We can add "mediatek,drive-strength-adv = <XXX>;"
> > to describe the specific driving setup property.
> > "XXX" means the value of E1E0EN. So the valid arguments of
> > "mediatek,drive-strength-adv" are from 0 to 7.
> >
> > Signed-off-by: Zhiyong Tao <zhiyong.tao@mediatek.com>
> > ---
> >  drivers/pinctrl/mediatek/pinctrl-mt8183.c        | 50 ++++++++++++++++++++++++
> >  drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c | 47 ++++++++++++++++++++++
> >  drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.h | 11 ++++++
> >  drivers/pinctrl/mediatek/pinctrl-paris.c         | 12 ++++++
> >  4 files changed, 120 insertions(+)
> >
>
> Linus, did that fall through the cracks? Do you have any comments on this driver?

It's applied AFAICT. Maybe I forgot to push the branch, but its there.

Please confirm so I didn't miss anything!

Linus Walleij

  reply	other threads:[~2019-04-23 10:59 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-03-25 12:41 [PATCH v3 RESEND 0/4] PINCTRL: Mediatek pinctrl patch on mt8183 Zhiyong Tao
2019-03-25 12:41 ` [PATCH RESEND v3 1/4] dt-bindings: pinctrl: mt8183: add binding document Zhiyong Tao
2019-03-28 18:31   ` Rob Herring
2019-03-25 12:41 ` [PATCH RESEND v3 2/4] arm64: dts: mt8183: add pintcrl file Zhiyong Tao
2019-03-25 12:41 ` [PATCH RESEND v3 3/4] arm64: dts: mt8183: add pintcrl device node Zhiyong Tao
2019-03-25 18:17   ` Nicolas Boichat
2019-03-26  2:55     ` Zhiyong Tao
2019-03-25 12:41 ` [PATCH RESEND v3 4/4] pinctrl: add drive for I2C related pins on MT8183 Zhiyong Tao
2019-04-16  8:08   ` Matthias Brugger
2019-04-23 10:59     ` Linus Walleij [this message]
2019-04-23 14:10       ` Matthias Brugger

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