From: Linus Walleij <linus.walleij@linaro.org>
To: Conor Dooley <conor@kernel.org>
Cc: Conor Dooley <conor.dooley@microchip.com>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org,
devicetree@vger.kernel.org
Subject: Re: [RFC 3/5] pinctrl: add polarfire soc iomux0 pinmux driver
Date: Wed, 1 Oct 2025 13:34:24 +0200 [thread overview]
Message-ID: <CACRpkdZ5RCcaNJB_3ufAgpDtdJBKfOVrMbJVAQWaVSOkY0-XNQ@mail.gmail.com> (raw)
In-Reply-To: <20250926-unshackle-jury-79f701f97e94@spud>
On Fri, Sep 26, 2025 at 4:33 PM Conor Dooley <conor@kernel.org> wrote:
> +static const struct pinctrl_pin_desc mpfs_iomux0_pinctrl_pins[] = {
> + PINCTRL_PIN(0, "spi0"),
> + PINCTRL_PIN(1, "spi1"),
> + PINCTRL_PIN(2, "i2c0"),
> + PINCTRL_PIN(3, "i2c1"),
> + PINCTRL_PIN(4, "can0"),
> + PINCTRL_PIN(5, "can1"),
> + PINCTRL_PIN(6, "qspi"),
> + PINCTRL_PIN(7, "uart0"),
> + PINCTRL_PIN(8, "uart1"),
> + PINCTRL_PIN(9, "uart2"),
> + PINCTRL_PIN(10, "uart3"),
> + PINCTRL_PIN(11, "uart4"),
> + PINCTRL_PIN(12, "mdio0"),
> + PINCTRL_PIN(13, "mdio1"),
This looks like it is abusing the API. These things do not look like
"pins" at all, rather these are all groups, right?
Yours,
Linus Walleij
next prev parent reply other threads:[~2025-10-01 11:34 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-09-26 14:33 [RFC 0/5] microchip mpfs/pic64gx pinctrl questions Conor Dooley
2025-09-26 14:33 ` [RFC 1/5] dt-bindings: pinctrl: add polarfire soc iomux0 pinmux Conor Dooley
2025-09-26 14:33 ` [RFC 2/5] dt-bindings: pinctrl: add pic64gx "gpio2" pinmux Conor Dooley
2025-10-01 11:32 ` Linus Walleij
2025-10-01 15:47 ` Conor Dooley
2025-10-01 15:48 ` Conor Dooley
2025-10-13 10:56 ` Linus Walleij
2025-10-13 11:22 ` Conor Dooley
2025-09-26 14:33 ` [RFC 3/5] pinctrl: add polarfire soc iomux0 pinmux driver Conor Dooley
2025-10-01 11:34 ` Linus Walleij [this message]
2025-10-01 11:36 ` Linus Walleij
2025-10-01 15:45 ` Conor Dooley
2025-10-13 11:02 ` Linus Walleij
2025-10-13 11:42 ` Conor Dooley
2025-10-14 10:27 ` Linus Walleij
2025-09-26 14:33 ` [RFC 4/5] pinctrl: add pic64gx "gpio2" " Conor Dooley
2025-09-26 14:33 ` [RFC 5/5] riscv: dts: microchip: add pinctrl nodes for iomux0 Conor Dooley
2025-10-01 11:29 ` [RFC 0/5] microchip mpfs/pic64gx pinctrl questions Linus Walleij
2025-10-01 16:00 ` Conor Dooley
2025-10-01 16:15 ` Conor Dooley
2025-10-09 15:55 ` Conor Dooley
2025-10-13 13:27 ` Linus Walleij
2025-10-13 13:55 ` Conor Dooley
2025-10-14 10:33 ` Linus Walleij
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