* [PATCH v2 0/2] pinctrl: qcom: Enable egpio function for sa8775p
@ 2025-03-12 7:25 Wasim Nazir
2025-03-12 7:25 ` [PATCH v2 1/2] dt-bindings: pinctrl: qcom: Add " Wasim Nazir
` (2 more replies)
0 siblings, 3 replies; 6+ messages in thread
From: Wasim Nazir @ 2025-03-12 7:25 UTC (permalink / raw)
To: Bjorn Andersson, Linus Walleij, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Bartosz Golaszewski
Cc: linux-arm-msm, linux-gpio, devicetree, linux-kernel, kernel,
Wasim Nazir
Add egpio function for GPIOs ranging from 126 to 148.
---
Changelog:
v2:
- Update dt-bindings for egpio function in sa8775p
- v1: https://lore.kernel.org/all/20250311095151.1581239-1-quic_wasimn@quicinc.com/
Wasim Nazir (2):
dt-bindings: pinctrl: qcom: Add egpio function for sa8775p
pinctrl: qcom: sa8775p: Enable egpio function
.../bindings/pinctrl/qcom,sa8775p-tlmm.yaml | 2 +-
drivers/pinctrl/qcom/pinctrl-sa8775p.c | 58 +++++++++++--------
2 files changed, 35 insertions(+), 25 deletions(-)
base-commit: 0a2f889128969dab41861b6e40111aa03dc57014
--
2.48.1
^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH v2 1/2] dt-bindings: pinctrl: qcom: Add egpio function for sa8775p
2025-03-12 7:25 [PATCH v2 0/2] pinctrl: qcom: Enable egpio function for sa8775p Wasim Nazir
@ 2025-03-12 7:25 ` Wasim Nazir
2025-03-12 11:49 ` Krzysztof Kozlowski
2025-03-12 7:25 ` [PATCH v2 2/2] pinctrl: qcom: sa8775p: Enable egpio function Wasim Nazir
2025-03-14 11:08 ` [PATCH v2 0/2] pinctrl: qcom: Enable egpio function for sa8775p Linus Walleij
2 siblings, 1 reply; 6+ messages in thread
From: Wasim Nazir @ 2025-03-12 7:25 UTC (permalink / raw)
To: Bjorn Andersson, Linus Walleij, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Bartosz Golaszewski
Cc: linux-arm-msm, linux-gpio, devicetree, linux-kernel, kernel,
Wasim Nazir
Add egpio function for TLMM pinctrl on sa8775p platform.
Signed-off-by: Wasim Nazir <quic_wasimn@quicinc.com>
---
.../devicetree/bindings/pinctrl/qcom,sa8775p-tlmm.yaml | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sa8775p-tlmm.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sa8775p-tlmm.yaml
index 749dbc563ac5..7a156b9bfaf3 100644
--- a/Documentation/devicetree/bindings/pinctrl/qcom,sa8775p-tlmm.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/qcom,sa8775p-tlmm.yaml
@@ -79,7 +79,7 @@ $defs:
cri_trng, cri_trng0, cri_trng1, dbg_out, ddr_bist, ddr_pxi0,
ddr_pxi1, ddr_pxi2, ddr_pxi3, ddr_pxi4, ddr_pxi5, edp0_hot,
edp0_lcd, edp1_hot, edp1_lcd, edp2_hot, edp2_lcd, edp3_hot,
- edp3_lcd, emac0_mcg0, emac0_mcg1, emac0_mcg2, emac0_mcg3,
+ edp3_lcd, egpio, emac0_mcg0, emac0_mcg1, emac0_mcg2, emac0_mcg3,
emac0_mdc, emac0_mdio, emac0_ptp_aux, emac0_ptp_pps, emac1_mcg0,
emac1_mcg1, emac1_mcg2, emac1_mcg3, emac1_mdc, emac1_mdio,
emac1_ptp_aux, emac1_ptp_pps, gcc_gp1, gcc_gp2, gcc_gp3,
--
2.48.1
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [PATCH v2 2/2] pinctrl: qcom: sa8775p: Enable egpio function
2025-03-12 7:25 [PATCH v2 0/2] pinctrl: qcom: Enable egpio function for sa8775p Wasim Nazir
2025-03-12 7:25 ` [PATCH v2 1/2] dt-bindings: pinctrl: qcom: Add " Wasim Nazir
@ 2025-03-12 7:25 ` Wasim Nazir
2025-03-12 9:18 ` Dmitry Baryshkov
2025-03-14 11:08 ` [PATCH v2 0/2] pinctrl: qcom: Enable egpio function for sa8775p Linus Walleij
2 siblings, 1 reply; 6+ messages in thread
From: Wasim Nazir @ 2025-03-12 7:25 UTC (permalink / raw)
To: Bjorn Andersson, Linus Walleij, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Bartosz Golaszewski
Cc: linux-arm-msm, linux-gpio, devicetree, linux-kernel, kernel,
Wasim Nazir
Egpio feature allows IsLand Domain IOs to be reused as TLMM GPIOs.
sa8775p supports egpio feature for GPIOs ranging from 126 to 148.
Signed-off-by: Wasim Nazir <quic_wasimn@quicinc.com>
---
drivers/pinctrl/qcom/pinctrl-sa8775p.c | 58 +++++++++++++++-----------
1 file changed, 34 insertions(+), 24 deletions(-)
diff --git a/drivers/pinctrl/qcom/pinctrl-sa8775p.c b/drivers/pinctrl/qcom/pinctrl-sa8775p.c
index 8fdea25d8d67..a5b38221aea8 100644
--- a/drivers/pinctrl/qcom/pinctrl-sa8775p.c
+++ b/drivers/pinctrl/qcom/pinctrl-sa8775p.c
@@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
- * Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved.
+ * Copyright (c) 2022,2025, Qualcomm Innovation Center, Inc. All rights reserved.
* Copyright (c) 2023, Linaro Limited
*/
@@ -467,6 +467,7 @@ enum sa8775p_functions {
msm_mux_edp2_lcd,
msm_mux_edp3_hot,
msm_mux_edp3_lcd,
+ msm_mux_egpio,
msm_mux_emac0_mcg0,
msm_mux_emac0_mcg1,
msm_mux_emac0_mcg2,
@@ -744,6 +745,13 @@ static const char * const edp3_lcd_groups[] = {
"gpio49",
};
+static const char *const egpio_groups[] = {
+ "gpio126", "gpio127", "gpio128", "gpio129", "gpio130", "gpio131",
+ "gpio132", "gpio133", "gpio134", "gpio135", "gpio136", "gpio137",
+ "gpio138", "gpio139", "gpio140", "gpio141", "gpio142", "gpio143",
+ "gpio144", "gpio145", "gpio146", "gpio147", "gpio148",
+};
+
static const char * const emac0_mcg0_groups[] = {
"gpio12",
};
@@ -1209,6 +1217,7 @@ static const struct pinfunction sa8775p_functions[] = {
MSM_PIN_FUNCTION(edp2_lcd),
MSM_PIN_FUNCTION(edp3_hot),
MSM_PIN_FUNCTION(edp3_lcd),
+ MSM_PIN_FUNCTION(egpio),
MSM_PIN_FUNCTION(emac0_mcg0),
MSM_PIN_FUNCTION(emac0_mcg1),
MSM_PIN_FUNCTION(emac0_mcg2),
@@ -1454,29 +1463,29 @@ static const struct msm_pingroup sa8775p_groups[] = {
[123] = PINGROUP(123, hs2_mi2s, phase_flag, _, _, _, _, _, _, _),
[124] = PINGROUP(124, hs2_mi2s, phase_flag, _, _, _, _, _, _, _),
[125] = PINGROUP(125, hs2_mi2s, phase_flag, _, _, _, _, _, _, _),
- [126] = PINGROUP(126, _, _, _, _, _, _, _, _, _),
- [127] = PINGROUP(127, _, _, _, _, _, _, _, _, _),
- [128] = PINGROUP(128, _, _, _, _, _, _, _, _, _),
- [129] = PINGROUP(129, _, _, _, _, _, _, _, _, _),
- [130] = PINGROUP(130, _, _, _, _, _, _, _, _, _),
- [131] = PINGROUP(131, _, _, _, _, _, _, _, _, _),
- [132] = PINGROUP(132, _, _, _, _, _, _, _, _, _),
- [133] = PINGROUP(133, _, _, _, _, _, _, _, _, _),
- [134] = PINGROUP(134, _, _, _, _, _, _, _, _, _),
- [135] = PINGROUP(135, _, _, _, _, _, _, _, _, _),
- [136] = PINGROUP(136, _, _, _, _, _, _, _, _, _),
- [137] = PINGROUP(137, _, _, _, _, _, _, _, _, _),
- [138] = PINGROUP(138, _, _, _, _, _, _, _, _, _),
- [139] = PINGROUP(139, _, _, _, _, _, _, _, _, _),
- [140] = PINGROUP(140, _, _, _, _, _, _, _, _, _),
- [141] = PINGROUP(141, _, _, _, _, _, _, _, _, _),
- [142] = PINGROUP(142, _, _, _, _, _, _, _, _, _),
- [143] = PINGROUP(143, _, _, _, _, _, _, _, _, _),
- [144] = PINGROUP(144, dbg_out, _, _, _, _, _, _, _, _),
- [145] = PINGROUP(145, _, _, _, _, _, _, _, _, _),
- [146] = PINGROUP(146, _, _, _, _, _, _, _, _, _),
- [147] = PINGROUP(147, _, _, _, _, _, _, _, _, _),
- [148] = PINGROUP(148, _, _, _, _, _, _, _, _, _),
+ [126] = PINGROUP(126, _, _, _, _, _, _, _, _, egpio),
+ [127] = PINGROUP(127, _, _, _, _, _, _, _, _, egpio),
+ [128] = PINGROUP(128, _, _, _, _, _, _, _, _, egpio),
+ [129] = PINGROUP(129, _, _, _, _, _, _, _, _, egpio),
+ [130] = PINGROUP(130, _, _, _, _, _, _, _, _, egpio),
+ [131] = PINGROUP(131, _, _, _, _, _, _, _, _, egpio),
+ [132] = PINGROUP(132, _, _, _, _, _, _, _, _, egpio),
+ [133] = PINGROUP(133, _, _, _, _, _, _, _, _, egpio),
+ [134] = PINGROUP(134, _, _, _, _, _, _, _, _, egpio),
+ [135] = PINGROUP(135, _, _, _, _, _, _, _, _, egpio),
+ [136] = PINGROUP(136, _, _, _, _, _, _, _, _, egpio),
+ [137] = PINGROUP(137, _, _, _, _, _, _, _, _, egpio),
+ [138] = PINGROUP(138, _, _, _, _, _, _, _, _, egpio),
+ [139] = PINGROUP(139, _, _, _, _, _, _, _, _, egpio),
+ [140] = PINGROUP(140, _, _, _, _, _, _, _, _, egpio),
+ [141] = PINGROUP(141, _, _, _, _, _, _, _, _, egpio),
+ [142] = PINGROUP(142, _, _, _, _, _, _, _, _, egpio),
+ [143] = PINGROUP(143, _, _, _, _, _, _, _, _, egpio),
+ [144] = PINGROUP(144, dbg_out, _, _, _, _, _, _, _, egpio),
+ [145] = PINGROUP(145, _, _, _, _, _, _, _, _, egpio),
+ [146] = PINGROUP(146, _, _, _, _, _, _, _, _, egpio),
+ [147] = PINGROUP(147, _, _, _, _, _, _, _, _, egpio),
+ [148] = PINGROUP(148, _, _, _, _, _, _, _, _, egpio),
[149] = UFS_RESET(ufs_reset, 0x1a2000),
[150] = SDC_QDSD_PINGROUP(sdc1_rclk, 0x199000, 15, 0),
[151] = SDC_QDSD_PINGROUP(sdc1_clk, 0x199000, 13, 6),
@@ -1511,6 +1520,7 @@ static const struct msm_pinctrl_soc_data sa8775p_pinctrl = {
.ngpios = 150,
.wakeirq_map = sa8775p_pdc_map,
.nwakeirq_map = ARRAY_SIZE(sa8775p_pdc_map),
+ .egpio_func = 9,
};
static int sa8775p_pinctrl_probe(struct platform_device *pdev)
--
2.48.1
^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH v2 2/2] pinctrl: qcom: sa8775p: Enable egpio function
2025-03-12 7:25 ` [PATCH v2 2/2] pinctrl: qcom: sa8775p: Enable egpio function Wasim Nazir
@ 2025-03-12 9:18 ` Dmitry Baryshkov
0 siblings, 0 replies; 6+ messages in thread
From: Dmitry Baryshkov @ 2025-03-12 9:18 UTC (permalink / raw)
To: Wasim Nazir
Cc: Bjorn Andersson, Linus Walleij, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Bartosz Golaszewski, linux-arm-msm, linux-gpio,
devicetree, linux-kernel, kernel
On Wed, Mar 12, 2025 at 12:55:09PM +0530, Wasim Nazir wrote:
> Egpio feature allows IsLand Domain IOs to be reused as TLMM GPIOs.
> sa8775p supports egpio feature for GPIOs ranging from 126 to 148.
>
> Signed-off-by: Wasim Nazir <quic_wasimn@quicinc.com>
> ---
> drivers/pinctrl/qcom/pinctrl-sa8775p.c | 58 +++++++++++++++-----------
> 1 file changed, 34 insertions(+), 24 deletions(-)
>
Reviewed-by: Dmitry Baryshkov <lumag@kernel.org>
--
With best wishes
Dmitry
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH v2 1/2] dt-bindings: pinctrl: qcom: Add egpio function for sa8775p
2025-03-12 7:25 ` [PATCH v2 1/2] dt-bindings: pinctrl: qcom: Add " Wasim Nazir
@ 2025-03-12 11:49 ` Krzysztof Kozlowski
0 siblings, 0 replies; 6+ messages in thread
From: Krzysztof Kozlowski @ 2025-03-12 11:49 UTC (permalink / raw)
To: Wasim Nazir
Cc: Bjorn Andersson, Linus Walleij, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Bartosz Golaszewski, linux-arm-msm, linux-gpio,
devicetree, linux-kernel, kernel
On Wed, Mar 12, 2025 at 12:55:08PM +0530, Wasim Nazir wrote:
> Add egpio function for TLMM pinctrl on sa8775p platform.
>
> Signed-off-by: Wasim Nazir <quic_wasimn@quicinc.com>
> ---
> .../devicetree/bindings/pinctrl/qcom,sa8775p-tlmm.yaml | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH v2 0/2] pinctrl: qcom: Enable egpio function for sa8775p
2025-03-12 7:25 [PATCH v2 0/2] pinctrl: qcom: Enable egpio function for sa8775p Wasim Nazir
2025-03-12 7:25 ` [PATCH v2 1/2] dt-bindings: pinctrl: qcom: Add " Wasim Nazir
2025-03-12 7:25 ` [PATCH v2 2/2] pinctrl: qcom: sa8775p: Enable egpio function Wasim Nazir
@ 2025-03-14 11:08 ` Linus Walleij
2 siblings, 0 replies; 6+ messages in thread
From: Linus Walleij @ 2025-03-14 11:08 UTC (permalink / raw)
To: Wasim Nazir
Cc: Bjorn Andersson, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Bartosz Golaszewski, linux-arm-msm, linux-gpio, devicetree,
linux-kernel, kernel
On Wed, Mar 12, 2025 at 8:25 AM Wasim Nazir <quic_wasimn@quicinc.com> wrote:
> Add egpio function for GPIOs ranging from 126 to 148.
Patches applied!
Yours,
Linus Walleij
^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2025-03-14 11:09 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2025-03-12 7:25 [PATCH v2 0/2] pinctrl: qcom: Enable egpio function for sa8775p Wasim Nazir
2025-03-12 7:25 ` [PATCH v2 1/2] dt-bindings: pinctrl: qcom: Add " Wasim Nazir
2025-03-12 11:49 ` Krzysztof Kozlowski
2025-03-12 7:25 ` [PATCH v2 2/2] pinctrl: qcom: sa8775p: Enable egpio function Wasim Nazir
2025-03-12 9:18 ` Dmitry Baryshkov
2025-03-14 11:08 ` [PATCH v2 0/2] pinctrl: qcom: Enable egpio function for sa8775p Linus Walleij
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).