From: Linus Walleij <linus.walleij@linaro.org>
To: Chester Lin <clin@suse.com>
Cc: "Dong Aisheng" <aisheng.dong@nxp.com>,
"Fabio Estevam" <festevam@gmail.com>,
"Shawn Guo" <shawnguo@kernel.org>, "Jacky Bai" <ping.bai@nxp.com>,
"Pengutronix Kernel Team" <kernel@pengutronix.de>,
s32@nxp.com, linux-gpio@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
"Larisa Grigore" <larisa.grigore@nxp.com>,
"Ghennadi Procopciuc" <Ghennadi.Procopciuc@nxp.com>,
"Andrei Stefanescu" <andrei.stefanescu@nxp.com>,
"Radu Pirea" <radu-nicolae.pirea@nxp.com>,
"Andreas Färber" <afaerber@suse.de>,
"Matthias Brugger" <mbrugger@suse.com>,
"Matthew Nunez" <matthew.nunez@nxp.com>,
"Phu Luu An" <phu.luuan@nxp.com>,
"Stefan-Gabriel Mirea" <stefan-gabriel.mirea@nxp.com>
Subject: Re: [PATCH v2 2/2] pinctrl: add NXP S32 SoC family support
Date: Wed, 7 Dec 2022 23:52:29 +0100 [thread overview]
Message-ID: <CACRpkdZKmMpbWSFke4s4u8Z7x9POYNN-ONTTZp4VJzVGSSMA_g@mail.gmail.com> (raw)
In-Reply-To: <20221128054820.1771-3-clin@suse.com>
On Mon, Nov 28, 2022 at 6:49 AM Chester Lin <clin@suse.com> wrote:
> Add the pinctrl driver for NXP S32 SoC family. This driver is mainly based
> on NXP's downstream implementation on CodeAurora[1].
>
> [1] https://source.codeaurora.org/external/autobsps32/linux/tree/drivers/pinctrl/freescale?h=bsp34.0-5.10.120-rt
>
> Signed-off-by: Matthew Nunez <matthew.nunez@nxp.com>
> Signed-off-by: Phu Luu An <phu.luuan@nxp.com>
> Signed-off-by: Stefan-Gabriel Mirea <stefan-gabriel.mirea@nxp.com>
> Signed-off-by: Larisa Grigore <larisa.grigore@nxp.com>
> Signed-off-by: Ghennadi Procopciuc <Ghennadi.Procopciuc@nxp.com>
> Signed-off-by: Andrei Stefanescu <andrei.stefanescu@nxp.com>
> Signed-off-by: Radu Pirea <radu-nicolae.pirea@nxp.com>
> Signed-off-by: Chester Lin <clin@suse.com>
> ---
>
> Changes in v2:
> - Create a s32_pin_range matrix in the driver for replacing the "nxp,pins"
> property in DT.
> - Refine the compatible name to "nxp,s32g2-siul2-pinctrl".
> - Fix the copyright requested by NXP.
> - Remove a few recipients from the Cc list since these email addresses are no
> longer available.
Overall this version looks very good. I will be happy to merge it once
Andreas comments are addressed, and it is rebased on v6.2-rc1 once that
is out in some two+ weeks.
Yours,
Linus Walleij
next prev parent reply other threads:[~2022-12-07 22:51 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-11-28 5:48 [PATCH v2 0/2] Add pinctrl support for S32 SoC family Chester Lin
2022-11-28 5:48 ` [PATCH v2 1/2] dt-bindings: pinctrl: add schema for NXP S32 SoCs Chester Lin
2022-11-29 14:00 ` Andreas Färber
2022-11-29 14:52 ` Chester Lin
2022-11-30 14:58 ` Krzysztof Kozlowski
2022-12-05 6:16 ` Chester Lin
2022-12-05 9:02 ` Krzysztof Kozlowski
2022-12-05 11:05 ` Chester Lin
2022-12-05 13:26 ` Krzysztof Kozlowski
2022-11-28 5:48 ` [PATCH v2 2/2] pinctrl: add NXP S32 SoC family support Chester Lin
2022-11-29 13:40 ` Andreas Färber
2022-12-05 7:06 ` Chester Lin
2022-12-07 22:52 ` Linus Walleij [this message]
2022-12-07 23:04 ` Fabio Estevam
2022-12-08 21:37 ` Linus Walleij
2022-12-09 4:38 ` Chester Lin
2022-12-09 11:27 ` Linus Walleij
2022-12-14 23:08 ` Saravana Kannan
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