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References: <20220329173932.2588289-1-quic_jaehyoo@quicinc.com>
In-Reply-To: <20220329173932.2588289-1-quic_jaehyoo@quicinc.com>
From:   Linus Walleij <linus.walleij@linaro.org>
Date:   Mon, 18 Apr 2022 01:28:18 +0200
Message-ID: <CACRpkdZff-TbnNHO6Q590ubyH51+yqN68DOghazVKvYoHMBekw@mail.gmail.com>
Subject: Re: [PATCH v3 0/7] Fix AST2600 quad mode SPI pinmux settings
To:     Jae Hyun Yoo <quic_jaehyoo@quicinc.com>
Cc:     Andrew Jeffery <andrew@aj.id.au>, Rob Herring <robh+dt@kernel.org>,
        Krzysztof Kozlowski <krzk+dt@kernel.org>,
        Joel Stanley <joel@jms.id.au>, Arnd Bergmann <arnd@arndb.de>,
        Jamie Iles <quic_jiles@quicinc.com>,
        Graeme Gregory <quic_ggregory@quicinc.com>,
        devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
        linux-aspeed@lists.ozlabs.org
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Hi Jae,

On Tue, Mar 29, 2022 at 7:40 PM Jae Hyun Yoo <quic_jaehyoo@quicinc.com> wrote:

> Jae Hyun Yoo (5):
>   pinctrl: pinctrl-aspeed-g6: remove FWQSPID group in pinctrl
>   dt-bindings: pinctrl: aspeed-g6: remove FWQSPID group
>   dt-bindings: pinctrl: aspeed-g6: add FWQSPI function/group
>   pinctrl: pinctrl-aspeed-g6: add FWQSPI function-group

These four patches applied to the pinctrl tree.

Please funnel patches 1, 6, 7 through the SoC tree.

Yours,
Linus Walleij