* [PATCH 2/2] pinctrl: ocelot: Add support for ServalT SoC
2022-01-25 13:18 [PATCH 0/2] pinctrl: ocelot Add support for ServalT Horatiu Vultur
2022-01-25 13:18 ` [PATCH 1/2] dt-bindings: pinctrl: ocelot: Add ServalT SoC support Horatiu Vultur
@ 2022-01-25 13:18 ` Horatiu Vultur
2022-02-02 23:38 ` [PATCH 0/2] pinctrl: ocelot Add support for ServalT Linus Walleij
2 siblings, 0 replies; 4+ messages in thread
From: Horatiu Vultur @ 2022-01-25 13:18 UTC (permalink / raw)
To: linux-gpio, devicetree, linux-kernel
Cc: linus.walleij, robh+dt, Horatiu Vultur
This patch adds support for ServalT pinctrl, using the ocelot driver as
basis.
Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
---
drivers/pinctrl/pinctrl-ocelot.c | 102 +++++++++++++++++++++++++++++++
1 file changed, 102 insertions(+)
diff --git a/drivers/pinctrl/pinctrl-ocelot.c b/drivers/pinctrl/pinctrl-ocelot.c
index fc969208d904..685c79e08d40 100644
--- a/drivers/pinctrl/pinctrl-ocelot.c
+++ b/drivers/pinctrl/pinctrl-ocelot.c
@@ -695,6 +695,98 @@ static const struct pinctrl_pin_desc jaguar2_pins[] = {
JAGUAR2_PIN(63),
};
+#define SERVALT_P(p, f0, f1, f2) \
+static struct ocelot_pin_caps servalt_pin_##p = { \
+ .pin = p, \
+ .functions = { \
+ FUNC_GPIO, FUNC_##f0, FUNC_##f1, FUNC_##f2 \
+ }, \
+}
+
+SERVALT_P(0, SG0, NONE, NONE);
+SERVALT_P(1, SG0, NONE, NONE);
+SERVALT_P(2, SG0, NONE, NONE);
+SERVALT_P(3, SG0, NONE, NONE);
+SERVALT_P(4, IRQ0_IN, IRQ0_OUT, TWI_SCL_M);
+SERVALT_P(5, IRQ1_IN, IRQ1_OUT, TWI_SCL_M);
+SERVALT_P(6, UART, NONE, NONE);
+SERVALT_P(7, UART, NONE, NONE);
+SERVALT_P(8, SI, SFP, TWI_SCL_M);
+SERVALT_P(9, PCI_WAKE, SFP, SI);
+SERVALT_P(10, PTP0, SFP, TWI_SCL_M);
+SERVALT_P(11, PTP1, SFP, TWI_SCL_M);
+SERVALT_P(12, REF_CLK, SFP, TWI_SCL_M);
+SERVALT_P(13, REF_CLK, SFP, TWI_SCL_M);
+SERVALT_P(14, REF_CLK, IRQ0_OUT, SI);
+SERVALT_P(15, REF_CLK, IRQ1_OUT, SI);
+SERVALT_P(16, TACHO, SFP, SI);
+SERVALT_P(17, PWM, NONE, TWI_SCL_M);
+SERVALT_P(18, PTP2, SFP, SI);
+SERVALT_P(19, PTP3, SFP, SI);
+SERVALT_P(20, UART2, SFP, SI);
+SERVALT_P(21, UART2, NONE, NONE);
+SERVALT_P(22, MIIM, SFP, TWI2);
+SERVALT_P(23, MIIM, SFP, TWI2);
+SERVALT_P(24, TWI, NONE, NONE);
+SERVALT_P(25, TWI, SFP, TWI_SCL_M);
+SERVALT_P(26, TWI_SCL_M, SFP, SI);
+SERVALT_P(27, TWI_SCL_M, SFP, SI);
+SERVALT_P(28, TWI_SCL_M, SFP, SI);
+SERVALT_P(29, TWI_SCL_M, NONE, NONE);
+SERVALT_P(30, TWI_SCL_M, NONE, NONE);
+SERVALT_P(31, TWI_SCL_M, NONE, NONE);
+SERVALT_P(32, TWI_SCL_M, NONE, NONE);
+SERVALT_P(33, RCVRD_CLK, NONE, NONE);
+SERVALT_P(34, RCVRD_CLK, NONE, NONE);
+SERVALT_P(35, RCVRD_CLK, NONE, NONE);
+SERVALT_P(36, RCVRD_CLK, NONE, NONE);
+
+#define SERVALT_PIN(n) { \
+ .number = n, \
+ .name = "GPIO_"#n, \
+ .drv_data = &servalt_pin_##n \
+}
+
+static const struct pinctrl_pin_desc servalt_pins[] = {
+ SERVALT_PIN(0),
+ SERVALT_PIN(1),
+ SERVALT_PIN(2),
+ SERVALT_PIN(3),
+ SERVALT_PIN(4),
+ SERVALT_PIN(5),
+ SERVALT_PIN(6),
+ SERVALT_PIN(7),
+ SERVALT_PIN(8),
+ SERVALT_PIN(9),
+ SERVALT_PIN(10),
+ SERVALT_PIN(11),
+ SERVALT_PIN(12),
+ SERVALT_PIN(13),
+ SERVALT_PIN(14),
+ SERVALT_PIN(15),
+ SERVALT_PIN(16),
+ SERVALT_PIN(17),
+ SERVALT_PIN(18),
+ SERVALT_PIN(19),
+ SERVALT_PIN(20),
+ SERVALT_PIN(21),
+ SERVALT_PIN(22),
+ SERVALT_PIN(23),
+ SERVALT_PIN(24),
+ SERVALT_PIN(25),
+ SERVALT_PIN(26),
+ SERVALT_PIN(27),
+ SERVALT_PIN(28),
+ SERVALT_PIN(29),
+ SERVALT_PIN(30),
+ SERVALT_PIN(31),
+ SERVALT_PIN(32),
+ SERVALT_PIN(33),
+ SERVALT_PIN(34),
+ SERVALT_PIN(35),
+ SERVALT_PIN(36),
+};
+
#define SPARX5_P(p, f0, f1, f2) \
static struct ocelot_pin_caps sparx5_pin_##p = { \
.pin = p, \
@@ -1497,6 +1589,15 @@ static struct pinctrl_desc jaguar2_desc = {
.owner = THIS_MODULE,
};
+static struct pinctrl_desc servalt_desc = {
+ .name = "servalt-pinctrl",
+ .pins = servalt_pins,
+ .npins = ARRAY_SIZE(servalt_pins),
+ .pctlops = &ocelot_pctl_ops,
+ .pmxops = &ocelot_pmx_ops,
+ .owner = THIS_MODULE,
+};
+
static struct pinctrl_desc sparx5_desc = {
.name = "sparx5-pinctrl",
.pins = sparx5_pins,
@@ -1774,6 +1875,7 @@ static const struct of_device_id ocelot_pinctrl_of_match[] = {
{ .compatible = "mscc,serval-pinctrl", .data = &serval_desc },
{ .compatible = "mscc,ocelot-pinctrl", .data = &ocelot_desc },
{ .compatible = "mscc,jaguar2-pinctrl", .data = &jaguar2_desc },
+ { .compatible = "mscc,servalt-pinctrl", .data = &servalt_desc },
{ .compatible = "microchip,sparx5-pinctrl", .data = &sparx5_desc },
{ .compatible = "microchip,lan966x-pinctrl", .data = &lan966x_desc },
{},
--
2.33.0
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