Re: [PATCHv4 2/2] Add a GPIO driver for Altera FPGA Manager Fabric I/O

[Linus Walleij <linus.walleij@linaro.org>]

On Thu, Oct 19, 2017 at 6:29 PM, Bernd Edlinger
<bernd.edlinger@hotmail.de> wrote:

Does this really work?

> This is an internal 32-bit input and 32-bit output port to the FPGA logic.
>
> Instantiate this in the device tree as:
>
>   gpio3: gpio@ff706010 {
>    #address-cells = <1>;
>    #size-cells = <0>;
>    compatible = "altr,fpgamgr-gpio";
>    reg = <0xff706010 0x8>;
>    status = "okay";
>
>    portd: gpio-controller@0 {
>     compatible = "altr,fpgamgr-gpio-output";
>     gpio-controller;
>     #gpio-cells = <2>;
>     reg = <0>;
>    };
>
>    porte: gpio-controller@1 {
>     compatible = "altr,fpgamgr-gpio-input";
>     gpio-controller;
>     #gpio-cells = <2>;
>     reg = <1>;
>    };

So you have output-only and input-only ports....

> +static int fpgamgr_gpio_add_port(struct fpgamgr_gpio *gpio,
> +                                struct fpgamgr_port_property *pp,
> +                                unsigned int offs)
> +{
> +       struct fpgamgr_gpio_port *port;
> +       void __iomem *dat;
> +       int err;
> +
> +       port = &gpio->ports[offs];
> +       port->gpio = gpio;
> +       port->idx = pp->idx;
> +
> +       dat = gpio->regs + (pp->idx * 4);
> +
> +       err = bgpio_init(&port->bgc, gpio->dev, 4, dat, NULL, NULL,
> +                        NULL, NULL, 0);

But all you add is input-only GPIO chips. Also for the output ports.

Yours,
Linus Walleij