From: Linus Walleij <linus.walleij@linaro.org>
To: Icenowy Zheng <icenowy@aosc.xyz>
Cc: Mark Rutland <mark.rutland@arm.com>,
"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
"linux-gpio@vger.kernel.org" <linux-gpio@vger.kernel.org>,
Russell King <linux@armlinux.org.uk>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
Hans de Goede <hdegoede@redhat.com>, Chen-Yu Tsai <wens@csie.org>,
Rob Herring <robh+dt@kernel.org>,
Maxime Ripard <maxime.ripard@free-electrons.com>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH 1/2] pinctrl: sunxi: fix uart1 CTS/RTS pins at PG on A23/A33
Date: Tue, 23 Aug 2016 12:29:43 +0200 [thread overview]
Message-ID: <CACRpkdarLKZD21YF-q5PAerjbbJoKi790SAThPiYGDbGjhGC7g@mail.gmail.com> (raw)
In-Reply-To: <20160823055826.20591-1-icenowy@aosc.xyz>
On Tue, Aug 23, 2016 at 7:58 AM, Icenowy Zheng <icenowy@aosc.xyz> wrote:
> PG8, PG9 is said to be the CTS/RTS pins for UART1 according to the A23/33
> datasheets. However, the function is wrongly named "uart2" in the pinctrl
> driver. This patch fixes this by modifying them to be named "uart1".
>
> Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Applied for stable with Maxime's ACK.
Yours,
Linus Walleij
prev parent reply other threads:[~2016-08-23 10:29 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-08-23 5:58 [PATCH 1/2] pinctrl: sunxi: fix uart1 CTS/RTS pins at PG on A23/A33 Icenowy Zheng
2016-08-23 5:58 ` [PATCH 2/2] ARM: dts: sun8i: Add extra UART pinmux settings for A23/33 Icenowy Zheng
2016-08-23 11:42 ` Maxime Ripard
2016-08-23 13:51 ` Icenowy Zheng
2016-08-26 20:18 ` Maxime Ripard
2016-08-23 6:47 ` [PATCH 1/2] pinctrl: sunxi: fix uart1 CTS/RTS pins at PG on A23/A33 Maxime Ripard
2016-08-23 6:50 ` Icenowy Zheng
2016-08-23 9:27 ` Linus Walleij
2016-08-23 9:54 ` Maxime Ripard
2016-08-23 10:29 ` Linus Walleij [this message]
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