From mboxrd@z Thu Jan 1 00:00:00 1970 From: Linus Walleij Subject: Re: [PATCH 1/2] pinctrl: sunxi: fix uart1 CTS/RTS pins at PG on A23/A33 Date: Tue, 23 Aug 2016 12:29:43 +0200 Message-ID: References: <20160823055826.20591-1-icenowy@aosc.xyz> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <20160823055826.20591-1-icenowy@aosc.xyz> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=m.gmane.org@lists.infradead.org To: Icenowy Zheng Cc: Mark Rutland , "devicetree@vger.kernel.org" , "linux-gpio@vger.kernel.org" , Russell King , "linux-kernel@vger.kernel.org" , Hans de Goede , Chen-Yu Tsai , Rob Herring , Maxime Ripard , "linux-arm-kernel@lists.infradead.org" List-Id: devicetree@vger.kernel.org On Tue, Aug 23, 2016 at 7:58 AM, Icenowy Zheng wrote: > PG8, PG9 is said to be the CTS/RTS pins for UART1 according to the A23/33 > datasheets. However, the function is wrongly named "uart2" in the pinctrl > driver. This patch fixes this by modifying them to be named "uart1". > > Signed-off-by: Icenowy Zheng Applied for stable with Maxime's ACK. Yours, Linus Walleij