From mboxrd@z Thu Jan 1 00:00:00 1970 From: Linus Walleij Subject: Re: [PATCH 2/2] pinctrl: Add Pistachio SoC pin control driver Date: Thu, 19 Mar 2015 09:42:16 +0100 Message-ID: References: <1424744104-14151-1-git-send-email-abrestic@chromium.org> <1424744104-14151-3-git-send-email-abrestic@chromium.org> Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Return-path: In-Reply-To: Sender: linux-gpio-owner@vger.kernel.org To: Andrew Bresticker Cc: Alexandre Courbot , Ralf Baechle , "devicetree@vger.kernel.org" , "linux-gpio@vger.kernel.org" , Linux MIPS , "linux-kernel@vger.kernel.org" , Ezequiel Garcia , James Hartley , James Hogan , Damien Horsley , Govindraj Raja List-Id: devicetree@vger.kernel.org On Tue, Mar 17, 2015 at 5:56 PM, Andrew Bresticker wrote: [Me] >> Sorry if I don't really know how things work now... :( >> It seems like a logical way to me. (...) > 4) The ->set_mux() op must set the proper function for the pin. > 5) The ->set_mux() op must also disable the GPIO function for the pin. > To disable the GPIO function, the pinctrl driver must map the pin to a > GPIO bank/offset and disable the GPIO via the GPIO bank's GPIO_EN > register. That sounds like the"GPIO" registers are actually involved in any muxing usecase, meaning there is not really a clean split between the pinctrl and GPIO hardware, the case I refer to as "GPIO mode pitfalls" in Documentation/pinctrl.txt. In such cases both halves of the driver(s) need to be aware of the other, and that is what you seem to be wanting to achieve. So I was wrong in thinking the GPIO device could be a separate subdevice, the two parts are too dependent on each other. So keep a single probe() function and let the two driver halves poke into each others' registers. Sorry for the fuzz... Yours, Linus Walleij