From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 30423C433EF for ; Tue, 28 Jun 2022 19:50:56 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231698AbiF1Tuz (ORCPT ); Tue, 28 Jun 2022 15:50:55 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46010 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231727AbiF1Tum (ORCPT ); Tue, 28 Jun 2022 15:50:42 -0400 Received: from mail-yb1-xb2f.google.com (mail-yb1-xb2f.google.com [IPv6:2607:f8b0:4864:20::b2f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3F8092CDF5 for ; Tue, 28 Jun 2022 12:48:24 -0700 (PDT) Received: by mail-yb1-xb2f.google.com with SMTP id i7so23968116ybe.11 for ; Tue, 28 Jun 2022 12:48:24 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=YHXkpPXpFGHDlkGftgH4HXkL2OlNnjfvXug8uoS7Fl0=; b=l0E1A0S5TJAdUvK/62+NNXFIajM3Sz1ign/Kl1cu5JyW6CIaA3WPeq0slPouEW5RQV /8p62aOOxBZxOGw6Dv1T6u05mzKkylM378WT8lA141aXNqaarFcQ5Be6fPlHefoVMPO0 0478dk+Se/fCVhA/h3iNGvq3rRizWBN2g8Pjc= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=YHXkpPXpFGHDlkGftgH4HXkL2OlNnjfvXug8uoS7Fl0=; b=grz+BQ2l+HOryb6D4q62nts86rR95uREiuWt++JiuzFiJ35Tq5Wm1960CWLBKH4hag o9Uu1sk02RTLi3ine8AP1canhDmTp7IVSNINyVohBqQoxDiaz7CfI5UEF+IezCGSzRTS 6aNZ+qZaSxcbmo7FoKLC8UT7qaIpFZSU83bRifbhyfeRGMppra9cuEjqi8nz7YpNUepy Xi7XThKtfR9O+Ajs9lINB9oMtfzB3pPMQDDHv4xAg6Uj02Pea4Q1PkHzlcGPdT8AXFHx Gtn08kNN7EUhx8lIjliPEEV5URo72IQ7XkT7CNTPutY8s4Zo5iDKLW2ltX6y983CiBZ7 Rokw== X-Gm-Message-State: AJIora82UWLOB0LYmioUXsfI4OzGGD+ZetJnuJc7MuH2+T+fM/hYsV1F 5XqgQG9fT3e1IAQkbhR1rFba8LKd/4q5Dfm1rAuxqQ== X-Google-Smtp-Source: AGRyM1srjCp28XBoQQO/p2NofxTCtxHZShc55UMxj4amOOUEmonQqY88CRzmE+TqGnV1wCssUZZtegMQ3CbuPE4Mbsk= X-Received: by 2002:a25:bcc:0:b0:66c:b80a:2d5 with SMTP id 195-20020a250bcc000000b0066cb80a02d5mr15517865ybl.196.1656445703313; Tue, 28 Jun 2022 12:48:23 -0700 (PDT) MIME-Version: 1.0 References: <20220622173605.1168416-1-pmalani@chromium.org> <20220622173605.1168416-6-pmalani@chromium.org> In-Reply-To: From: Prashant Malani Date: Tue, 28 Jun 2022 12:48:11 -0700 Message-ID: Subject: Re: [PATCH v5 5/9] drm/bridge: anx7625: Add typec_mux_set callback function To: Stephen Boyd Cc: linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org, bleung@chromium.org, heikki.krogerus@linux.intel.com, Pin-Yen Lin , AngeloGioacchino Del Regno , =?UTF-8?B?TsOtY29sYXMgRiAuIFIgLiBBIC4gUHJhZG8=?= , Allen Chen , Andrzej Hajda , Daniel Vetter , David Airlie , devicetree@vger.kernel.org, dri-devel@lists.freedesktop.org, Greg Kroah-Hartman , Hsin-Yi Wang , Jernej Skrabec , Jonas Karlman , =?UTF-8?B?Sm9zw6kgRXhww7NzaXRv?= , Krzysztof Kozlowski , Laurent Pinchart , Maxime Ripard , Neil Armstrong , Robert Foss , Rob Herring , Sam Ravnborg , Thomas Zimmermann , Xin Ji Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On Tue, Jun 28, 2022 at 12:25 PM Stephen Boyd wrote: > > Quoting Prashant Malani (2022-06-22 10:34:34) > > From: Pin-Yen Lin > > > > Add the callback function when the driver receives state > > changes of the Type-C port. The callback function configures the > > crosspoint switch of the anx7625 bridge chip, which can change the > > output pins of the signals according to the port state. > > Can this be combined with the previous two patches? They really don't > stand alone because the previous two patches are adding stubs that are > filled out later. I split it out for ease of reviewing, but sure, I will combine it if there is a v6. > > > diff --git a/drivers/gpu/drm/bridge/analogix/anx7625.c b/drivers/gpu/drm/bridge/analogix/anx7625.c > > index bd21f159b973..5992fc8beeeb 100644 > > --- a/drivers/gpu/drm/bridge/analogix/anx7625.c > > +++ b/drivers/gpu/drm/bridge/analogix/anx7625.c > > @@ -15,6 +15,7 @@ > > #include > > #include > > #include > > +#include > > #include > > #include > > > > @@ -2582,9 +2583,64 @@ static void anx7625_runtime_disable(void *data) > > pm_runtime_disable(data); > > } > > > > +static void anx7625_set_crosspoint_switch(struct anx7625_data *ctx, > > + enum typec_orientation orientation) > > +{ > > + if (orientation == TYPEC_ORIENTATION_NORMAL) { > > + anx7625_reg_write(ctx, ctx->i2c.tcpc_client, TCPC_SWITCH_0, > > + SW_SEL1_SSRX_RX1 | SW_SEL1_DPTX0_RX2); > > + anx7625_reg_write(ctx, ctx->i2c.tcpc_client, TCPC_SWITCH_1, > > + SW_SEL2_SSTX_TX1 | SW_SEL2_DPTX1_TX2); > > + } else if (orientation == TYPEC_ORIENTATION_REVERSE) { > > + anx7625_reg_write(ctx, ctx->i2c.tcpc_client, TCPC_SWITCH_0, > > + SW_SEL1_SSRX_RX2 | SW_SEL1_DPTX0_RX1); > > + anx7625_reg_write(ctx, ctx->i2c.tcpc_client, TCPC_SWITCH_1, > > + SW_SEL2_SSTX_TX2 | SW_SEL2_DPTX1_TX1); > > + } > > +} > > + > > +static void anx7625_typec_two_ports_update(struct anx7625_data *ctx) > > +{ > > + if (ctx->typec_ports[0].dp_connected && ctx->typec_ports[1].dp_connected) > > + /* Both ports available, do nothing to retain the current one. */ > > + return; > > + else if (ctx->typec_ports[0].dp_connected) > > + anx7625_set_crosspoint_switch(ctx, TYPEC_ORIENTATION_NORMAL); > > + else if (ctx->typec_ports[1].dp_connected) > > + anx7625_set_crosspoint_switch(ctx, TYPEC_ORIENTATION_REVERSE); > > +} > > + > > static int anx7625_typec_mux_set(struct typec_mux_dev *mux, > > struct typec_mux_state *state) > > { > > + struct anx7625_port_data *data = typec_mux_get_drvdata(mux); > > + struct anx7625_data *ctx = data->ctx; > > + struct device *dev = &ctx->client->dev; > > + bool new_dp_connected, old_dp_connected; > > + > > + if (ctx->num_typec_switches == 1) > > How do we handle the case where the usb-c-connector is directly > connected to the RX1/TX1 and RX2/TX2 pins? This device would be an > orientation (normal/reverse) and mode switch (usb/dp) in that scenario, > but this code is written in a way that the orientation switch isn't > going to flip the crosspoint switch for the different pin assignments. If all 4 SS lanes are connected to 1 usb-c-connector; there would be just 1 "typec-switch" node. In that case, the DT would only specify it as an "orientation-switch" and register an orientation-switch with the Type-C framework. The orientation switch would pretty much do what the mode-switch callback does here (configuring the crosspoint switch). One could also register a "mode-switch" there but it wouldn't do anything (all 4 lanes are already connected so there is nothing to re-route in the crosspoint switch). Hence the above "if" check. Unfortunately, I don't have hardware which connects all 4 SS lanes from 1 Type-C port to the anx7625, so I didn't add the orientation switch handling to the driver (since I have no way of verifying it). Regarding DP alt-mode pin assignments : I think anx7625 will only support Pin D (only 2 lane DP, no 4 lane DP). BR, -Prashant