From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id CE27AC433FE for ; Thu, 3 Feb 2022 21:42:07 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1354049AbiBCVmH (ORCPT ); Thu, 3 Feb 2022 16:42:07 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46670 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S242684AbiBCVmG (ORCPT ); Thu, 3 Feb 2022 16:42:06 -0500 Received: from mail-ot1-x32b.google.com (mail-ot1-x32b.google.com [IPv6:2607:f8b0:4864:20::32b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 677B2C06173D for ; Thu, 3 Feb 2022 13:42:06 -0800 (PST) Received: by mail-ot1-x32b.google.com with SMTP id x52-20020a05683040b400b0059ea92202daso3702784ott.7 for ; Thu, 03 Feb 2022 13:42:06 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=mime-version:in-reply-to:references:from:user-agent:date:message-id :subject:to:cc; bh=1BxE8YrTuPNLTocALV6/dOU/1D5W0XfJUbvbeKGiPBo=; b=I9qwWeSwwd9Ufz80dvJWBpyNEbwUjhW9GdJMAXk1Nhrun9bh0tqq5mhj+AZWC8THbH kVDXVjlvQo+5HCNVYEVxTvRRPKRUwt6wE3j7EI6kdNfK/SFpkMwiZB6uaw5cR3G+/xJB RbeiLr1nzW2EwVeppn2XLmELRCDM7Q9av0WAA= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:mime-version:in-reply-to:references:from :user-agent:date:message-id:subject:to:cc; bh=1BxE8YrTuPNLTocALV6/dOU/1D5W0XfJUbvbeKGiPBo=; b=vY8jCw/ViiV2strRNnszRMTZQw2TyNvMcKDOJQeGnDmG6oW1ibuL08y3LiePvNhYFI 018MUqgScr5u0ebmUJh6lxqlxeOvgW48lbCEomEyxgJCRLq1Ys7N8lC7s1iZUWTgM/kx 0vXlLDnJZR1TqfNHHAMvIK4iDAVjzQsPFppVoU2pbtdKP9tz+qidRqKCF2br1jHfSgjV AgmJDnofxUY+GGTeH59+GMhSt29S1daptWsLkN9gYZuQKwL1riitKnFbAOnbASiyytzj VjTeUTGIQyeMmltjhiZxDPdHEbn5bAXHSgXmCR4oMwXe1ghwZkT8YIUfY5P2+M09CbHB dtrg== X-Gm-Message-State: AOAM532ZVAhIONQfNnrqVO9zpCTvBGGw79KKJcHmcWOquVrVu6FS1Bpk f52nMB4Unbo9O0PFY/WRF8p5+seVKHFBd7kpFJCvIQ== X-Google-Smtp-Source: ABdhPJyDxej66/Vt63TI6nQJctzlFybAxj0ayifCcZGw+L0kXIomsk8EMooLGggnX21HzTuDw9+EZ5yGVUvwNda0wVg= X-Received: by 2002:a9d:6f06:: with SMTP id n6mr39642otq.159.1643924525682; Thu, 03 Feb 2022 13:42:05 -0800 (PST) Received: from 753933720722 named unknown by gmailapi.google.com with HTTPREST; Thu, 3 Feb 2022 21:42:05 +0000 MIME-Version: 1.0 In-Reply-To: <20220202132301.v3.9.I5f367dcce8107f2186b2aad4aef0dfcfafa034b9@changeid> References: <20220202212348.1391534-1-dianders@chromium.org> <20220202132301.v3.9.I5f367dcce8107f2186b2aad4aef0dfcfafa034b9@changeid> From: Stephen Boyd User-Agent: alot/0.10 Date: Thu, 3 Feb 2022 21:42:05 +0000 Message-ID: Subject: Re: [PATCH v3 09/14] arm64: dts: qcom: sc7280: Disable pull from pcie1_clkreq To: Bjorn Andersson , Douglas Anderson Cc: pmaliset@codeaurora.org, mka@chromium.org, quic_rjendra@quicinc.com, Shaik Sajida Bhanu , kgodara@codeaurora.org, konrad.dybcio@somainline.org, Sankeerth Billakanti , sibis@codeaurora.org, Andy Gross , Rob Herring , devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Quoting Douglas Anderson (2022-02-02 13:23:43) > I believe that the PCIe clkreq pin is an output. That means we > shouldn't have a pull enabled for it. Turn it off. It sounds like it's a request from the PCI device to the PCI phy that the clk should be on. I googled pcie clkreq open drain and this pdf[1] says "The CLKREQ# signal is an open drain, active low signal that is driven low by the PCI Express M.2 add-I Card function to request that the PCI Express reference clock be available (active clock state) in order to allow the PCI Express interface to send/receive data" so presumably if there isn't an external pull on the signal the open drain feature will not work and the PCIe device won't be able to drive it low. [1] https://advdownload.advantech.com/productfile/PIS/96FD80-P512-LIS/Product%20-%20Datasheet/96FD80-P512-LIS_datasheet20180110154919.pdf