From: Stephen Boyd <swboyd@chromium.org>
To: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com>,
agross@kernel.org, alsa-devel@alsa-project.org,
andersson@kernel.org, bgoswami@quicinc.com, broonie@kernel.org,
devicetree@vger.kernel.org, judyhsiao@chromium.org,
lgirdwood@gmail.com, linux-arm-msm@vger.kernel.org,
linux-kernel@vger.kernel.org, perex@perex.cz,
quic_plai@quicinc.com, quic_rohkumar@quicinc.com,
robh+dt@kernel.org, srinivas.kandagatla@linaro.org,
tiwai@suse.com
Cc: Srinivasa Rao Mandadapu <srivasam@qualcomm.corp-partner.google.com>
Subject: Re: [PATCH] ASoC: qcom: lpass-cpu: mark HDMI TX registers as volatile
Date: Wed, 12 Oct 2022 13:23:57 -0500 [thread overview]
Message-ID: <CAE-0n52dsaTLQ7o6Z2PeFSv2_vTjvtujJ0JWCPE3uXxpKD0O4Q@mail.gmail.com> (raw)
In-Reply-To: <1665569560-28943-1-git-send-email-quic_srivasam@quicinc.com>
Quoting Srinivasa Rao Mandadapu (2022-10-12 03:12:40)
> From: Srinivasa Rao Mandadapu <srivasam@qualcomm.corp-partner.google.com>
>
> Update HDMI volatile registers list as DMA, Channel Selection registers
> , vbit control registers are being reflected by hardware DP port
No idea why a comma starts this line.
> disconnection.
Add a newline here?
> This update is required to fix no display and no sound issue
> observed after reconnecting TAMA/SANWA DP cables.
> Once DP cable is unplugged, DMA control registers are being reset by
> hardware, however at second plugin, new dma control values does not
> updated to the dma hardware registers since new register value and
> cached values at the time of first plugin are same.
>
Any Fixes tag?
> Signed-off-by: Srinivasa Rao Mandadapu <srivasam@qualcomm.corp-partner.google.com>
Why not simply the quicinc email?
next prev parent reply other threads:[~2022-10-12 18:24 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-10-12 10:12 [PATCH] ASoC: qcom: lpass-cpu: mark HDMI TX registers as volatile Srinivasa Rao Mandadapu
2022-10-12 18:23 ` Stephen Boyd [this message]
2022-10-13 14:43 ` Mark Brown
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