Re: [PATCH 30/31] dt-bindings: nds32 CPU Bindings

Re: [PATCH 30/31] dt-bindings: nds32 CPU Bindings

[Rob Herring]

Please Cc the DT list on bindings.

On Tue, Nov 7, 2017 at 11:55 PM, Greentime Hu <green.hu@gmail.com> wrote:
> From: Greentime Hu <greentime@andestech.com>

Commit message needed.

> Signed-off-by: Vincent Chen <vincentc@andestech.com>
> Signed-off-by: Rick Chen <rick@andestech.com>
> Signed-off-by: Zong Li <zong@andestech.com>
> Signed-off-by: Greentime Hu <greentime@andestech.com>
> ---
>  Documentation/devicetree/bindings/nds32/cpus.txt |   33 ++++++++++++++++++++++
>  1 file changed, 33 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/nds32/cpus.txt
>
> diff --git a/Documentation/devicetree/bindings/nds32/cpus.txt b/Documentation/devicetree/bindings/nds32/cpus.txt
> new file mode 100644
> index 0000000..97394cb
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/nds32/cpus.txt
> @@ -0,0 +1,33 @@
> +* Andestech Processor Binding
> +
> +This binding specifies what properties must be available in the device tree
> +representation of a Andestech Processor Core, which is the root node in the
> +tree.
> +
> +Required properties:
> +
> +       - compatible:
> +               Usage: required
> +               Value type: <string>
> +               Definition: should be one of:
> +                       "andestech,n13"
> +                       "andestech,n15"
> +                       "andestech,d15"
> +                       "andestech,n10"
> +                       "andestech,d10"

SMP supported for any of these?

> +
> +    - device_type
> +               Usage: required
> +               Value type: <string>
> +               Definition: must be "cpu"
> +
> +* Examples
> +
> +/ {
> +       cpus {
> +               cpu@0 {

Needs a reg property or drop the unit address.

> +                       device_type = "cpu";
> +                       compatible = "andestech,n13", "andestech,n15";

n13 is a superset of n15?

> +               };
> +       };
> +};
> --
> 1.7.9.5
>

Re: [PATCH 30/31] dt-bindings: nds32 CPU Bindings

[Greentime Hu]

2017-11-08 21:18 GMT+08:00 Rob Herring <robh+dt@kernel.org>:
> Please Cc the DT list on bindings.

Sorry. I am not sure what you mean.
Do you mean add devicetree@vger.kernel.org to cc list?

> On Tue, Nov 7, 2017 at 11:55 PM, Greentime Hu <green.hu@gmail.com> wrote:
>> From: Greentime Hu <greentime@andestech.com>
>
> Commit message needed.

Thanks. I will add more commit messages in the next version patch.

>> Signed-off-by: Vincent Chen <vincentc@andestech.com>
>> Signed-off-by: Rick Chen <rick@andestech.com>
>> Signed-off-by: Zong Li <zong@andestech.com>
>> Signed-off-by: Greentime Hu <greentime@andestech.com>
>> ---
>>  Documentation/devicetree/bindings/nds32/cpus.txt |   33 ++++++++++++++++++++++
>>  1 file changed, 33 insertions(+)
>>  create mode 100644 Documentation/devicetree/bindings/nds32/cpus.txt
>>
>> diff --git a/Documentation/devicetree/bindings/nds32/cpus.txt b/Documentation/devicetree/bindings/nds32/cpus.txt
>> new file mode 100644
>> index 0000000..97394cb
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/nds32/cpus.txt
>> @@ -0,0 +1,33 @@
>> +* Andestech Processor Binding
>> +
>> +This binding specifies what properties must be available in the device tree
>> +representation of a Andestech Processor Core, which is the root node in the
>> +tree.
>> +
>> +Required properties:
>> +
>> +       - compatible:
>> +               Usage: required
>> +               Value type: <string>
>> +               Definition: should be one of:
>> +                       "andestech,n13"
>> +                       "andestech,n15"
>> +                       "andestech,d15"
>> +                       "andestech,n10"
>> +                       "andestech,d10"
>
> SMP supported for any of these?

We don't support SMP now.

>> +
>> +    - device_type
>> +               Usage: required
>> +               Value type: <string>
>> +               Definition: must be "cpu"
>> +
>> +* Examples
>> +
>> +/ {
>> +       cpus {
>> +               cpu@0 {
>
> Needs a reg property or drop the unit address.

Thanks.
I will fix it in the next version patch.

>> +                       device_type = "cpu";
>> +                       compatible = "andestech,n13", "andestech,n15";
>
> n13 is a superset of n15?

No, they are independent ones.

Re: [PATCH 30/31] dt-bindings: nds32 CPU Bindings

[Rob Herring]

On Thu, Nov 9, 2017 at 3:39 AM, Greentime Hu <green.hu-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> wrote:
> 2017-11-08 21:18 GMT+08:00 Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>:
>> Please Cc the DT list on bindings.
>
> Sorry. I am not sure what you mean.
> Do you mean add devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org to cc list?

Yes. Use get_maintainers.pl as a guide.

>> On Tue, Nov 7, 2017 at 11:55 PM, Greentime Hu <green.hu-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> wrote:
>>> From: Greentime Hu <greentime-MUIXKm3Oiri1Z/+hSey0Gg@public.gmane.org>
>>

>>> +                       device_type = "cpu";
>>> +                       compatible = "andestech,n13", "andestech,n15";
>>
>> n13 is a superset of n15?
>
> No, they are independent ones.

Then having both is not valid. The strings should be in order of best
match to worst match where worst match is typically either older
implementations of IP blocks or generic'ish strings such as "ns16550"
for a UART.

Rob
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Re: [PATCH 30/31] dt-bindings: nds32 CPU Bindings

[Greentime Hu]

2017-11-09 21:57 GMT+08:00 Rob Herring <robh@kernel.org>:
> On Thu, Nov 9, 2017 at 3:39 AM, Greentime Hu <green.hu@gmail.com> wrote:
>> 2017-11-08 21:18 GMT+08:00 Rob Herring <robh+dt@kernel.org>:
>>> Please Cc the DT list on bindings.
>>
>> Sorry. I am not sure what you mean.
>> Do you mean add devicetree@vger.kernel.org to cc list?
>
> Yes. Use get_maintainers.pl as a guide.

Roger that! Thanks!

>>> On Tue, Nov 7, 2017 at 11:55 PM, Greentime Hu <green.hu@gmail.com> wrote:
>>>> From: Greentime Hu <greentime@andestech.com>
>>>
>
>>>> +                       device_type = "cpu";
>>>> +                       compatible = "andestech,n13", "andestech,n15";
>>>
>>> n13 is a superset of n15?
>>
>> No, they are independent ones.
>
> Then having both is not valid. The strings should be in order of best
> match to worst match where worst match is typically either older
> implementations of IP blocks or generic'ish strings such as "ns16550"
> for a UART.

Thanks.
I would like to explain it more clearly.
They are independent ones in implementations.
They are implemented based on the same nds32 ISA and architecture spec
with different configurations
like cache size, page size, cache type(VIPT/PIPT), pipeline stages...
Most of them are compatible.
They use the same toolchain to build vmlinux which can run on
different nds32 cores.

Re: [PATCH 30/31] dt-bindings: nds32 CPU Bindings

[Arnd Bergmann]

On Fri, Nov 10, 2017 at 7:22 AM, Greentime Hu <green.hu@gmail.com> wrote:
> 2017-11-09 21:57 GMT+08:00 Rob Herring <robh@kernel.org>:
>> On Thu, Nov 9, 2017 at 3:39 AM, Greentime Hu <green.hu@gmail.com> wrote:
>>> 2017-11-08 21:18 GMT+08:00 Rob Herring <robh+dt@kernel.org>:
>>>> Please Cc the DT list on bindings.
>>>
>>> Sorry. I am not sure what you mean.
>>> Do you mean add devicetree@vger.kernel.org to cc list?
>>
>> Yes. Use get_maintainers.pl as a guide.
>
> Roger that! Thanks!
>
>>>> On Tue, Nov 7, 2017 at 11:55 PM, Greentime Hu <green.hu@gmail.com> wrote:
>>>>> From: Greentime Hu <greentime@andestech.com>
>>>>
>>
>>>>> +                       device_type = "cpu";
>>>>> +                       compatible = "andestech,n13", "andestech,n15";
>>>>
>>>> n13 is a superset of n15?
>>>
>>> No, they are independent ones.
>>
>> Then having both is not valid. The strings should be in order of best
>> match to worst match where worst match is typically either older
>> implementations of IP blocks or generic'ish strings such as "ns16550"
>> for a UART.
>
> Thanks.
> I would like to explain it more clearly.
> They are independent ones in implementations.
> They are implemented based on the same nds32 ISA and architecture spec
> with different configurations
> like cache size, page size, cache type(VIPT/PIPT), pipeline stages...
> Most of them are compatible.
> They use the same toolchain to build vmlinux which can run on
> different nds32 cores.

Du you have a name for the ISA spec that distinguishes it from other nds32
versions that are incompatible? If you do, this could be written like

compatible = "andestech,n13", "andestech,nds32v3.0";

to signify that a an 'n13' core implements the 'v3.0' ISA (will it
whatever you call the ISA in reality).

       Arnd

Re: [PATCH 30/31] dt-bindings: nds32 CPU Bindings

[Greentime Hu]

>>> Then having both is not valid. The strings should be in order of best
>>> match to worst match where worst match is typically either older
>>> implementations of IP blocks or generic'ish strings such as "ns16550"
>>> for a UART.
>>
>> Thanks.
>> I would like to explain it more clearly.
>> They are independent ones in implementations.
>> They are implemented based on the same nds32 ISA and architecture spec
>> with different configurations
>> like cache size, page size, cache type(VIPT/PIPT), pipeline stages...
>> Most of them are compatible.
>> They use the same toolchain to build vmlinux which can run on
>> different nds32 cores.
>
> Du you have a name for the ISA spec that distinguishes it from other nds32
> versions that are incompatible? If you do, this could be written like
>
> compatible = "andestech,n13", "andestech,nds32v3.0";
>
> to signify that a an 'n13' core implements the 'v3.0' ISA (will it
> whatever you call the ISA in reality).
>

Thanks. I got you.
I will use a proper name(maybe 'nds32v3') of ISA in this compatible
string in the next version patch.
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Re: [PATCH 27/31] dt-bindings: interrupt-controller: Andestech Internal Vector Interrupt Controller

[Rob Herring]

+DT list

On Tue, Nov 7, 2017 at 11:55 PM, Greentime Hu <green.hu@gmail.com> wrote:
> From: Greentime Hu <greentime@andestech.com>

Commit msg needed.

> Signed-off-by: Rick Chen <rick@andestech.com>
> Signed-off-by: Greentime Hu <greentime@andestech.com>
> ---
>  .../interrupt-controller/andestech,ativic32.txt    |   27 ++++++++++++++++++++
>  1 file changed, 27 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/interrupt-controller/andestech,ativic32.txt
>
> diff --git a/Documentation/devicetree/bindings/interrupt-controller/andestech,ativic32.txt b/Documentation/devicetree/bindings/interrupt-controller/andestech,ativic32.txt
> new file mode 100644
> index 0000000..6bac908
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/interrupt-controller/andestech,ativic32.txt
> @@ -0,0 +1,27 @@
> +* Andestech Internal Vector Interrupt Controller
> +
> +The Internal Vector Interrupt Controller (IVIC) is a basic interrupt controller
> +suitable for a simpler SoC platform not requiring a more sophisticated and
> +bigger External Vector Interrupt Controller.
> +
> +
> +Main node required properties:
> +
> +- compatible : should at least contain  "andestech,ativic32".
> +- interrupt-parent: Empty for the interrupt controller itself

Drop this.

> +- interrupt-controller : Identifies the node as an interrupt controller
> +- #interrupt-cells: The number of cells to define the interrupts. Should be 2.
> +       The first cell is the IRQ number
> +       The second cell is used to specify mode:
> +               1 = low-to-high edge triggered
> +               2 = high-to-low edge triggered
> +               4 = active high level-sensitive
> +               8 = active low level-sensitive

Just state 2 cells and refer to interrupt-controller/interrupts.txt.

> +               Default for internal sources should be set to 4 (active high).
> +
> +Examples:
> +       intc: interrupt-controller {
> +               compatible = "andestech,ativic32";
> +               #interrupt-cells = <2>;
> +               interrupt-controller;
> +       };
> --
> 1.7.9.5
>

Re: [PATCH 27/31] dt-bindings: interrupt-controller: Andestech Internal Vector Interrupt Controller

[Greentime Hu]

2017-11-08 21:25 GMT+08:00 Rob Herring <robh+dt@kernel.org>:
> +DT list
>
> On Tue, Nov 7, 2017 at 11:55 PM, Greentime Hu <green.hu@gmail.com> wrote:
>> From: Greentime Hu <greentime@andestech.com>
>
> Commit msg needed.

Thanks.
I will add commit msg in the next version patch.

>> Signed-off-by: Rick Chen <rick@andestech.com>
>> Signed-off-by: Greentime Hu <greentime@andestech.com>
>> ---
>>  .../interrupt-controller/andestech,ativic32.txt    |   27 ++++++++++++++++++++
>>  1 file changed, 27 insertions(+)
>>  create mode 100644 Documentation/devicetree/bindings/interrupt-controller/andestech,ativic32.txt
>>
>> diff --git a/Documentation/devicetree/bindings/interrupt-controller/andestech,ativic32.txt b/Documentation/devicetree/bindings/interrupt-controller/andestech,ativic32.txt
>> new file mode 100644
>> index 0000000..6bac908
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/interrupt-controller/andestech,ativic32.txt
>> @@ -0,0 +1,27 @@
>> +* Andestech Internal Vector Interrupt Controller
>> +
>> +The Internal Vector Interrupt Controller (IVIC) is a basic interrupt controller
>> +suitable for a simpler SoC platform not requiring a more sophisticated and
>> +bigger External Vector Interrupt Controller.
>> +
>> +
>> +Main node required properties:
>> +
>> +- compatible : should at least contain  "andestech,ativic32".
>> +- interrupt-parent: Empty for the interrupt controller itself
>
> Drop this.

Thanks.
I will fix it in the next version patch.

>> +- interrupt-controller : Identifies the node as an interrupt controller
>> +- #interrupt-cells: The number of cells to define the interrupts. Should be 2.
>> +       The first cell is the IRQ number
>> +       The second cell is used to specify mode:
>> +               1 = low-to-high edge triggered
>> +               2 = high-to-low edge triggered
>> +               4 = active high level-sensitive
>> +               8 = active low level-sensitive
>
> Just state 2 cells and refer to interrupt-controller/interrupts.txt.

Thanks.
I will fix it in the next version patch.

>> +               Default for internal sources should be set to 4 (active high).
>> +
>> +Examples:
>> +       intc: interrupt-controller {
>> +               compatible = "andestech,ativic32";
>> +               #interrupt-cells = <2>;
>> +               interrupt-controller;
>> +       };
>> --
>> 1.7.9.5
>>