From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
To: ingrassia@epigenesys.com
Cc: mark.rutland@arm.com, devicetree@vger.kernel.org,
ccaione@baylibre.com, khilman@baylibre.com, robh+dt@kernel.org,
linux-amlogic@lists.infradead.org,
linux-arm-kernel@lists.infradead.org, jbrunet@baylibre.com
Subject: Re: [PATCH 0/2] meson: Fix IRQ trigger type
Date: Fri, 7 Dec 2018 22:56:43 +0100 [thread overview]
Message-ID: <CAFBinCD8uwm-MJ7gCSVRrjZ3ksahPE8oRrcw+TieaWes-Kbr=w@mail.gmail.com> (raw)
In-Reply-To: <20181207182845.GA3779@ingrassia.epigenesys.com>
Hi Emiliano,
On Fri, Dec 7, 2018 at 7:28 PM Emiliano Ingrassia
<ingrassia@epigenesys.com> wrote:
[...]
> > All your test seems in show it the fact the Amlogic SoC usually prioritize the
> > TX traffic over RX, which is something we've known about for a while.
> >
>
> Is that normal and/or acceptable?
the public S805 datasheet mentions in the "Ethernet MAC" features
section (22.2) on page 120:
"RX FIFO 4KB, TX FIFO 2KB"
this suggests that
I did some tests using some Armbian 3.10 kernel on my Odroid-C1:
root@odroidc1:~# iperf3 -c 192.168.1.100
Connecting to host 192.168.1.100, port 5201
[ 4] local 192.168.1.163 port 44297 connected to 192.168.1.100 port 5201
[ ID] Interval Transfer Bandwidth Retr Cwnd
[ 4] 0.00-1.00 sec 49.9 MBytes 419 Mbits/sec 0 809 KBytes
[ 4] 1.00-2.00 sec 48.7 MBytes 408 Mbits/sec 0 809 KBytes
[ 4] 2.00-3.00 sec 48.4 MBytes 407 Mbits/sec 0 809 KBytes
[ 4] 3.00-4.00 sec 48.9 MBytes 409 Mbits/sec 0 809 KBytes
[ 4] 4.00-5.00 sec 48.2 MBytes 406 Mbits/sec 0 809 KBytes
[ 4] 5.00-6.00 sec 48.8 MBytes 409 Mbits/sec 0 809 KBytes
[ 4] 6.00-7.00 sec 48.7 MBytes 408 Mbits/sec 0 809 KBytes
[ 4] 7.00-8.00 sec 48.0 MBytes 404 Mbits/sec 0 809 KBytes
[ 4] 8.00-9.00 sec 48.1 MBytes 403 Mbits/sec 0 809 KBytes
[ 4] 9.00-10.00 sec 48.1 MBytes 404 Mbits/sec 0 809 KBytes
- - - - - - - - - - - - - - - - - - - - - - - - -
[ ID] Interval Transfer Bandwidth Retr
[ 4] 0.00-10.00 sec 486 MBytes 408 Mbits/sec 0 sender
[ 4] 0.00-10.00 sec 485 MBytes 407 Mbits/sec receiver
iperf Done.
root@odroidc1:~# iperf3 -c 192.168.1.100 -R
Connecting to host 192.168.1.100, port 5201
Reverse mode, remote host 192.168.1.100 is sending
[ 4] local 192.168.1.163 port 44301 connected to 192.168.1.100 port 5201
[ ID] Interval Transfer Bandwidth
[ 4] 0.00-1.00 sec 87.5 MBytes 734 Mbits/sec
[ 4] 1.00-2.00 sec 89.2 MBytes 748 Mbits/sec
[ 4] 2.00-3.00 sec 89.0 MBytes 747 Mbits/sec
[ 4] 3.00-4.00 sec 88.9 MBytes 746 Mbits/sec
[ 4] 4.00-5.00 sec 89.2 MBytes 748 Mbits/sec
[ 4] 5.00-6.00 sec 89.0 MBytes 747 Mbits/sec
[ 4] 6.00-7.00 sec 88.5 MBytes 742 Mbits/sec
[ 4] 7.00-8.00 sec 88.5 MBytes 742 Mbits/sec
[ 4] 8.00-9.00 sec 88.5 MBytes 742 Mbits/sec
[ 4] 9.00-10.00 sec 88.2 MBytes 740 Mbits/sec
- - - - - - - - - - - - - - - - - - - - - - - - -
[ ID] Interval Transfer Bandwidth Retr
[ 4] 0.00-10.00 sec 889 MBytes 745 Mbits/sec 0 sender
[ 4] 0.00-10.00 sec 887 MBytes 744 Mbits/sec receiver
iperf Done.
root@odroidc1:~#
[...]
> Furthermore, as Martin reported in one of the previous mail,
> even Amlogic's buildroot kernel uses an edge rising IRQ type
> for the Meson8b MAC. Other evidence that is not so clear
> the need for the first patch on 32 bit Meson SoC.
please note that the dwc2 USB controllers are also using
IRQ_TYPE_EDGE_RISING in Amlogic's 3.10 kernel.
mainline on the other hand uses IRQ_TYPE_LEVEL_HIGH after your commit
291f45dd6da5fa "ARM: dts: meson: fixing USB support on Meson6, Meson8
and Meson8b"
what I want to say is: in some cases we need to use different settings
than the 3.10 kernel!
Regards
Martin
next prev parent reply other threads:[~2018-12-07 21:56 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-12-04 16:04 [PATCH 0/2] meson: Fix IRQ trigger type Carlo Caione
2018-12-04 16:04 ` [PATCH 1/2] arm64: dts: meson: Fix IRQ trigger type for macirq Carlo Caione
2018-12-04 19:52 ` Neil Armstrong
2018-12-05 1:12 ` Kevin Hilman
2018-12-04 16:04 ` [PATCH 2/2] arm64: dts: meson: Remove eee-broken-1000t quirk Carlo Caione
2018-12-04 19:59 ` [PATCH 0/2] meson: Fix IRQ trigger type Martin Blumenstingl
2018-12-04 20:51 ` Carlo Caione
2018-12-06 12:43 ` Emiliano Ingrassia
2018-12-06 13:17 ` Carlo Caione
2018-12-06 15:52 ` Emiliano Ingrassia
2018-12-06 18:51 ` Emiliano Ingrassia
2018-12-07 10:49 ` Jerome Brunet
2018-12-07 11:03 ` Carlo Caione
2018-12-07 18:33 ` Emiliano Ingrassia
2018-12-07 18:28 ` Emiliano Ingrassia
2018-12-07 19:58 ` Jerome Brunet
2018-12-07 21:56 ` Martin Blumenstingl [this message]
2018-12-06 13:26 ` Jerome Brunet
2018-12-06 16:24 ` Emiliano Ingrassia
2018-12-06 13:26 ` Jerome Brunet
2018-12-07 4:17 ` Kevin Hilman
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