From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 586B5C7EE24 for ; Tue, 30 May 2023 23:12:56 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233774AbjE3XMz (ORCPT ); Tue, 30 May 2023 19:12:55 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43576 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233767AbjE3XMy (ORCPT ); Tue, 30 May 2023 19:12:54 -0400 Received: from mail-yw1-x112a.google.com (mail-yw1-x112a.google.com [IPv6:2607:f8b0:4864:20::112a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1D92E115 for ; Tue, 30 May 2023 16:12:51 -0700 (PDT) Received: by mail-yw1-x112a.google.com with SMTP id 00721157ae682-568af2f6454so18298197b3.1 for ; Tue, 30 May 2023 16:12:50 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=0x0f.com; s=google; t=1685488370; x=1688080370; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:from:to:cc:subject:date:message-id:reply-to; bh=3Sk+qWXcGW0GUpvgiyhHnfROShVA7dmyiswjVrrXG8U=; b=B05Pid/LKtGjtIJfO8foDbZeVsvkHTrT2f2SBzRS4zWcf1S+2cZB96uHjjgtpX3PDH qho7GHfBesnm2u7U0N+Pk1Gk76IAp3zZyfnLIySrQwwN0cROIbNHN9mXCzcAdi2pnnPp FcuHHT0sojhyqk+b8IONXCFLSyZd2H5gxGVb0= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1685488370; x=1688080370; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=3Sk+qWXcGW0GUpvgiyhHnfROShVA7dmyiswjVrrXG8U=; b=JXYE8/iO0jf/rRExNezPOjRDywOfTwKJdlWyq0aJNBaXyWx2b+TySh4Xkoy5vA/lY4 cHmU4iCE5mB2IUUIZyQDCZV9gU+yuvyHGOhVKqRMCOFkL8DJ7kBRB2T05gWfDmb6iJqE uWwHW2PldEWDcv3BLbqRj/C4+LUHaqnUr3gh5h/tggtEbeQ4gFSg/iOVxMhOEOgPLfj7 yvqHTzVDO6QPbLeTKOuY5ZVfV0tWm/JpTP0Wsqp6HNvWovYsDbJoBfdiB4Fju6oQyPgv RYPbp9rVkLY3fyQm9Ob3zoulWmGNWiVv5l8YVGsd/TyZeuojmSQftGGzBugFP20EU3HI YJ8w== X-Gm-Message-State: AC+VfDy8xBqmZcIvCd4xVstmFlkVDaJmWhxMxh53ypLCUGeVi4tKmvZQ YzcamgJcs41cyMfTmDe7/68s9YbdMLUrWWECDXsGWQ== X-Google-Smtp-Source: ACHHUZ7IWuuIkbJHtCvA06a4W4OlLV+CuNxuRKBq081h6V6711sEGkR9kqXrFauvtb28sape68GwRuOip1snlQlaww8= X-Received: by 2002:a0d:d752:0:b0:565:6634:d106 with SMTP id z79-20020a0dd752000000b005656634d106mr4492319ywd.2.1685488370082; Tue, 30 May 2023 16:12:50 -0700 (PDT) MIME-Version: 1.0 References: <20230517144144.365631-1-romain.perier@gmail.com> <20230517144144.365631-3-romain.perier@gmail.com> <669d7b79-71a6-e1f9-8d7a-71c4b64de28d@kernel.org> In-Reply-To: From: Daniel Palmer Date: Wed, 31 May 2023 08:12:39 +0900 Message-ID: Subject: Re: [PATCH 2/3] dt-bindings: rtc: Add Mstar SSD20xD RTC devicetree bindings documentation To: Krzysztof Kozlowski Cc: Romain Perier , Alessandro Zummo , Alexandre Belloni , Rob Herring , linux-rtc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Hi Krzysztof, On Tue, 30 May 2023 at 17:01, Krzysztof Kozlowski wrote: > > This is > > exactly the case for rtc-msc313e and it was not an issue. > > So that was my question - can it be anything else? There is literally no > description of the hardware... Neither in commit msg nor in description: > field in bindings. This RTC block is a block inside of the SSD201/SSD202D (they are the same die with different memory attached) and is only found there. The documentation we have for this is literally one page in a PDF that says "RTC registers". It could be an IP block licensed from somewhere and technically have a better name but right now all we know is this RTC block is the one in that chip and that chip is the first known instance of it. Say we manage to get the ethernet mainlined at some point: That's a lot easier as we know already it's a hacked up version of the cadence macb so the compatible can be "macb something". > >> What about interrupt line? > > > > There is currently no interrupt right now, we have not yet the irqchip > > code for handling the alarm irq of this rtc block. > > So you are going to change the hardware and add the interrupt line? We > do not talk about drivers, but hardware. Whether your driver handles it > or not, matters less. > > Describe the hardware, not the current implementation of one driver. We don't really know how the interrupt is wired up in the hardware properly yet. Cheers, Daniel