From mboxrd@z Thu Jan 1 00:00:00 1970 From: Chen-Yu Tsai Subject: Re: [PATCH v10 0/2] Initial Allwinner V3s CSI Support Date: Wed, 20 Jun 2018 12:45:03 +0800 Message-ID: References: <20180517090224.u3ygdzjr77im2mmp@flea> <20180529095757.qkz7jyuxza7movbc@flea.home> <20180530091934.tbd6xbyr5s3ipn3v@paasikivi.fi.intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="UTF-8" Return-path: In-Reply-To: <20180530091934.tbd6xbyr5s3ipn3v@paasikivi.fi.intel.com> Sender: linux-kernel-owner@vger.kernel.org To: Sakari Ailus Cc: Maxime Ripard , Yong Deng , Hans Verkuil , Mauro Carvalho Chehab , Rob Herring , Mark Rutland , "David S. Miller" , Greg Kroah-Hartman , Andrew Morton , Linus Walleij , Randy Dunlap , Arnd Bergmann , Stanimir Varbanov , Philipp Zabel , Ramesh Shanmugasundaram , Jacob Chen , Yannick Fertre , Thierry Reding , Benjam List-Id: devicetree@vger.kernel.org On Wed, May 30, 2018 at 5:19 PM, Sakari Ailus wrote: > On Tue, May 29, 2018 at 11:57:57AM +0200, Maxime Ripard wrote: >> On Thu, May 17, 2018 at 11:02:24AM +0200, Maxime Ripard wrote: >> > On Fri, May 04, 2018 at 02:44:08PM +0800, Yong Deng wrote: >> > > This patchset add initial support for Allwinner V3s CSI. >> > > >> > > Allwinner V3s SoC features two CSI module. CSI0 is used for MIPI CSI-2 >> > > interface and CSI1 is used for parallel interface. This is not >> > > documented in datasheet but by test and guess. >> > > >> > > This patchset implement a v4l2 framework driver and add a binding >> > > documentation for it. >> > > >> > > Currently, the driver only support the parallel interface. And has been >> > > tested with a BT1120 signal which generating from FPGA. The following >> > > fetures are not support with this patchset: >> > > - ISP >> > > - MIPI-CSI2 >> > > - Master clock for camera sensor >> > > - Power regulator for the front end IC >> > >> > I tested it on my H3 with a parallel camera, and it still works. Thanks! >> > >> > Hans, Sakari, any chance this might land in 4.18? >> >> Ping? > > I'll try to look into this soonish but it seems to be too late for 4.18. > Sorry about that. Can we get this into 4.19? Thanks ChenYu