Re: [PATCH v2 2/8] dt-bindings: display: add verisilicon,dc

[Christian Gmeiner <christian.gmeiner@gmail.com>]

Am Mo., 6. Okt. 2025 um 18:34 Uhr schrieb Icenowy Zheng <uwu@icenowy.me>:
>
> 在 2025-09-25星期四的 13:57 +0800，Icenowy Zheng写道：
> > 在 2025-09-24星期三的 20:15 +0200，Christian Gmeiner写道：
> > > > > > > Verisilicon has a series of display controllers prefixed
> > > > > > > with
> > > > > > > DC
> > > > > > > and
> > > > > > > with self-identification facility like their GC series
> > > > > > > GPUs.
> > > > > > >
> > > > > > > Add a device tree binding for it.
> > > > > > >
> > > > > > > Depends on the specific DC model, it can have either one or
> > > > > > > two
> > > > > > > display
> > > > > > > outputs, and each display output could be set to DPI signal
> > > > > > > or
> > > > > > > "DP"
> > > > > > > signal (which seems to be some plain parallel bus to HDMI
> > > > > > > controllers).
> > > > > > >
> > > > > > > Signed-off-by: Icenowy Zheng <uwu@icenowy.me>
> > > > > > > ---
> > > > > > > Changes in v2:
> > > > > > > - Fixed misspelt "versilicon" in title.
> > > > > > > - Moved minItems in clock properties to be earlier than
> > > > > > > items.
> > > > > > > - Re-aligned multi-line clocks and resets in example.
> > > > > > >
> > > > > > >  .../bindings/display/verisilicon,dc.yaml      | 127
> > > > > > > ++++++++++++++++++
> > > > > > >  1 file changed, 127 insertions(+)
> > > > > > >  create mode 100644
> > > > > > > Documentation/devicetree/bindings/display/verisilicon,dc.ya
> > > > > > > ml
> > > > > > >
> > > > > > > diff --git
> > > > > > > a/Documentation/devicetree/bindings/display/verisilicon,dc.
> > > > > > > ya
> > > > > > > ml
> > > > > > > b/Documentation/devicetree/bindings/display/verisilicon,dc.
> > > > > > > ya
> > > > > > > ml
> > > > > > > new file mode 100644
> > > > > > > index 0000000000000..07fedc4c7cc13
> > > > > > > --- /dev/null
> > > > > > > +++
> > > > > > > b/Documentation/devicetree/bindings/display/verisilicon,dc.
> > > > > > > ya
> > > > > > > ml
> > > > > > > @@ -0,0 +1,127 @@
> > > > > > > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> > > > > > > +%YAML 1.2
> > > > > > > +---
> > > > > > > +$id:
> > > > > > > http://devicetree.org/schemas/display/verisilicon,dc.yaml#
> > > > > > > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > > > > > > +
> > > > > > > +title: Verisilicon DC-series display controllers
> > > > > > > +
> > > > > > > +maintainers:
> > > > > > > +  - Icenowy Zheng <uwu@icenowy.me>
> > > > > > > +
> > > > > > > +properties:
> > > > > > > +  $nodename:
> > > > > > > +    pattern: "^display@[0-9a-f]+$"
> > > > > > > +
> > > > > > > +  compatible:
> > > > > > > +    const: verisilicon,dc
> > > > > >
> > > > > > This needs an SoC specific compatible. Generally licensed IP
> > > > > > compatibles
> > > > > > are useless because the specs aren't public and there's
> > > > > > always
> > > > > > integration quirks.
> > > > >
> > > > > This mimics the GPU IPs by the same vendor, see
> > > > > gpu/vivante,gc.yaml ,
> > > > > which contain the exact same set of identification registers
> > > > > (including
> > > > > a "customer id" one that can differienate the same configured
> > > > > IP
> > > > > on
> > > > > StarFive JH7110 and T-Head TH1520).
> > > > >
> > > > > If we can get vivante,gc to work w/o SoC specific compatible,
> > > > > then we
> > > > > should be able to get verisilicon,dc to work too.
> > > >
> > > > Well maybe I should add etnaviv people to the recipient list, to
> > > > allow
> > > > them to tell us the magic behind vivante,gc .
> > > >
> > >
> > > Vivante GPUs are special because they contain registers that allow
> > > them to
> > > be fully identified - see etnaviv_hw_identify(..).
> > >
> > > We can read out the following information:
> > >  - model
> > >  - revision
> > >  - product_id
> > >  - customer_id
> > >  - eco_id
> >
> > Well Verisilicon DCs (sometimes also called Vivante DCs because
> > Vivante
> > is now part of Verisilicon) except DCNano have the same set of ID
> > registers (In fact the registers before 0x1500 seem to have mostly
> > the
> > same meaning with GPUs, see [1], here the registers are even named
> > GC{,REG}_xxx), so it's why I assume "verisilicon,dc" will work here.
> >
> > An example of identification registers readout on TH1510 is shown
> > below: (the register names are from etnaviv state_hi.xml)
> > ```
> > root@lpi4a66 [ ~ ] # busybox devmem 0xffef600020 # MODEL
> > 0x00008200
> > root@lpi4a66 [ ~ ] # busybox devmem 0xffef600024 # REV
> > 0x00005720
> > root@lpi4a66 [ ~ ] # busybox devmem 0xffef600028 # DATE
> > 0x20210201
> > root@lpi4a66 [ ~ ] # busybox devmem 0xffef60002c # TIME
> > 0x11133000
> > root@lpi4a66 [ ~ ] # busybox devmem 0xffef600030 # CUSTOMER_ID
> > 0x0000030A
> > root@lpi4a66 [ ~ ] # busybox devmem 0xffef6000a8 # PRODUCT_ID
> > 0x02082000
> > root@lpi4a66 [ ~ ] # busybox devmem 0xffef6000e8 # ECO_ID
> > 0x00000000
> > ```
> >
>
> Rob,
>
> Is this an acceptable answer of not having a vendor-specific
> compatible?
>
> If it isn't, I will add vendor-specific compatible strings to the next
> revision of the binding, and maybe also try to add them for vivante,gc.
>

There is no need to touch anything for vivante,gc.

-- 
greets
--
Christian Gmeiner, MSc

https://christian-gmeiner.info/privacypolicy