From: Bhupesh Sharma <bhupesh.sharma@linaro.org>
To: Stephan Gerhold <stephan@gerhold.net>
Cc: linux-arm-msm@vger.kernel.org, agross@kernel.org,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
andersson@kernel.org, bhupesh.linux@gmail.com,
krzysztof.kozlowski@linaro.org, robh+dt@kernel.org,
konrad.dybcio@linaro.org, vladimir.zapolskiy@linaro.org,
rfoss@kernel.org
Subject: Re: [PATCH 2/5] arm64: dts: qcom: sm6115: Add Crypto Engine support
Date: Wed, 22 Mar 2023 16:11:32 +0530 [thread overview]
Message-ID: <CAH=2NtyJHGcfhWMdUmJ=38kC-CjP7jznQEU7jX+983hdEJs4-A@mail.gmail.com> (raw)
In-Reply-To: <ZBoVzFTr8LBWsmrX@gerhold.net>
On Wed, 22 Mar 2023 at 02:09, Stephan Gerhold <stephan@gerhold.net> wrote:
>
> On Wed, Mar 22, 2023 at 12:31:15AM +0530, Bhupesh Sharma wrote:
> > Add crypto engine (CE) and CE BAM related nodes and definitions to
> > 'sm6115.dtsi'.
> >
> > Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
> > ---
> > arch/arm64/boot/dts/qcom/sm6115.dtsi | 26 ++++++++++++++++++++++++++
> > 1 file changed, 26 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/qcom/sm6115.dtsi b/arch/arm64/boot/dts/qcom/sm6115.dtsi
> > index c56738633431..b2d2cdde41fa 100644
> > --- a/arch/arm64/boot/dts/qcom/sm6115.dtsi
> > +++ b/arch/arm64/boot/dts/qcom/sm6115.dtsi
> > @@ -664,6 +664,32 @@ usb_1_hsphy: phy@1613000 {
> > status = "disabled";
> > };
> >
> > + cryptobam: dma-controller@1b04000 {
> > + compatible = "qcom,bam-v1.7.4", "qcom,bam-v1.7.0";
> > + reg = <0x0 0x01b04000 0x0 0x24000>;
> > + interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>;
> > + #dma-cells = <1>;
> > + qcom,ee = <0>;
> > + qcom,controlled-remotely;
> > + num-channels = <8>;
> > + qcom,num-ees = <2>;
> > + iommus = <&apps_smmu 0x84 0x11>,
> > + <&apps_smmu 0x86 0x11>,
> > + <&apps_smmu 0x94 0x11>,
> > + <&apps_smmu 0x96 0x11>;
> > + };
> > +
> > + crypto: crypto@1b3a000 {
> > + compatible = "qcom,sm6115-qce", "qcom,sm8150-qce", "qcom,qce";
> > + reg = <0x0 0x01b3a000 0x0 0x6000>;
> > + dmas = <&cryptobam 6>, <&cryptobam 7>;
> > + dma-names = "rx", "tx";
> > + iommus = <&apps_smmu 0x84 0x11>,
> > + <&apps_smmu 0x86 0x11>,
> > + <&apps_smmu 0x94 0x11>,
> > + <&apps_smmu 0x96 0x11>;
>
> If you apply the 0x11 mask to the stream ID then the last two items here
> are identical to the first two (0x94 & ~0x11 = 0x84). Why are they
> needed? They look redundant to me.
Thanks, I will check them out and fix them in v2.
Regards.
next prev parent reply other threads:[~2023-03-22 10:41 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-03-21 19:01 [PATCH 0/5] arm64: dts: qcom: Enable Crypto Engine for a few Qualcomm SoCs Bhupesh Sharma
2023-03-21 19:01 ` [PATCH 1/5] arm64: dts: qcom: sdm845: Fix the BAM DMA engine compatible string Bhupesh Sharma
2023-03-21 19:29 ` Konrad Dybcio
2023-03-21 19:01 ` [PATCH 2/5] arm64: dts: qcom: sm6115: Add Crypto Engine support Bhupesh Sharma
2023-03-21 20:38 ` Stephan Gerhold
2023-03-22 10:41 ` Bhupesh Sharma [this message]
2023-03-21 19:01 ` [PATCH 3/5] arm64: dts: qcom: sm8150: " Bhupesh Sharma
2023-03-21 19:01 ` [PATCH 4/5] arm64: dts: qcom: sm8250: " Bhupesh Sharma
2023-03-21 19:01 ` [PATCH 5/5] arm64: dts: qcom: sm8350: " Bhupesh Sharma
2023-03-21 19:27 ` [PATCH 0/5] arm64: dts: qcom: Enable Crypto Engine for a few Qualcomm SoCs Konrad Dybcio
2023-03-22 8:33 ` Bhupesh Sharma
2023-03-22 8:34 ` Konrad Dybcio
2023-03-22 8:35 ` Krzysztof Kozlowski
2023-03-22 14:45 ` (subset) " Bjorn Andersson
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