From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id CBD65C7EE26 for ; Fri, 19 May 2023 10:49:38 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230491AbjESKth (ORCPT ); Fri, 19 May 2023 06:49:37 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37130 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231341AbjESKtd (ORCPT ); Fri, 19 May 2023 06:49:33 -0400 Received: from mail-wm1-x332.google.com (mail-wm1-x332.google.com [IPv6:2a00:1450:4864:20::332]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id EF252E5D for ; Fri, 19 May 2023 03:49:29 -0700 (PDT) Received: by mail-wm1-x332.google.com with SMTP id 5b1f17b1804b1-3f4c6c4b425so19558125e9.2 for ; Fri, 19 May 2023 03:49:29 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1684493368; x=1687085368; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:from:to:cc:subject:date:message-id:reply-to; bh=frnZejZtlcBkz8MuJjU1QiMoUPiymUDXTaMRj7RUn0c=; b=QnzHVl2fZTJYZmbDka04syMJsNo3kQ29ci8v6N2h64mpn2gXEp1XlGkMApvPw419Bn QUUEo1MRtBqcdFled/xc0MNK1w+dyz633PBl99OgaI5u55d+RKniUHOry/Dg3hHtyFnR t9R1TksO6+GQTqpKYOnreUH9k/2ijcygNgnVTADD8JSmcWEt+It0rc8ETpj4Kb+oOi1Y nnElQ0k4b7UzpciXD/vI6k5keHbbWC6uEnz6LIayzZQuxxt0rXIz5IqGyh1Vf0ot3tT/ c+a9MYJAsOzWKdzYbEy6YnRQpWNHMqXyQRajtpSSp6OZWRQdz/RV18GPZ/pE/T47xy2Z S2ng== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1684493368; x=1687085368; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=frnZejZtlcBkz8MuJjU1QiMoUPiymUDXTaMRj7RUn0c=; b=JzdoH6sPocotiYMu3dOvDba49VpK4pyxGR/Y1gfejULfTdWUBdGKn3LVZ5DL1FsFaE 09UZ5kCmO3sNv2sEnjqW30IgHgDNjROkafMwGR5WWp1RTH5bVM6HMYsAs2uxV9XKcSy5 Zgv+V1YN8eAuITHSwYTV3SoCZpRj1b70tMLScswPNpJ2pMGT0+a+i+Ste69TV2rOQKNx kwE/UJSBVIR6fBD6Dh9A3lKHEwqKqNlK+maVWRjHICxsU8qRN6zMko6rCMx8qCfbbtkl p2WJaVXP3JirPXe0mEht6T7310dVpG+c/5X5M7aQY6YqiJpna12A5/aQO9eqqUOh9fWV Ufnw== X-Gm-Message-State: AC+VfDzERpcVBenWtbZQ3oNYUWBInWKRjbt0xKw1XQIWQV5/Kg6kqUyV +i+LdN8nKgh3bG1w6BRdLx56qHpcxh3xzXfh6f6YbQ== X-Google-Smtp-Source: ACHHUZ6Lxe/rWQ0fC0AGel3DnodQYHpv4BdY+wS1q90nJ9PW51oWqj5db5VaO1KDzFX0PB380dVLziguDoFu8Kxyjsg= X-Received: by 2002:a1c:7503:0:b0:3f4:fffc:cd74 with SMTP id o3-20020a1c7503000000b003f4fffccd74mr1053421wmc.16.1684493368353; Fri, 19 May 2023 03:49:28 -0700 (PDT) MIME-Version: 1.0 References: <20230405072836.1690248-1-bhupesh.sharma@linaro.org> <20230405072836.1690248-8-bhupesh.sharma@linaro.org> <8c754bc2-abb3-faaa-0ab5-2c1991dfc2a6@linaro.org> In-Reply-To: <8c754bc2-abb3-faaa-0ab5-2c1991dfc2a6@linaro.org> From: Bhupesh Sharma Date: Fri, 19 May 2023 16:19:17 +0530 Message-ID: Subject: Re: [PATCH v6 07/11] arm64: dts: qcom: sm6115: Add Crypto Engine support To: Konrad Dybcio Cc: Stephan Gerhold , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, agross@kernel.org, linux-kernel@vger.kernel.org, linux-crypto@vger.kernel.org, andersson@kernel.org, bhupesh.linux@gmail.com, krzysztof.kozlowski@linaro.org, robh+dt@kernel.org, vladimir.zapolskiy@linaro.org, rfoss@kernel.org, neil.armstrong@linaro.org, djakov@kernel.org Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On Fri, 19 May 2023 at 16:12, Konrad Dybcio wrote: > > On 19.05.2023 12:22, Bhupesh Sharma wrote: > > Hi Stephan, > > > > On Fri, 19 May 2023 at 15:40, Stephan Gerhold wrote: > >> > >> Hi Bhupesh, > >> > >> Not sure if this is the latest version of this series since it's pretty > >> old but I didn't find a new one. Just came here because you mentioned > >> RB1/RB2 [1] in my bam_dma patch and they don't have any BAM defined > >> upstream yet. > >> > >> [1]: https://lore.kernel.org/linux-arm-msm/CAH=2Ntw0BZH=RGp14mYLhX7D6jV5O5eDKRQbby=uCy85xMDU_g@mail.gmail.com/ > >> > >> On Wed, Apr 05, 2023 at 12:58:32PM +0530, Bhupesh Sharma wrote: > >>> Add crypto engine (CE) and CE BAM related nodes and definitions to > >>> 'sm6115.dtsi'. > >>> > >>> Signed-off-by: Bhupesh Sharma > >>> --- > >>> arch/arm64/boot/dts/qcom/sm6115.dtsi | 22 ++++++++++++++++++++++ > >>> 1 file changed, 22 insertions(+) > >>> > >>> diff --git a/arch/arm64/boot/dts/qcom/sm6115.dtsi b/arch/arm64/boot/dts/qcom/sm6115.dtsi > >>> index 2a51c938bbcb..ebac026b4cc7 100644 > >>> --- a/arch/arm64/boot/dts/qcom/sm6115.dtsi > >>> +++ b/arch/arm64/boot/dts/qcom/sm6115.dtsi > >>> @@ -650,6 +650,28 @@ usb_hsphy: phy@1613000 { > >>> status = "disabled"; > >>> }; > >>> > >>> + cryptobam: dma-controller@1b04000 { > >>> + compatible = "qcom,bam-v1.7.4", "qcom,bam-v1.7.0"; > >>> + reg = <0x0 0x01b04000 0x0 0x24000>; > >>> + interrupts = ; > >>> + #dma-cells = <1>; > >>> + qcom,ee = <0>; > >>> + qcom,controlled-remotely; > >>> + num-channels = <8>; > >>> + qcom,num-ees = <2>; > >>> + iommus = <&apps_smmu 0x94 0x11>, > >>> + <&apps_smmu 0x96 0x11>; > >>> + }; > >>> + > >>> + crypto: crypto@1b3a000 { > >>> + compatible = "qcom,sm6115-qce", "qcom,sm8150-qce", "qcom,qce"; > >>> + reg = <0x0 0x01b3a000 0x0 0x6000>; > >>> + dmas = <&cryptobam 6>, <&cryptobam 7>; > >>> + dma-names = "rx", "tx"; > >>> + iommus = <&apps_smmu 0x94 0x11>, > >>> + <&apps_smmu 0x96 0x11>; > >> > >> Shouldn't you have clocks = <&rpmcc RPM_SMD_CE1_CLK> here to make sure > >> the clock for the crypto engine is on? Your binding patch (PATCH 06/11) > >> says "Crypto Engine block on Qualcomm SoCs SM6115 and QCM2290 do not > >> require clocks strictly" but doesn't say why. > >> > >> Make sure you don't rely on having rpmcc keep unused clocks on > >> permanently. This is the case at the moment, but we would like to change > >> this [2]. Adding new users that rely on this broken behavior would just > >> make this effort even more complicated. > >> > >> If you also add the clock to the cryptobam then you should be able to > >> see the advantage of my bam_dma patch [3]. It allows you to drop > >> "num-channels" and "qcom,num-ees" from the cryptobam in your changes > >> above because it can then be read directly from the BAM registers. > > > > Thanks for pointing this out. Actually that's why I was using your > > patch while testing with RB1/RB2 :) > > > > Yes, so the background is that I am preparing a new version of this > > crypto enablement patchset. > > Also your assumption about the clocks being turned on by the firmware > > is true for RB1/RB2 devices, so enabling them via Linux is optional as > > per Qualcomm enggs. > This is not necessarily true. Currently it's kept always-on on > by clk_smd_rpm_handoff, but that's a hack from 10 years ago when smd > was still new. > > > > > So, I am testing the new patchset right now with 'clock' entries > > provided in the .dtsi and see if that causes any issue / improvement > > (etc.) > It won't change since it's on anyway, but that won't be a given for long. Right, so that's what I observe: RPM_SMD_CE1_CLK is always on by the time crypto _probe gets called. So, IMO let's not mix this patchset with the other fix which probably will fix the 10-year old clk_smd_rpm handoff keeping these clocks on. Probably that should be a separate changeset - requiring very thorough checks to make sure that we don't break working platforms. Thanks.