From: Chen Wang <unicornxw@gmail.com>
To: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Cc: Ben Dooks <ben.dooks@codethink.co.uk>,
aou@eecs.berkeley.edu, chao.wei@sophgo.com, conor@kernel.org,
devicetree@vger.kernel.org, guoren@kernel.org,
jszhang@kernel.org, krzysztof.kozlowski+dt@linaro.org,
linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org,
palmer@dabbelt.com, paul.walmsley@sifive.com,
robh+dt@kernel.org, xiaoguang.xing@sophgo.com,
Chen Wang <wangchen20@iscas.ac.cn>
Subject: Re: [PATCH v2 08/11] serial: 8250_dw: Add Sophgo SG2042 support
Date: Fri, 22 Sep 2023 19:39:00 +0800 [thread overview]
Message-ID: <CAHAQgRCiAvvowhv095cm5X4aDUhJSr7j92a84KJto40Cj4wd-w@mail.gmail.com> (raw)
In-Reply-To: <CAJM55Z_o7Z8HhaUjrSqjxy1cPjud9Q3GrdqjgFThToxxOCrkgw@mail.gmail.com>
Regards,
unicornx
Emil Renner Berthing <emil.renner.berthing@canonical.com> 于2023年9月22日周五 18:40写道：
>
> Ben Dooks wrote:
> > On 20/09/2023 07:40, Chen Wang wrote:
> > > From: Emil Renner Berthing <emil.renner.berthing@canonical.com>
> > >
> > > Add quirk to skip setting the input clock rate for the uarts on the
> > > Sophgo SG2042 SoC similar to the StarFive JH7100.
> >
> > I'd love an actual explanation of why this is necessary here.
>
> Makes sense. For the JH7100 the commit message is:
>
> On the StarFive JH7100 RISC-V SoC the UART core clocks can't be set to
> exactly 16 * 115200Hz and many other common bitrates. Trying this will
> only result in a higher input clock, but low enough that the UART's
> internal divisor can't come close enough to the baud rate target.
> So rather than try to set the input clock it's better to skip the
> clk_set_rate call and rely solely on the UART's internal divisor.
>
> @Chen Wang is this also true for the SG2042?
>
> /Emil
Emil & Ben,
I need to double-confirm this with sophgo engineers. Because they are
off work now, I will probably get back to you later next week.
next prev parent reply other threads:[~2023-09-22 11:39 UTC|newest]
Thread overview: 67+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-09-20 6:33 [PATCH v2 00/11] Add Milk-V Pioneer RISC-V board support Chen Wang
2023-09-20 6:34 ` [PATCH v2 01/11] riscv: Add SOPHGO SOC family Kconfig support Chen Wang
2023-09-20 7:34 ` Guo Ren
2023-09-20 8:21 ` Conor Dooley
2023-09-20 6:37 ` [PATCH v2 02/11] dt-bindings: vendor-prefixes: add milkv/sophgo Chen Wang
2023-09-20 7:38 ` Guo Ren
2023-09-20 8:22 ` Conor Dooley
2023-09-20 9:14 ` Chen Wang
2023-09-20 6:37 ` [PATCH v2 03/11] dt-bindings: riscv: add sophgo sg2042 bindings Chen Wang
2023-09-20 7:43 ` Guo Ren
2023-09-20 8:28 ` Conor Dooley
2023-09-21 10:21 ` Chen Wang
2023-09-21 12:18 ` Conor Dooley
2023-09-21 13:40 ` Chen Wang
2023-09-21 13:51 ` Chen Wang
2023-09-21 14:00 ` Conor Dooley
2023-09-22 1:48 ` Chen Wang
2023-09-20 11:55 ` Krzysztof Kozlowski
2023-09-20 12:03 ` 汪辰
2023-09-21 0:48 ` Jisheng Zhang
2023-09-20 6:38 ` [PATCH v2 04/11] dt-bindings: riscv: Add T-HEAD C920 compatibles Chen Wang
2023-09-20 7:44 ` Guo Ren
2023-09-20 8:37 ` Conor Dooley
2023-09-20 6:39 ` [PATCH v2 05/11] dt-bindings: interrupt-controller: Add SOPHGO's SG2042 PLIC Chen Wang
2023-09-20 7:45 ` Guo Ren
2023-09-20 8:57 ` Conor Dooley
2023-09-20 6:39 ` [PATCH v2 06/11] dt-bindings: timer: Add Sophgo sg2042 clint Chen Wang
2023-09-20 8:12 ` Guo Ren
2023-09-20 8:50 ` Conor Dooley
2023-09-20 11:57 ` Krzysztof Kozlowski
2023-09-20 6:39 ` [PATCH v2 07/11] dt-bindings: serial: snps-dw-apb-uart: Add Sophgo SG2042 uarts Chen Wang
2023-09-20 7:51 ` Guo Ren
2023-09-20 8:37 ` Conor Dooley
2023-09-20 6:40 ` [PATCH v2 08/11] serial: 8250_dw: Add Sophgo SG2042 support Chen Wang
2023-09-20 7:53 ` Guo Ren
2023-09-20 8:05 ` Chen Wang
2023-09-20 8:08 ` Guo Ren
2023-09-22 9:41 ` Ben Dooks
2023-09-22 10:40 ` Emil Renner Berthing
2023-09-22 11:39 ` Chen Wang [this message]
2023-09-26 7:38 ` Chen Wang
2023-09-20 6:40 ` [PATCH v2 09/11] riscv: dts: add initial SOPHGO SG2042 SoC device tree Chen Wang
2023-09-20 8:04 ` Guo Ren
2023-09-20 8:57 ` Conor Dooley
2023-09-21 9:56 ` Chen Wang
2023-09-21 10:15 ` Conor Dooley
2023-09-21 10:27 ` Chen Wang
2023-09-21 12:06 ` Conor Dooley
2023-09-20 11:32 ` Emil Renner Berthing
2023-09-20 12:09 ` 汪辰
2023-09-20 12:32 ` Emil Renner Berthing
2023-09-20 12:37 ` 汪辰
2023-09-20 15:19 ` Palmer Dabbelt
2023-09-20 15:31 ` Conor Dooley
2023-09-20 6:40 ` [PATCH v2 10/11] riscv: dts: sophgo: add Milk-V Pioneer board " Chen Wang
2023-09-20 8:05 ` Guo Ren
2023-09-20 8:16 ` Conor Dooley
2023-09-20 11:59 ` Krzysztof Kozlowski
2023-09-20 6:41 ` [PATCH v2 11/11] riscv: defconfig: enable SOPHGO SoC Chen Wang
2023-09-20 8:06 ` Guo Ren
2023-09-20 8:58 ` Conor Dooley
2023-09-20 10:01 ` [PATCH v2 00/11] Add Milk-V Pioneer RISC-V board support Conor Dooley
2023-09-22 10:24 ` Chen Wang
2023-09-22 10:50 ` Conor Dooley
2023-09-22 11:28 ` Chen Wang
2023-09-20 15:22 ` Palmer Dabbelt
2023-09-26 10:29 ` Chen Wang
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=CAHAQgRCiAvvowhv095cm5X4aDUhJSr7j92a84KJto40Cj4wd-w@mail.gmail.com \
--to=unicornxw@gmail.com \
--cc=aou@eecs.berkeley.edu \
--cc=ben.dooks@codethink.co.uk \
--cc=chao.wei@sophgo.com \
--cc=conor@kernel.org \
--cc=devicetree@vger.kernel.org \
--cc=emil.renner.berthing@canonical.com \
--cc=guoren@kernel.org \
--cc=jszhang@kernel.org \
--cc=krzysztof.kozlowski+dt@linaro.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-riscv@lists.infradead.org \
--cc=palmer@dabbelt.com \
--cc=paul.walmsley@sifive.com \
--cc=robh+dt@kernel.org \
--cc=wangchen20@iscas.ac.cn \
--cc=xiaoguang.xing@sophgo.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).