Re: [PATCH v6 10/16] reset: Add a reset controller driver for the Lantiq XWAY based SoCs

[Andy Shevchenko <andy.shevchenko-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>]

On Fri, Jun 30, 2017 at 12:39 AM, Hauke Mehrtens <hauke-5/S+JYg5SzeELgA04lAiVw@public.gmane.org> wrote:

> +static int lantiq_rcu_reset_update(struct reset_controller_dev *rcdev,
> +                                  unsigned long id, bool assert)
> +{
> +       struct lantiq_rcu_reset_priv *priv = to_lantiq_rcu_reset_priv(rcdev);
> +       unsigned int set = id & 0x1f;


> +       int ret;
> +       u32 val;
> +
> +       if (assert)
> +               val = BIT(set);
> +       else
> +               val = 0;

I would put this as

u32 val = assert ? BIT(set) : 0;
int ret;

...but it's up to you.

The rest looks fine.

> +
> +       ret = regmap_update_bits(priv->regmap, priv->reset_offset, BIT(set),
> +                                val);
> +       if (ret) {
> +               dev_err(priv->dev, "Failed to set reset bit %u\n", set);
> +               return ret;
> +       }
> +
> +
> +       ret = lantiq_rcu_reset_status_timeout(rcdev, id, assert);
> +       if (ret)
> +               dev_err(priv->dev, "Failed to %s bit %u\n",
> +                       assert ? "assert" : "deassert", set);
> +
> +       return ret;
> +}

-- 
With Best Regards,
Andy Shevchenko
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