From: Medad Young <medadyoung@gmail.com>
To: Borislav Petkov <bp@alien8.de>
Cc: rric@kernel.org, James Morse <james.morse@arm.com>,
tony.luck@intel.com, Mauro Carvalho Chehab <mchehab@kernel.org>,
Rob Herring <robh+dt@kernel.org>,
Benjamin Fair <benjaminfair@google.com>,
Nancy Yuen <yuenn@google.com>,
Patrick Venture <venture@google.com>,
KWLIU@nuvoton.com, YSCHU@nuvoton.com, JJLIU0@nuvoton.com,
KFTING <KFTING@nuvoton.com>, Avi Fishman <avifishman70@gmail.com>,
Tomer Maimon <tmaimon77@gmail.com>,
Tali Perry <tali.perry1@gmail.com>,
ctcchien@nuvoton.com, linux-edac <linux-edac@vger.kernel.org>,
Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
devicetree <devicetree@vger.kernel.org>,
OpenBMC Maillist <openbmc@lists.ozlabs.org>
Subject: Re: [PATCH v9 1/3] ARM: dts: nuvoton: Add memory controller node
Date: Thu, 19 May 2022 08:55:53 +0800 [thread overview]
Message-ID: <CAHpyw9fjThEP4NuU08aNJ_raHpq9-j9KgBb8YuZ_shXTjhm3JA@mail.gmail.com> (raw)
In-Reply-To: <YoUwe6Tj4Uh6ukc8@zn.tnic>
Dear Borislav,
Borislav Petkov <bp@alien8.de> 於 2022年5月19日 週四 上午1:44寫道:
>
> On Tue, May 10, 2022 at 11:10:54AM +0800, Medad CChien wrote:
> > ECC must be configured in the BootBlock header.
> > Then, you can read error counts via the EDAC kernel framework.
> >
> > Signed-off-by: Medad CChien <ctcchien@nuvoton.com>
> > ---
> > arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi | 7 +++++++
> > 1 file changed, 7 insertions(+)
> >
> > diff --git a/arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi b/arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi
> > index 3696980a3da1..ba542b26941e 100644
> > --- a/arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi
> > +++ b/arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi
> > @@ -106,6 +106,13 @@
> > interrupt-parent = <&gic>;
> > ranges;
> >
> > + mc: memory-controller@f0824000 {
> > + compatible = "nuvoton,npcm750-memory-controller";
> > + reg = <0x0 0xf0824000 0x0 0x1000>;
> > + interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
> > + status = "disabled";
> > + };
> > +
> > rstc: rstc@f0801000 {
> > compatible = "nuvoton,npcm750-reset";
> > reg = <0xf0801000 0x70>;
> > --
>
> Please integrate scripts/checkpatch.pl into your patch creation
> workflow. Some of the warnings/errors *actually* make sense.
>
> In this case:
>
> WARNING: DT compatible string "nuvoton,npcm750-memory-controller" appears un-documented -- check ./Documentation/devicetree/bindings/
> #35: FILE: arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi:110:
> + compatible = "nuvoton,npcm750-memory-controller";
>
> For that I'm guessing patch 2 needs to go first in the series.
>
> In any case, the first two need an ACK from devicetree folks.
>
> WARNING: From:/Signed-off-by: email address mismatch: 'From: Medad CChien <medadyoung@gmail.com>' != 'Signed-off-by: Medad CChien <ctcchien@nuvoton.com>'
>
> For this one I wasn't sure so I had to ask: I guess it kinda makes sense
> to have the From: be the same as your SOB email. I.e., make sure the
> right authorship and SOB is maintained even when sending from machines
> with broken email setups.
>
> And that you can fix very easily: just add in your .git/config:
>
> [user]
> name = Medad CChien
> email = ctcchien@nuvoton.com
>
> and git would use that as the author and also slap a From: at the
> beginning of the patch with the correct name and email address.
>
OK, I got it.
> HTH.
>
> --
> Regards/Gruss,
> Boris.
>
> https://people.kernel.org/tglx/notes-about-netiquette
next prev parent reply other threads:[~2022-05-19 0:56 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-05-10 3:10 [PATCH v9 0/3] EDAC: nuvoton: Add nuvoton NPCM memory controller driver Medad CChien
2022-05-10 3:10 ` [PATCH v9 1/3] ARM: dts: nuvoton: Add memory controller node Medad CChien
2022-05-18 17:44 ` Borislav Petkov
2022-05-19 0:55 ` Medad Young [this message]
2022-05-19 9:34 ` Borislav Petkov
2022-05-20 2:31 ` Medad Young
2022-05-20 12:09 ` Borislav Petkov
2022-05-23 9:06 ` Medad Young
2022-05-23 9:34 ` Borislav Petkov
2022-05-24 1:15 ` Medad Young
2022-05-10 3:10 ` [PATCH v9 2/3] dt-bindings: edac: nuvoton: add NPCM memory controller Medad CChien
2022-05-10 6:14 ` Paul Menzel
2022-05-16 2:30 ` Medad Young
2022-05-18 4:33 ` Paul Menzel
2022-05-19 0:52 ` Medad Young
2022-05-10 3:10 ` [PATCH v9 3/3] EDAC: nuvoton: Add NPCM memory controller driver Medad CChien
2022-05-10 7:49 ` Paul Menzel
2022-05-16 2:35 ` Medad Young
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