From: Mike Leach <mike.leach@linaro.org>
To: Jie Gan <jie.gan@oss.qualcomm.com>
Cc: Suzuki K Poulose <suzuki.poulose@arm.com>,
James Clark <james.clark@linaro.org>,
Alexander Shishkin <alexander.shishkin@linux.intel.com>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Tingwei Zhang <tingwei.zhang@oss.qualcomm.com>,
Jinlong Mao <jinlong.mao@oss.qualcomm.com>,
Bjorn Andersson <andersson@kernel.org>,
Konrad Dybcio <konradybcio@kernel.org>,
coresight@lists.linaro.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org,
devicetree@vger.kernel.org
Subject: Re: [PATCH v6 4/9] coresight: tmc: add create/clean functions for etr_buf_list
Date: Wed, 3 Dec 2025 14:26:58 +0000 [thread overview]
Message-ID: <CAJ9a7Vg93PZzgxao6NjmGW2rJrZnnMj6+Lz3tdJ2P5AP-JS7ow@mail.gmail.com> (raw)
In-Reply-To: <20250908-enable-byte-cntr-for-tmc-v6-4-1db9e621441a@oss.qualcomm.com>
On Mon, 8 Sept 2025 at 03:02, Jie Gan <jie.gan@oss.qualcomm.com> wrote:
>
> Create and insert or remove the etr_buf_node to/from the etr_buf_list.
>
> Signed-off-by: Jie Gan <jie.gan@oss.qualcomm.com>
> ---
> drivers/hwtracing/coresight/coresight-tmc-etr.c | 94 +++++++++++++++++++++++++
> drivers/hwtracing/coresight/coresight-tmc.h | 2 +
> 2 files changed, 96 insertions(+)
>
> diff --git a/drivers/hwtracing/coresight/coresight-tmc-etr.c b/drivers/hwtracing/coresight/coresight-tmc-etr.c
> index b07fcdb3fe1a..ed15991b3217 100644
> --- a/drivers/hwtracing/coresight/coresight-tmc-etr.c
> +++ b/drivers/hwtracing/coresight/coresight-tmc-etr.c
> @@ -1909,6 +1909,100 @@ const struct coresight_ops tmc_etr_cs_ops = {
> .panic_ops = &tmc_etr_sync_ops,
> };
>
> +/**
> + * tmc_clean_etr_buf_list - clean the etr_buf_list.
> + * @drvdata: driver data of the TMC device.
> + *
> + * Remove the allocated node from the list and free the extra buffer.
> + */
> +void tmc_clean_etr_buf_list(struct tmc_drvdata *drvdata)
> +{
> + struct etr_buf_node *nd, *next;
> +
> + list_for_each_entry_safe(nd, next, &drvdata->etr_buf_list, node) {
> + if (nd->sysfs_buf == drvdata->sysfs_buf) {
> + if (coresight_get_mode(drvdata->csdev) == CS_MODE_DISABLED) {
> + drvdata->sysfs_buf = NULL;
> + tmc_free_etr_buf(nd->sysfs_buf);
> + nd->sysfs_buf = NULL;
> + }
> + list_del(&nd->node);
> + kfree(nd);
> + } else {
> + /* Free allocated buffers which are not utilized by ETR */
> + list_del(&nd->node);
> + tmc_free_etr_buf(nd->sysfs_buf);
> + nd->sysfs_buf = NULL;
> + kfree(nd);
> + }
> + }
> +}
> +EXPORT_SYMBOL_GPL(tmc_clean_etr_buf_list);
> +
> +/**
> + * tmc_create_etr_buf_list - create a list to manage the etr_buf_node.
> + * @drvdata: driver data of the TMC device.
> + * @num_nodes: number of nodes want to create with the list.
> + *
> + * Return 0 upon success and return the error number if fail.
> + */
> +int tmc_create_etr_buf_list(struct tmc_drvdata *drvdata, int num_nodes)
> +{
> + struct etr_buf_node *new_node;
> + struct etr_buf *sysfs_buf;
> + int i = 0, ret = 0;
> +
> + /* We dont need a list if there is only one node */
> + if (num_nodes < 2)
> + return -EINVAL;
> +
> + /* We expect that sysfs_buf in drvdata has already been allocated. */
> + if (drvdata->sysfs_buf) {
> + /* Directly insert the allocated sysfs_buf into the list first */
> + new_node = kzalloc(sizeof(struct etr_buf_node), GFP_KERNEL);
> + if (IS_ERR(new_node))
> + return PTR_ERR(new_node);
> +
> + new_node->sysfs_buf = drvdata->sysfs_buf;
> + new_node->is_free = false;
> + list_add(&new_node->node, &drvdata->etr_buf_list);
> + i++;
> + }
> +
> + while (i < num_nodes) {
> + new_node = kzalloc(sizeof(struct etr_buf_node), GFP_KERNEL);
> + if (IS_ERR(new_node)) {
> + ret = PTR_ERR(new_node);
> + break;
> + }
> +
> + sysfs_buf = tmc_alloc_etr_buf(drvdata, drvdata->size, 0, cpu_to_node(0), NULL);
> + if (IS_ERR(sysfs_buf)) {
> + kfree(new_node);
> + ret = PTR_ERR(new_node);
> + break;
> + }
> +
> + /* We dont have a available sysfs_buf in drvdata, setup one */
> + if (!drvdata->sysfs_buf) {
> + drvdata->sysfs_buf = sysfs_buf;
> + new_node->is_free = false;
> + } else
> + new_node->is_free = true;
> +
> + new_node->sysfs_buf = sysfs_buf;
> + list_add(&new_node->node, &drvdata->etr_buf_list);
> + i++;
> + }
> +
> + /* Clean the list if there is an error */
> + if (ret)
> + tmc_clean_etr_buf_list(drvdata);
> +
> + return ret;
> +}
> +EXPORT_SYMBOL_GPL(tmc_create_etr_buf_list);
> +
> int tmc_read_prepare_etr(struct tmc_drvdata *drvdata)
> {
> int ret = 0;
> diff --git a/drivers/hwtracing/coresight/coresight-tmc.h b/drivers/hwtracing/coresight/coresight-tmc.h
> index 292e25d82b62..ca0cba860d5f 100644
> --- a/drivers/hwtracing/coresight/coresight-tmc.h
> +++ b/drivers/hwtracing/coresight/coresight-tmc.h
> @@ -459,5 +459,7 @@ void tmc_etr_remove_catu_ops(void);
> struct etr_buf *tmc_etr_get_buffer(struct coresight_device *csdev,
> enum cs_mode mode, void *data);
> extern const struct attribute_group coresight_etr_group;
> +void tmc_clean_etr_buf_list(struct tmc_drvdata *drvdata);
> +int tmc_create_etr_buf_list(struct tmc_drvdata *drvdata, int num_nodes);
>
> #endif
>
> --
> 2.34.1
>
Reviewed-by: Mike Leach <mike.leach@linaro.org>
--
Mike Leach
Principal Engineer, ARM Ltd.
Manchester Design Centre. UK
next prev parent reply other threads:[~2025-12-03 14:27 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-09-08 2:01 [PATCH v6 0/9] coresight: ctcu: Enable byte-cntr function for TMC ETR Jie Gan
2025-09-08 2:01 ` [PATCH v6 1/9] coresight: core: Refactoring ctcu_get_active_port and make it generic Jie Gan
2025-12-03 16:18 ` Suzuki K Poulose
2025-12-04 2:45 ` Jie Gan
2025-09-08 2:01 ` [PATCH v6 2/9] coresight: core: add a new API to retrieve the helper device Jie Gan
2025-12-03 16:15 ` Suzuki K Poulose
2025-12-04 2:47 ` Jie Gan
2025-09-08 2:01 ` [PATCH v6 3/9] coresight: tmc: add etr_buf_list to store allocated etr_buf Jie Gan
2025-12-03 14:24 ` Mike Leach
2025-12-03 16:20 ` Suzuki K Poulose
2025-09-08 2:01 ` [PATCH v6 4/9] coresight: tmc: add create/clean functions for etr_buf_list Jie Gan
2025-12-03 14:26 ` Mike Leach [this message]
2025-09-08 2:01 ` [PATCH v6 5/9] coresight: tmc: Introduce sysfs_read_ops to wrap sysfs read operations Jie Gan
2025-09-08 2:01 ` [PATCH v6 6/9] dt-bindings: arm: add an interrupt property for Coresight CTCU Jie Gan
2025-12-03 14:30 ` Mike Leach
2025-12-04 2:49 ` Jie Gan
2025-12-03 18:14 ` Suzuki K Poulose
2025-12-04 2:53 ` Jie Gan
2025-12-04 9:22 ` Suzuki K Poulose
2025-12-05 1:01 ` Jie Gan
2025-09-08 2:01 ` [PATCH v6 7/9] coresight: ctcu: enable byte-cntr for TMC ETR devices Jie Gan
2025-09-08 2:02 ` [PATCH v6 8/9] coresight: tmc: integrate byte-cntr's read_ops with sysfs file_ops Jie Gan
2025-09-08 2:02 ` [PATCH v6 9/9] arm64: dts: qcom: lemans: Add interrupts to CTCU device Jie Gan
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