From: Mike Leach <mike.leach@linaro.org>
To: Jie Gan <jie.gan@oss.qualcomm.com>
Cc: Suzuki K Poulose <suzuki.poulose@arm.com>,
James Clark <james.clark@linaro.org>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Bjorn Andersson <andersson@kernel.org>,
Konrad Dybcio <konradybcio@kernel.org>,
Alexander Shishkin <alexander.shishkin@linux.intel.com>,
Tingwei Zhang <tingwei.zhang@oss.qualcomm.com>,
Jinlong Mao <jinlong.mao@oss.qualcomm.com>,
coresight@lists.linaro.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org,
devicetree@vger.kernel.org
Subject: Re: [PATCH v4 05/10] coresight: tmc: Introduce tmc_read_ops to wrap read operations
Date: Wed, 6 Aug 2025 07:56:32 +0100 [thread overview]
Message-ID: <CAJ9a7VjTYSePycUrL7jODLD7Vgj-qFHz0rUtfBPDhgKx59xKJA@mail.gmail.com> (raw)
In-Reply-To: <70bf0c0c-4a78-4caa-ab86-76a2c99c113a@oss.qualcomm.com>
On Wed, 6 Aug 2025 at 07:30, Jie Gan <jie.gan@oss.qualcomm.com> wrote:
>
>
>
> On 8/5/2025 6:55 PM, Mike Leach wrote:
> > Hi
> >
> > On Fri, 25 Jul 2025 at 11:08, Jie Gan <jie.gan@oss.qualcomm.com> wrote:
> >>
> >> Introduce tmc_read_ops as a wrapper, wrap read operations, for reading
> >> trace data from the TMC buffer.
> >>
> >> Signed-off-by: Jie Gan <jie.gan@oss.qualcomm.com>
> >> ---
> >> .../hwtracing/coresight/coresight-tmc-core.c | 50 +++++++++----------
> >> drivers/hwtracing/coresight/coresight-tmc.h | 17 +++++++
> >> 2 files changed, 40 insertions(+), 27 deletions(-)
> >>
> >> diff --git a/drivers/hwtracing/coresight/coresight-tmc-core.c b/drivers/hwtracing/coresight/coresight-tmc-core.c
> >> index 4d249af93097..f668047c5df4 100644
> >> --- a/drivers/hwtracing/coresight/coresight-tmc-core.c
> >> +++ b/drivers/hwtracing/coresight/coresight-tmc-core.c
> >> @@ -232,17 +232,10 @@ static int tmc_read_prepare(struct tmc_drvdata *drvdata)
> >> {
> >> int ret = 0;
> >>
> >> - switch (drvdata->config_type) {
> >> - case TMC_CONFIG_TYPE_ETB:
> >> - case TMC_CONFIG_TYPE_ETF:
> >> - ret = tmc_read_prepare_etb(drvdata);
> >> - break;
> >> - case TMC_CONFIG_TYPE_ETR:
> >> - ret = tmc_read_prepare_etr(drvdata);
> >> - break;
> >> - default:
> >> + if (drvdata->read_ops)
> >> + ret = drvdata->read_ops->read_prepare(drvdata);
> >> + else
> >> ret = -EINVAL;
> >> - }
> >>
> >> if (!ret)
> >> dev_dbg(&drvdata->csdev->dev, "TMC read start\n");
> >> @@ -254,17 +247,10 @@ static int tmc_read_unprepare(struct tmc_drvdata *drvdata)
> >> {
> >> int ret = 0;
> >>
> >> - switch (drvdata->config_type) {
> >> - case TMC_CONFIG_TYPE_ETB:
> >> - case TMC_CONFIG_TYPE_ETF:
> >> - ret = tmc_read_unprepare_etb(drvdata);
> >> - break;
> >> - case TMC_CONFIG_TYPE_ETR:
> >> - ret = tmc_read_unprepare_etr(drvdata);
> >> - break;
> >> - default:
> >> + if (drvdata->read_ops)
> >> + ret = drvdata->read_ops->read_unprepare(drvdata);
> >> + else
> >> ret = -EINVAL;
> >> - }
> >>
> >> if (!ret)
> >> dev_dbg(&drvdata->csdev->dev, "TMC read end\n");
> >> @@ -291,13 +277,8 @@ static int tmc_open(struct inode *inode, struct file *file)
> >> static ssize_t tmc_get_sysfs_trace(struct tmc_drvdata *drvdata, loff_t pos, size_t len,
> >> char **bufpp)
> >> {
> >> - switch (drvdata->config_type) {
> >> - case TMC_CONFIG_TYPE_ETB:
> >> - case TMC_CONFIG_TYPE_ETF:
> >> - return tmc_etb_get_sysfs_trace(drvdata, pos, len, bufpp);
> >> - case TMC_CONFIG_TYPE_ETR:
> >> - return tmc_etr_get_sysfs_trace(drvdata, pos, len, bufpp);
> >> - }
> >> + if (drvdata->read_ops)
> >> + return drvdata->read_ops->get_trace_data(drvdata, pos, len, bufpp);
> >>
> >> return -EINVAL;
> >> }
> >> @@ -769,6 +750,18 @@ static void register_crash_dev_interface(struct tmc_drvdata *drvdata,
> >> "Valid crash tracedata found\n");
> >> }
> >>
> >> +static const struct tmc_read_ops tmc_etb_read_ops = {
> >> + .read_prepare = tmc_read_prepare_etb,
> >> + .read_unprepare = tmc_read_unprepare_etb,
> >> + .get_trace_data = tmc_etb_get_sysfs_trace,
> >> +};
> >> +
> >> +static const struct tmc_read_ops tmc_etr_read_ops = {
> >> + .read_prepare = tmc_read_prepare_etr,
> >> + .read_unprepare = tmc_read_unprepare_etr,
> >> + .get_trace_data = tmc_etr_get_sysfs_trace,
> >> +};
> >> +
> >> static int __tmc_probe(struct device *dev, struct resource *res)
> >> {
> >> int ret = 0;
> >> @@ -818,6 +811,7 @@ static int __tmc_probe(struct device *dev, struct resource *res)
> >> desc.subtype.sink_subtype = CORESIGHT_DEV_SUBTYPE_SINK_BUFFER;
> >> desc.ops = &tmc_etb_cs_ops;
> >> dev_list = &etb_devs;
> >> + drvdata->read_ops = &tmc_etb_read_ops;
> >> break;
> >> case TMC_CONFIG_TYPE_ETR:
> >> desc.groups = coresight_etr_groups;
> >> @@ -831,6 +825,7 @@ static int __tmc_probe(struct device *dev, struct resource *res)
> >> mutex_init(&drvdata->idr_mutex);
> >> dev_list = &etr_devs;
> >> INIT_LIST_HEAD(&drvdata->etr_buf_list);
> >> + drvdata->read_ops = &tmc_etr_read_ops;
> >> break;
> >> case TMC_CONFIG_TYPE_ETF:
> >> desc.groups = coresight_etf_groups;
> >> @@ -839,6 +834,7 @@ static int __tmc_probe(struct device *dev, struct resource *res)
> >> desc.subtype.link_subtype = CORESIGHT_DEV_SUBTYPE_LINK_FIFO;
> >> desc.ops = &tmc_etf_cs_ops;
> >> dev_list = &etf_devs;
> >> + drvdata->read_ops = &tmc_etb_read_ops;
> >> break;
> >> default:
> >> pr_err("%s: Unsupported TMC config\n", desc.name);
> >> diff --git a/drivers/hwtracing/coresight/coresight-tmc.h b/drivers/hwtracing/coresight/coresight-tmc.h
> >> index 3cb8ba9f88f5..2ad8e288c94b 100644
> >> --- a/drivers/hwtracing/coresight/coresight-tmc.h
> >> +++ b/drivers/hwtracing/coresight/coresight-tmc.h
> >> @@ -223,6 +223,8 @@ struct etr_buf_node {
> >> struct list_head node;
> >> };
> >>
> >> +struct tmc_read_ops;
> >> +
> >
> > declare the entire structure here rather than later.
>
> There is an issue of declare the entire structure here because the
> function pointer needs use the struct tmc_drvdata which is not defined
> at this point and it will cause a compile error.
>
Understood.
Mike
> Thanks,
> Jie
>
> >
> >> /**
> >> * struct tmc_drvdata - specifics associated to an TMC component
> >> * @pclk: APB clock if present, otherwise NULL
> >> @@ -259,6 +261,7 @@ struct etr_buf_node {
> >> * Used by ETR/ETF.
> >> * @etr_buf_list: List that is used to manage allocated etr_buf.
> >> * @reading_node: Available buffer for byte-cntr reading.
> >> + * @tmc_read_ops: Read operations for TMC device.
> >> */
> >> struct tmc_drvdata {
> >> struct clk *pclk;
> >> @@ -290,6 +293,20 @@ struct tmc_drvdata {
> >> struct tmc_resrv_buf crash_mdata;
> >> struct list_head etr_buf_list;
> >> struct etr_buf_node *reading_node;
> >> + const struct tmc_read_ops *read_ops;
> >
> > probably should be named sysfs_read_ops to be consistent with the
> > perf/sysfs differentiation within the rest of the structure
> >
> >> +};
> >> +
> >> +/**
> >> + * struct tmc_read_ops - read operations for TMC and its helper devices
> >> + * @read_prepare: prepare operation.
> >> + * @read_unprepare: unprepare operation.
> >> + * @get_trace_data: read operation.
> >> + */
> >> +struct tmc_read_ops {
> >> + int (*read_prepare)(struct tmc_drvdata *drvdata);
> >> + int (*read_unprepare)(struct tmc_drvdata *drvdata);
> >> + ssize_t (*get_trace_data)(struct tmc_drvdata *drvdata, loff_t pos,
> >> + size_t len, char **bufpp);
> >> };
> >>
> >> struct etr_buf_operations {
> >> --
> >> 2.34.1
> >>
> >
> > with the above changes:-
> >
> > Reviewed-by: Mike Leach <mike.leach@linaro.org>
> >
>
--
Mike Leach
Principal Engineer, ARM Ltd.
Manchester Design Centre. UK
next prev parent reply other threads:[~2025-08-06 6:56 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-07-25 10:07 [PATCH v4 00/10] coresight: ctcu: Enable byte-cntr function for TMC ETR Jie Gan
2025-07-25 10:07 ` [PATCH v4 01/10] coresight: core: Refactoring ctcu_get_active_port and make it generic Jie Gan
2025-08-05 9:55 ` Mike Leach
2025-07-25 10:07 ` [PATCH v4 02/10] coresight: core: add a new API to retrieve the helper device Jie Gan
2025-08-05 9:57 ` Mike Leach
2025-07-25 10:07 ` [PATCH v4 03/10] coresight: tmc: add etr_buf_list to store allocated etr_buf Jie Gan
2025-08-05 10:15 ` Mike Leach
2025-08-06 0:32 ` Jie Gan
2025-07-25 10:08 ` [PATCH v4 04/10] coresight: tmc: add create/delete functions for etr_buf_node Jie Gan
2025-08-05 10:27 ` Mike Leach
2025-08-06 0:45 ` Jie Gan
2025-07-25 10:08 ` [PATCH v4 05/10] coresight: tmc: Introduce tmc_read_ops to wrap read operations Jie Gan
2025-08-05 10:55 ` Mike Leach
2025-08-06 6:30 ` Jie Gan
2025-08-06 6:56 ` Mike Leach [this message]
2025-07-25 10:08 ` [PATCH v4 06/10] dt-bindings: arm: add an interrupt property for Coresight CTCU Jie Gan
2025-07-25 10:08 ` [PATCH v4 07/10] coresight: ctcu: enable byte-cntr for TMC ETR devices Jie Gan
2025-07-25 10:08 ` [PATCH v4 08/10] coresight: add a new function in helper_ops Jie Gan
2025-08-05 12:28 ` Mike Leach
2025-08-05 12:30 ` Mike Leach
2025-08-06 0:35 ` Jie Gan
2025-08-06 8:32 ` Jie Gan
2025-07-25 10:08 ` [PATCH v4 09/10] coresight: tmc: integrate byte-cntr's read_ops with sysfs file_ops Jie Gan
2025-07-25 10:08 ` [PATCH v4 10/10] arm64: dts: qcom: sa8775p: Add interrupts to CTCU device Jie Gan
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