From: Guo Ren <guoren@kernel.org>
To: Conor Dooley <conor@kernel.org>
Cc: Jisheng Zhang <jszhang@kernel.org>,
Thomas Gleixner <tglx@linutronix.de>,
Marc Zyngier <maz@kernel.org>, Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Conor Dooley <conor+dt@kernel.org>,
Palmer Dabbelt <palmer@dabbelt.com>,
Paul Walmsley <paul.walmsley@sifive.com>,
Albert Ou <aou@eecs.berkeley.edu>,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
linux-riscv@lists.infradead.org, heiko@sntech.de
Subject: Re: [PATCH 3/5] riscv: dts: add initial T-HEAD light SoC device tree
Date: Mon, 22 May 2023 09:36:47 +0800 [thread overview]
Message-ID: <CAJF2gTReEW3onRyAXvasX748JuyXJeLU3nQpmQMZRrkS2=ANjg@mail.gmail.com> (raw)
In-Reply-To: <20230521-licorice-follicle-2f83e82f8bce@spud>
On Mon, May 22, 2023 at 1:08 AM Conor Dooley <conor@kernel.org> wrote:
>
> On Sun, May 21, 2023 at 11:37:58PM +0800, Guo Ren wrote:
> > On Tue, May 9, 2023 at 12:44 AM Conor Dooley <conor@kernel.org> wrote:
> > >
> > > On Tue, May 09, 2023 at 12:26:10AM +0800, Jisheng Zhang wrote:
> > > > On Sun, May 07, 2023 at 10:35:12PM +0100, Conor Dooley wrote:
> > > > > On Mon, May 08, 2023 at 02:23:02AM +0800, Jisheng Zhang wrote:
> > > > >
> > > > > > + c910_0: cpu@0 {
> > > > > > + compatible = "thead,c910", "riscv";
> > > > > > + device_type = "cpu";
> > > > > > + riscv,isa = "rv64imafdc";
> > > > >
> > > > > Does this support more than "rv64imafdc"?
> > > > > I assume there's some _xtheadfoo extensions that it does support,
> > > > > although I am not sure how we are proceeding with those - Heiko might
> > > > > have a more nuanced take.
> > > > >
> > > > > > + reset: reset-sample {
> > > > > > + compatible = "thead,reset-sample";
> > > > >
> > > > > What is a "reset-sample"?
> > > >
> > > > This node is only for opensbi. The compatible string is already in
> > > > opensbi. Do we also need to add dt-binding for it in linux?
> > >
> > > If it's to be included in the kernel's dts, then yes, you do need a
> > > dt-binding. If you remove it, then you don't :)
> > >
> > > That said, "thead,reset-sample" is a strangely named compatible, so if
> > > you do keep it it may end up needing a rename!
>
> > How about compatible = "thead,reset-th1520" ?
>
> "vendor,soc-function" is more typical, but "reset" is usually used for
> reset controllers of which this isn't as far as I can tell.
> I commented on the v2, hoping that you might actually know what the IP
> block' full/proper name is:
> https://lore.kernel.org/all/20230518-driving-secluding-793b3192776e@spud/
Oh, sorry, I focused on s64ilp32 these days and missed that. I would
reply to that thread.
>
> Do you?
>
> Cheers,
> Conor.
--
Best Regards
Guo Ren
next prev parent reply other threads:[~2023-05-22 1:37 UTC|newest]
Thread overview: 37+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-05-07 18:22 [PATCH 0/5] Add Sipeed Lichee Pi 4A RISC-V board support Jisheng Zhang
2023-05-07 18:23 ` [PATCH 1/5] irqchip/sifive-plic: Support T-HEAD's C910 PLIC Jisheng Zhang
2023-05-07 21:18 ` Conor Dooley
2023-05-08 3:14 ` Icenowy Zheng
2023-05-08 6:52 ` Guo Ren
2023-05-08 7:07 ` Conor Dooley
2023-05-08 16:09 ` Jisheng Zhang
2023-05-08 9:17 ` Krzysztof Kozlowski
2023-05-07 18:23 ` [PATCH 2/5] riscv: Add the T-HEAD SoC family Kconfig option Jisheng Zhang
2023-05-07 21:22 ` Conor Dooley
2023-05-08 6:42 ` Guo Ren
2023-05-08 6:52 ` Conor Dooley
2023-05-08 6:58 ` Guo Ren
2023-05-08 7:04 ` Conor Dooley
2023-05-07 18:23 ` [PATCH 3/5] riscv: dts: add initial T-HEAD light SoC device tree Jisheng Zhang
2023-05-07 21:35 ` Conor Dooley
2023-05-08 3:32 ` Icenowy Zheng
2023-05-08 7:01 ` Conor Dooley
2023-05-08 8:23 ` Heiko Stübner
2023-05-08 8:35 ` Conor Dooley
2023-05-08 15:56 ` Heiko Stübner
2023-05-08 16:26 ` Jisheng Zhang
2023-05-08 16:44 ` Conor Dooley
2023-05-08 17:09 ` Heiko Stübner
2023-05-21 15:37 ` Guo Ren
2023-05-21 17:08 ` Conor Dooley
2023-05-22 1:36 ` Guo Ren [this message]
2023-05-08 9:20 ` Krzysztof Kozlowski
2023-05-07 18:23 ` [PATCH 4/5] riscv: dts: thead: add sipeed Lichee Pi 4A board " Jisheng Zhang
2023-05-07 21:27 ` Conor Dooley
2023-05-08 6:44 ` Guo Ren
2023-05-07 18:23 ` [PATCH 5/5] MAINTAINERS: add entry for T-HEAD RISC-V SoC Jisheng Zhang
2023-05-07 21:21 ` Conor Dooley
2023-05-08 16:17 ` Jisheng Zhang
2023-05-08 17:23 ` Conor Dooley
2023-05-08 6:22 ` Guo Ren
2023-05-08 6:16 ` [PATCH 0/5] Add Sipeed Lichee Pi 4A RISC-V board support Guo Ren
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