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From: Guo Ren <guoren@kernel.org>
To: Jisheng Zhang <jszhang@kernel.org>, Wei Fu <wefu@redhat.com>,
	Wei Fu <tekkamanninja@gmail.com>
Cc: Thomas Gleixner <tglx@linutronix.de>,
	Marc Zyngier <maz@kernel.org>, Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
	linux-riscv@lists.infradead.org
Subject: Re: [PATCH 5/5] MAINTAINERS: add entry for T-HEAD RISC-V SoC
Date: Mon, 8 May 2023 14:22:27 +0800	[thread overview]
Message-ID: <CAJF2gTSWgiQOidm5S-XqzfXff1HS+p=V4zUFD0mMBvUa-b0OFw@mail.gmail.com> (raw)
In-Reply-To: <20230507182304.2934-6-jszhang@kernel.org>

On Mon, May 8, 2023 at 2:34 AM Jisheng Zhang <jszhang@kernel.org> wrote:
>
> I would like to temporarily maintain the T-HEAD RISC-V SoC support.
Wei Fu is working on TH1520, and maybe you could have a discussion
with him? Thx.

F.Y.I

Wei Fu <wefu@redhat.com>

>
> Signed-off-by: Jisheng Zhang <jszhang@kernel.org>
> ---
>  MAINTAINERS | 6 ++++++
>  1 file changed, 6 insertions(+)
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 7e0b87d5aa2e..e1e51accec4f 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -18155,6 +18155,12 @@ T:     git https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux.git/
>  F:     Documentation/devicetree/bindings/riscv/
>  F:     arch/riscv/boot/dts/
>
> +RISC-V THEAD SoC SUPPORT
> +M:     Jisheng Zhang <jszhang@kernel.org>
> +L:     linux-riscv@lists.infradead.org
> +S:     Maintained
> +F:     arch/riscv/boot/dts/thead/
> +
>  RNBD BLOCK DRIVERS
>  M:     Md. Haris Iqbal <haris.iqbal@ionos.com>
>  M:     Jack Wang <jinpu.wang@ionos.com>
> --
> 2.40.0
>


-- 
Best Regards
 Guo Ren

  parent reply	other threads:[~2023-05-08  6:22 UTC|newest]

Thread overview: 37+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-05-07 18:22 [PATCH 0/5] Add Sipeed Lichee Pi 4A RISC-V board support Jisheng Zhang
2023-05-07 18:23 ` [PATCH 1/5] irqchip/sifive-plic: Support T-HEAD's C910 PLIC Jisheng Zhang
2023-05-07 21:18   ` Conor Dooley
2023-05-08  3:14   ` Icenowy Zheng
2023-05-08  6:52   ` Guo Ren
2023-05-08  7:07     ` Conor Dooley
2023-05-08 16:09     ` Jisheng Zhang
2023-05-08  9:17   ` Krzysztof Kozlowski
2023-05-07 18:23 ` [PATCH 2/5] riscv: Add the T-HEAD SoC family Kconfig option Jisheng Zhang
2023-05-07 21:22   ` Conor Dooley
2023-05-08  6:42     ` Guo Ren
2023-05-08  6:52       ` Conor Dooley
2023-05-08  6:58         ` Guo Ren
2023-05-08  7:04           ` Conor Dooley
2023-05-07 18:23 ` [PATCH 3/5] riscv: dts: add initial T-HEAD light SoC device tree Jisheng Zhang
2023-05-07 21:35   ` Conor Dooley
2023-05-08  3:32     ` Icenowy Zheng
2023-05-08  7:01       ` Conor Dooley
2023-05-08  8:23       ` Heiko Stübner
2023-05-08  8:35         ` Conor Dooley
2023-05-08 15:56           ` Heiko Stübner
2023-05-08 16:26     ` Jisheng Zhang
2023-05-08 16:44       ` Conor Dooley
2023-05-08 17:09         ` Heiko Stübner
2023-05-21 15:37         ` Guo Ren
2023-05-21 17:08           ` Conor Dooley
2023-05-22  1:36             ` Guo Ren
2023-05-08  9:20   ` Krzysztof Kozlowski
2023-05-07 18:23 ` [PATCH 4/5] riscv: dts: thead: add sipeed Lichee Pi 4A board " Jisheng Zhang
2023-05-07 21:27   ` Conor Dooley
2023-05-08  6:44   ` Guo Ren
2023-05-07 18:23 ` [PATCH 5/5] MAINTAINERS: add entry for T-HEAD RISC-V SoC Jisheng Zhang
2023-05-07 21:21   ` Conor Dooley
2023-05-08 16:17     ` Jisheng Zhang
2023-05-08 17:23       ` Conor Dooley
2023-05-08  6:22   ` Guo Ren [this message]
2023-05-08  6:16 ` [PATCH 0/5] Add Sipeed Lichee Pi 4A RISC-V board support Guo Ren

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