From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-10.1 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,INCLUDES_PATCH,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 65DA7C433DF for ; Mon, 12 Oct 2020 06:53:25 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 1CADE20735 for ; Mon, 12 Oct 2020 06:53:25 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1602485605; bh=VcoPrFYGRrVs/edsst5tXJ1r1Y245Ir/p9Cq897BJvM=; h=References:In-Reply-To:From:Date:Subject:To:Cc:List-ID:From; b=JdpRJPVmnTU0bljRrG44NkSs4v6OpR5ZUPDcAQah1hUEK5uiNcDDc3FzY5B63AM4s hUdfGNAYvx3+Vm0jXqCUfyY++egJrq1iA3dE3bXDATJCrrwItHHymoN/dFQjOQKNL8 9Ek+eZTu0stnHAs2BMF/XMrAiHpcc5MHX3a22vYQ= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726556AbgJLGxK (ORCPT ); Mon, 12 Oct 2020 02:53:10 -0400 Received: from mail.kernel.org ([198.145.29.99]:43528 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726363AbgJLGw5 (ORCPT ); Mon, 12 Oct 2020 02:52:57 -0400 Received: from mail-ej1-f42.google.com (mail-ej1-f42.google.com [209.85.218.42]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 1C72420757; Mon, 12 Oct 2020 06:52:56 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1602485576; bh=VcoPrFYGRrVs/edsst5tXJ1r1Y245Ir/p9Cq897BJvM=; h=References:In-Reply-To:From:Date:Subject:To:Cc:From; b=a1LeWFIYksoBOiGqgcGXGCUlfDzn76wyLLOOitZF2gTrsX03EWPzAjAawY/RUSoIX ZUU+WH+521SNu4krNHIVzNTPhDUqu2lHYiW1mu4I8xQvn+l6sDdr9hHqynmqLLc/LP zfnxOYA4NJZ9/1gF2aukNiEYX6FdpIAtqhQILXLk= Received: by mail-ej1-f42.google.com with SMTP id lw21so21655578ejb.6; Sun, 11 Oct 2020 23:52:56 -0700 (PDT) X-Gm-Message-State: AOAM531kwiKUwT2ozfR0ZUcNfVlJ/gaSOcxv7xOeR/S2eovi3AMCkrcr qTDx2ngALw6zDgYSU9NVSqGeavGu7+2K2Lk7YUk= X-Google-Smtp-Source: ABdhPJxTerAC+l0eWBQXcoYZNr8qxgpFCzY8zq8tWwY1txLt4b4icsuCDF5TCXHvwyDZIwzYV+VWTH3i8skBhSiZpgo= X-Received: by 2002:a17:906:8401:: with SMTP id n1mr25466215ejx.215.1602485574591; Sun, 11 Oct 2020 23:52:54 -0700 (PDT) MIME-Version: 1.0 References: <1602229667-13165-1-git-send-email-Anson.Huang@nxp.com> In-Reply-To: <1602229667-13165-1-git-send-email-Anson.Huang@nxp.com> From: Krzysztof Kozlowski Date: Mon, 12 Oct 2020 08:52:42 +0200 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH 1/3] arm64: dts: imx8mm: Correct WDOG_B pin configuration To: Anson Huang Cc: robh+dt@kernel.org, shawnguo@kernel.org, s.hauer@pengutronix.de, kernel@pengutronix.de, festevam@gmail.com, aford173@gmail.com, daniel.baluta@nxp.com, shengjiu.wang@nxp.com, peter.chen@nxp.com, alifer.wsdm@gmail.com, abel.vesa@nxp.com, yibin.gong@nxp.com, jun.li@nxp.com, l.stach@pengutronix.de, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, "linux-kernel@vger.kernel.org" , Linux-imx@nxp.com Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On Fri, 9 Oct 2020 at 09:52, Anson Huang wrote: > > Different revision of i.MX8MM EVK boards may have different external > pull up registor design, some are enabled while some are NOT, to make > sure the WDOG_B pin works properly, better to enable internal pull up > resistor. Since enabling internal pull up resistor is NOT harmful and > having benefit of flexibility on different board design, just enable > it for all i.MX8MM boards. > > Signed-off-by: Anson Huang > --- > arch/arm64/boot/dts/freescale/imx8mm-beacon-som.dtsi | 2 +- > arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi | 2 +- > arch/arm64/boot/dts/freescale/imx8mm-var-som.dtsi | 2 +- > 3 files changed, 3 insertions(+), 3 deletions(-) > > diff --git a/arch/arm64/boot/dts/freescale/imx8mm-beacon-som.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-beacon-som.dtsi > index 6de86a4..a941301 100644 > --- a/arch/arm64/boot/dts/freescale/imx8mm-beacon-som.dtsi > +++ b/arch/arm64/boot/dts/freescale/imx8mm-beacon-som.dtsi > @@ -398,7 +398,7 @@ > > pinctrl_wdog: wdoggrp { > fsl,pins = < > - MX8MM_IOMUXC_GPIO1_IO02_WDOG1_WDOG_B 0xc6 > + MX8MM_IOMUXC_GPIO1_IO02_WDOG1_WDOG_B 0x166 Enabling pull up makes sense but you change other bits - disable Schmitt input and enable open drain. This change is not documented / explained in commit msg. Best regards, Krzysztof