From: Krzysztof Kozlowski <krzk@kernel.org>
To: daire.mcnamara@microchip.com
Cc: mturquette@baylibre.com, sboyd@kernel.org,
linux-clk@vger.kernel.org, robh+dt@kernel.org,
devicetree@vger.kernel.org, padmarao.begari@microchip.com,
david.abdurachmanov@gmail.com
Subject: Re: [PATCH v1 1/2] dt-bindings: CLK: microchip: Add Microchip PolarFire host binding
Date: Thu, 15 Oct 2020 14:40:10 +0200 [thread overview]
Message-ID: <CAJKOXPf28WZQfnwgtwXkvhsqfbsAsrawH1kk-bDX1fAsRzDAOA@mail.gmail.com> (raw)
In-Reply-To: <20201015114725.23137-2-daire.mcnamara@microchip.com>
On Thu, 15 Oct 2020 at 14:25, <daire.mcnamara@microchip.com> wrote:
>
> From: Daire McNamara <daire.mcnamara@microchip.com>
>
> Add device tree bindings for the Microchip PolarFire system
> clock controller
>
> Signed-off-by: Daire McNamara <daire.mcnamara@microchip.com>
Hi,
You have here a weird indentation. Commit msg should not be indented.
Subject: the subsystem prefix is "clk", not CLK. This applies to all patches.
> ---
> .../bindings/clock/microchip,pfsoc.yaml | 70 +++++++++++++++++++
> 1 file changed, 70 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/clock/microchip,pfsoc.yaml
>
> diff --git a/Documentation/devicetree/bindings/clock/microchip,pfsoc.yaml b/Documentation/devicetree/bindings/clock/microchip,pfsoc.yaml
> new file mode 100644
> index 000000000000..c833e7b6a7cd
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/clock/microchip,pfsoc.yaml
> @@ -0,0 +1,70 @@
> +# SPDX-License-Identifier: GPL-2.0
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/clock/microchip,pfsoc.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Microchip PolarFire Clock Control Module Binding
> +
> +maintainers:
> + - Daire McNamara <daire.mcnamara@microchip.com>
> +
> +description: |
> + Microchip PolarFire clock control is an integrated clock controller, which
> + generates clocks and supplies to all peripherals.
> +
> +properties:
> + compatible:
> + const: microchip,pfsoc-clkcfg
> +
> + reg:
> + maxItems: 1
> +
> + clocks:
> + items:
> + - description: reference clock input
> +
> + clock-names:
> + items:
> + - const: ref_clk
I am not sure if it makes sense to add "clk" suffix to the clock
names. It seems it appears in existing bindings but it is actually a
duplication of information. How about just "ref"?
> +
> + '#clock-cells':
> + const: 1
> + description: |
> + The clock consumer should specify the desired clock by having the clock
> + ID in its "clocks" phandle cell. See include/dt-bindings/clock/microchip,pfsoc-clock.h
> + for the full list of PolarFire clock IDs.
> +
> +required:
> + - compatible
> + - reg
> + - clocks
> + - clock-names
> + - '#clock-cells'
additionalProperties: false
... and most likely you miss some properties (judging by example).
> +
> +examples:
> + # Clock Config node:
> + - |
> + soc {
I think you can skip the soc in example - it does not help.
> + #address-cells = <2>;
> + #size-cells = <2>;
> + clkcfg: clock-controller@20002000 {
> + compatible = "microchip,pfsoc-clkcfg";
> + reg = <0x0 0x20002000 0x0 0x1000>;
> + reg-names = "mss_sysreg";
> + clocks = <&ref_clk 0>;
> + clock-names = "ref_clk";
> + #clock-cells = <1>;
> + clock-output-names = "cpu", "axi", "ahb", "envm", "mac0", "mac1", "mmc", "timer", "mmuart0", "mmuart1", "mmuart2", "mmuart3", "mmuart4", "spi0", "spi1", "i2c0", "i2c1", "can0", "can1", "usb", "rtc", "qspi", "gpio0", "gpio1", "gpio2", "ddrc", "fic0", "fic1", "fic2", "fic3", "athena", "cfm";
> + };
> + };
> +
> + # Required external clocks for Clock Control Module node:
> + - |
> + refclk: refclk {
Skip it, not relevant and not even correct phandle for example #1.
Best regards,
Krzysztof
next prev parent reply other threads:[~2020-10-15 12:40 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-10-15 11:47 [PATCH v1 0/2] CLK: microchip: Add clkcfg driver for Microchip PolarFire SoC daire.mcnamara
2020-10-15 11:47 ` [PATCH v1 1/2] dt-bindings: CLK: microchip: Add Microchip PolarFire host binding daire.mcnamara
2020-10-15 12:40 ` Krzysztof Kozlowski [this message]
2020-10-16 16:07 ` Rob Herring
2020-10-15 11:47 ` [PATCH v1 2/2] CLK: microchip: Add driver for Microchip PolarFire SoC daire.mcnamara
2020-10-15 12:52 ` Krzysztof Kozlowski
2020-10-20 0:16 ` Stephen Boyd
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