From: Emil Renner Berthing <emil.renner.berthing@canonical.com>
To: Sia Jee Heng <jeeheng.sia@starfivetech.com>,
kernel@esmil.dk, conor@kernel.org, robh+dt@kernel.org,
krzysztof.kozlowski+dt@linaro.org, paul.walmsley@sifive.com,
palmer@dabbelt.com, aou@eecs.berkeley.edu,
mturquette@baylibre.com, sboyd@kernel.org,
p.zabel@pengutronix.de, emil.renner.berthing@canonical.com,
hal.feng@starfivetech.com, xingyu.wu@starfivetech.com
Cc: linux-riscv@lists.infradead.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org,
leyfoon.tan@starfivetech.com
Subject: Re: [PATCH v1 02/16] reset: starfive: Convert the word "jh71x0" to "starfive"
Date: Fri, 8 Dec 2023 08:15:09 -0500 [thread overview]
Message-ID: <CAJM55Z9yLeMDifcGprgav_cJgwLUwKPcsPJSyjSxr2-nVw-YrQ@mail.gmail.com> (raw)
In-Reply-To: <20231206115000.295825-3-jeeheng.sia@starfivetech.com>
Sia Jee Heng wrote:
> Function names that consist of the 'jh71x0' naming convention are
> renamed to use the 'starfive' wording.
>
> Signed-off-by: Sia Jee Heng <jeeheng.sia@starfivetech.com>
> Reviewed-by: Ley Foon Tan <leyfoon.tan@starfivetech.com>
Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
> ---
> .../clk/starfive/clk-starfive-jh7110-sys.c | 4 +-
> .../reset/starfive/reset-starfive-common.c | 64 +++++++++----------
> .../reset/starfive/reset-starfive-common.h | 8 +--
> .../reset/starfive/reset-starfive-jh7100.c | 2 +-
> .../reset/starfive/reset-starfive-jh7110.c | 4 +-
> include/soc/starfive/reset-starfive-common.h | 6 +-
> 6 files changed, 44 insertions(+), 44 deletions(-)
>
> diff --git a/drivers/clk/starfive/clk-starfive-jh7110-sys.c b/drivers/clk/starfive/clk-starfive-jh7110-sys.c
> index 6e45c580c9ba..e63353c70209 100644
> --- a/drivers/clk/starfive/clk-starfive-jh7110-sys.c
> +++ b/drivers/clk/starfive/clk-starfive-jh7110-sys.c
> @@ -345,7 +345,7 @@ static void jh7110_reset_unregister_adev(void *_adev)
> static void jh7110_reset_adev_release(struct device *dev)
> {
> struct auxiliary_device *adev = to_auxiliary_dev(dev);
> - struct jh71x0_reset_adev *rdev = to_jh71x0_reset_adev(adev);
> + struct starfive_reset_adev *rdev = to_starfive_reset_adev(adev);
>
> kfree(rdev);
> }
> @@ -354,7 +354,7 @@ int jh7110_reset_controller_register(struct jh71x0_clk_priv *priv,
> const char *adev_name,
> u32 adev_id)
> {
> - struct jh71x0_reset_adev *rdev;
> + struct starfive_reset_adev *rdev;
> struct auxiliary_device *adev;
> int ret;
>
> diff --git a/drivers/reset/starfive/reset-starfive-common.c b/drivers/reset/starfive/reset-starfive-common.c
> index dab454e46bbf..8d8dec9e5d7a 100644
> --- a/drivers/reset/starfive/reset-starfive-common.c
> +++ b/drivers/reset/starfive/reset-starfive-common.c
> @@ -14,7 +14,7 @@
>
> #include "reset-starfive-common.h"
>
> -struct jh71x0_reset {
> +struct starfive_reset {
> struct reset_controller_dev rcdev;
> /* protect registers against concurrent read-modify-write */
> spinlock_t lock;
> @@ -23,16 +23,16 @@ struct jh71x0_reset {
> const u32 *asserted;
> };
>
> -static inline struct jh71x0_reset *
> -jh71x0_reset_from(struct reset_controller_dev *rcdev)
> +static inline struct starfive_reset *
> +starfive_reset_from(struct reset_controller_dev *rcdev)
> {
> - return container_of(rcdev, struct jh71x0_reset, rcdev);
> + return container_of(rcdev, struct starfive_reset, rcdev);
> }
>
> -static int jh71x0_reset_update(struct reset_controller_dev *rcdev,
> - unsigned long id, bool assert)
> +static int starfive_reset_update(struct reset_controller_dev *rcdev,
> + unsigned long id, bool assert)
> {
> - struct jh71x0_reset *data = jh71x0_reset_from(rcdev);
> + struct starfive_reset *data = starfive_reset_from(rcdev);
> unsigned long offset = id / 32;
> u32 mask = BIT(id % 32);
> void __iomem *reg_assert = data->assert + offset * sizeof(u32);
> @@ -61,34 +61,34 @@ static int jh71x0_reset_update(struct reset_controller_dev *rcdev,
> return ret;
> }
>
> -static int jh71x0_reset_assert(struct reset_controller_dev *rcdev,
> - unsigned long id)
> +static int starfive_reset_assert(struct reset_controller_dev *rcdev,
> + unsigned long id)
> {
> - return jh71x0_reset_update(rcdev, id, true);
> + return starfive_reset_update(rcdev, id, true);
> }
>
> -static int jh71x0_reset_deassert(struct reset_controller_dev *rcdev,
> - unsigned long id)
> +static int starfive_reset_deassert(struct reset_controller_dev *rcdev,
> + unsigned long id)
> {
> - return jh71x0_reset_update(rcdev, id, false);
> + return starfive_reset_update(rcdev, id, false);
> }
>
> -static int jh71x0_reset_reset(struct reset_controller_dev *rcdev,
> - unsigned long id)
> +static int starfive_reset_reset(struct reset_controller_dev *rcdev,
> + unsigned long id)
> {
> int ret;
>
> - ret = jh71x0_reset_assert(rcdev, id);
> + ret = starfive_reset_assert(rcdev, id);
> if (ret)
> return ret;
>
> - return jh71x0_reset_deassert(rcdev, id);
> + return starfive_reset_deassert(rcdev, id);
> }
>
> -static int jh71x0_reset_status(struct reset_controller_dev *rcdev,
> - unsigned long id)
> +static int starfive_reset_status(struct reset_controller_dev *rcdev,
> + unsigned long id)
> {
> - struct jh71x0_reset *data = jh71x0_reset_from(rcdev);
> + struct starfive_reset *data = starfive_reset_from(rcdev);
> unsigned long offset = id / 32;
> u32 mask = BIT(id % 32);
> void __iomem *reg_status = data->status + offset * sizeof(u32);
> @@ -97,25 +97,25 @@ static int jh71x0_reset_status(struct reset_controller_dev *rcdev,
> return !((value ^ data->asserted[offset]) & mask);
> }
>
> -static const struct reset_control_ops jh71x0_reset_ops = {
> - .assert = jh71x0_reset_assert,
> - .deassert = jh71x0_reset_deassert,
> - .reset = jh71x0_reset_reset,
> - .status = jh71x0_reset_status,
> +static const struct reset_control_ops starfive_reset_ops = {
> + .assert = starfive_reset_assert,
> + .deassert = starfive_reset_deassert,
> + .reset = starfive_reset_reset,
> + .status = starfive_reset_status,
> };
>
> -int reset_starfive_jh71x0_register(struct device *dev, struct device_node *of_node,
> - void __iomem *assert, void __iomem *status,
> - const u32 *asserted, unsigned int nr_resets,
> - struct module *owner)
> +int reset_starfive_register(struct device *dev, struct device_node *of_node,
> + void __iomem *assert, void __iomem *status,
> + const u32 *asserted, unsigned int nr_resets,
> + struct module *owner)
> {
> - struct jh71x0_reset *data;
> + struct starfive_reset *data;
>
> data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL);
> if (!data)
> return -ENOMEM;
>
> - data->rcdev.ops = &jh71x0_reset_ops;
> + data->rcdev.ops = &starfive_reset_ops;
> data->rcdev.owner = owner;
> data->rcdev.nr_resets = nr_resets;
> data->rcdev.dev = dev;
> @@ -128,4 +128,4 @@ int reset_starfive_jh71x0_register(struct device *dev, struct device_node *of_no
>
> return devm_reset_controller_register(dev, &data->rcdev);
> }
> -EXPORT_SYMBOL_GPL(reset_starfive_jh71x0_register);
> +EXPORT_SYMBOL_GPL(reset_starfive_register);
> diff --git a/drivers/reset/starfive/reset-starfive-common.h b/drivers/reset/starfive/reset-starfive-common.h
> index 266acc4b2caf..83461b22ee55 100644
> --- a/drivers/reset/starfive/reset-starfive-common.h
> +++ b/drivers/reset/starfive/reset-starfive-common.h
> @@ -6,9 +6,9 @@
> #ifndef __RESET_STARFIVE_COMMON_H
> #define __RESET_STARFIVE_COMMON_H
>
> -int reset_starfive_jh71x0_register(struct device *dev, struct device_node *of_node,
> - void __iomem *assert, void __iomem *status,
> - const u32 *asserted, unsigned int nr_resets,
> - struct module *owner);
> +int reset_starfive_register(struct device *dev, struct device_node *of_node,
> + void __iomem *assert, void __iomem *status,
> + const u32 *asserted, unsigned int nr_resets,
> + struct module *owner);
>
> #endif /* __RESET_STARFIVE_COMMON_H */
> diff --git a/drivers/reset/starfive/reset-starfive-jh7100.c b/drivers/reset/starfive/reset-starfive-jh7100.c
> index 546dea2e5811..122ac6c3893b 100644
> --- a/drivers/reset/starfive/reset-starfive-jh7100.c
> +++ b/drivers/reset/starfive/reset-starfive-jh7100.c
> @@ -51,7 +51,7 @@ static int __init jh7100_reset_probe(struct platform_device *pdev)
> if (IS_ERR(base))
> return PTR_ERR(base);
>
> - return reset_starfive_jh71x0_register(&pdev->dev, pdev->dev.of_node,
> + return reset_starfive_register(&pdev->dev, pdev->dev.of_node,
> base + JH7100_RESET_ASSERT0,
> base + JH7100_RESET_STATUS0,
> jh7100_reset_asserted,
> diff --git a/drivers/reset/starfive/reset-starfive-jh7110.c b/drivers/reset/starfive/reset-starfive-jh7110.c
> index 87dba01491ae..c4dd21761e53 100644
> --- a/drivers/reset/starfive/reset-starfive-jh7110.c
> +++ b/drivers/reset/starfive/reset-starfive-jh7110.c
> @@ -53,13 +53,13 @@ static int jh7110_reset_probe(struct auxiliary_device *adev,
> const struct auxiliary_device_id *id)
> {
> struct jh7110_reset_info *info = (struct jh7110_reset_info *)(id->driver_data);
> - struct jh71x0_reset_adev *rdev = to_jh71x0_reset_adev(adev);
> + struct starfive_reset_adev *rdev = to_starfive_reset_adev(adev);
> void __iomem *base = rdev->base;
>
> if (!info || !base)
> return -ENODEV;
>
> - return reset_starfive_jh71x0_register(&adev->dev, adev->dev.parent->of_node,
> + return reset_starfive_register(&adev->dev, adev->dev.parent->of_node,
> base + info->assert_offset,
> base + info->status_offset,
> NULL,
> diff --git a/include/soc/starfive/reset-starfive-common.h b/include/soc/starfive/reset-starfive-common.h
> index 56d8f413cf18..16df46a074bc 100644
> --- a/include/soc/starfive/reset-starfive-common.h
> +++ b/include/soc/starfive/reset-starfive-common.h
> @@ -6,12 +6,12 @@
> #include <linux/compiler_types.h>
> #include <linux/container_of.h>
>
> -struct jh71x0_reset_adev {
> +struct starfive_reset_adev {
> void __iomem *base;
> struct auxiliary_device adev;
> };
>
> -#define to_jh71x0_reset_adev(_adev) \
> - container_of((_adev), struct jh71x0_reset_adev, adev)
> +#define to_starfive_reset_adev(_adev) \
> + container_of((_adev), struct starfive_reset_adev, adev)
>
> #endif
> --
> 2.34.1
>
next prev parent reply other threads:[~2023-12-08 13:15 UTC|newest]
Thread overview: 58+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-12-06 11:49 [PATCH v1 00/16] Basic clock and reset support for StarFive JH8100 RISC-V SoC Sia Jee Heng
2023-12-06 11:49 ` [PATCH v1 01/16] reset: starfive: Rename file name "jh71x0" to "common" Sia Jee Heng
2023-12-08 13:12 ` Emil Renner Berthing
2023-12-06 11:49 ` [PATCH v1 02/16] reset: starfive: Convert the word "jh71x0" to "starfive" Sia Jee Heng
2023-12-08 13:15 ` Emil Renner Berthing [this message]
2023-12-06 11:49 ` [PATCH v1 03/16] clk: starfive: Rename file name "jh71x0" to "common" Sia Jee Heng
2023-12-08 13:16 ` Emil Renner Berthing
2023-12-06 11:49 ` [PATCH v1 04/16] clk: starfive: Convert the word "jh71x0" to "starfive" Sia Jee Heng
2023-12-08 13:24 ` Emil Renner Berthing
2023-12-06 11:49 ` [PATCH v1 05/16] dt-bindings: clock: Add StarFive JH8100 System clock and reset generator Sia Jee Heng
2023-12-08 17:52 ` Krzysztof Kozlowski
2023-12-12 2:47 ` JeeHeng Sia
2023-12-12 8:43 ` Krzysztof Kozlowski
2023-12-12 10:04 ` JeeHeng Sia
2023-12-06 11:49 ` [PATCH v1 06/16] clk: starfive: Add JH8100 System clock generator driver Sia Jee Heng
2023-12-08 16:25 ` Emil Renner Berthing
2023-12-12 0:46 ` JeeHeng Sia
2023-12-13 11:56 ` Emil Renner Berthing
2023-12-19 3:02 ` JeeHeng Sia
2023-12-19 17:39 ` Emil Renner Berthing
2023-12-20 1:35 ` JeeHeng Sia
2023-12-20 1:39 ` JeeHeng Sia
2023-12-20 13:07 ` Emil Renner Berthing
2023-12-21 0:45 ` JeeHeng Sia
2023-12-13 4:20 ` JeeHeng Sia
2023-12-13 12:05 ` Emil Renner Berthing
2023-12-20 1:34 ` JeeHeng Sia
2023-12-06 11:49 ` [PATCH v1 07/16] dt-bindings: clock: Add StarFive JH8100 System-North-West clock and reset generator Sia Jee Heng
2023-12-08 16:37 ` Emil Renner Berthing
2023-12-12 1:01 ` JeeHeng Sia
2023-12-13 12:00 ` Emil Renner Berthing
2023-12-08 17:53 ` Krzysztof Kozlowski
2023-12-12 2:48 ` JeeHeng Sia
2023-12-06 11:49 ` [PATCH v1 08/16] clk: starfive: Add JH8100 System-North-West clock generator driver Sia Jee Heng
2023-12-06 11:49 ` [PATCH v1 09/16] dt-bindings: clock: Add StarFive JH8100 System-North-East clock and reset generator Sia Jee Heng
2023-12-08 17:54 ` Krzysztof Kozlowski
2023-12-12 2:49 ` JeeHeng Sia
2023-12-06 11:49 ` [PATCH v1 10/16] clk: starfive: Add JH8100 System-North-East clock generator driver Sia Jee Heng
2023-12-06 11:49 ` [PATCH v1 11/16] dt-bindings: clock: Add StarFive JH8100 System-South-West clock and reset generator Sia Jee Heng
2023-12-08 17:54 ` Krzysztof Kozlowski
2023-12-12 2:49 ` JeeHeng Sia
2023-12-06 11:49 ` [PATCH v1 12/16] clk: starfive: Add JH8100 System-South-West clock generator driver Sia Jee Heng
2023-12-06 11:49 ` [PATCH v1 13/16] dt-bindings: clock: Add StarFive JH8100 Always-On clock and reset generator Sia Jee Heng
2023-12-08 17:55 ` Krzysztof Kozlowski
2023-12-12 2:49 ` JeeHeng Sia
2023-12-06 11:49 ` [PATCH v1 14/16] clk: starfive: Add JH8100 Always-On clock generator driver Sia Jee Heng
2023-12-06 11:49 ` [PATCH v1 15/16] reset: starfive: Add StarFive JH8100 reset driver Sia Jee Heng
2023-12-06 11:50 ` [PATCH v1 16/16] riscv: dts: starfive: jh8100: Add clocks and resets nodes Sia Jee Heng
2023-12-08 16:39 ` Emil Renner Berthing
2023-12-08 17:57 ` Krzysztof Kozlowski
2023-12-12 2:51 ` JeeHeng Sia
2023-12-12 1:07 ` JeeHeng Sia
2023-12-08 17:57 ` Krzysztof Kozlowski
2023-12-12 2:58 ` JeeHeng Sia
2023-12-12 8:43 ` Krzysztof Kozlowski
2023-12-12 10:03 ` JeeHeng Sia
2023-12-08 16:52 ` [PATCH v1 00/16] Basic clock and reset support for StarFive JH8100 RISC-V SoC Emil Renner Berthing
2023-12-12 1:09 ` JeeHeng Sia
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