From: Masahiro Yamada <masahiroy@kernel.org>
To: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Cc: Rob Herring <robh+dt@kernel.org>,
DTML <devicetree@vger.kernel.org>,
linux-arm-kernel <linux-arm-kernel@lists.infradead.org>,
Linux Kernel Mailing List <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH] arm64: dts: uniphier: Add missing clock-names and reset-names to pcie-phy
Date: Fri, 10 Jul 2020 10:56:25 +0900 [thread overview]
Message-ID: <CAK7LNAQdrqGmCDwEfd2GUYJrteNHs-PrTYmzKZO9v6y5a0ZHLQ@mail.gmail.com> (raw)
In-Reply-To: <1594198578-29238-1-git-send-email-hayashi.kunihiko@socionext.com>
On Wed, Jul 8, 2020 at 5:56 PM Kunihiko Hayashi
<hayashi.kunihiko@socionext.com> wrote:
>
> This adds missing clock-names and reset-names to pcie-phy node according to
> Documentation/devicetree/bindings/phy/socionext,uniphier-pcie.yaml.
Applied, but I tend to consider
b36a2472539293bcab0521bcbc284d6be0448d4b
was a misconversion (or intentional breakage)
because the original uniphier-pcie-phy.txt
did not require clock/reset-names
for ld20, pxs3.
> Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
> ---
> arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi | 2 ++
> arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi | 2 ++
> 2 files changed, 4 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi b/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi
> index f4a56b2..a87b8a6 100644
> --- a/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi
> +++ b/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi
> @@ -936,7 +936,9 @@
> compatible = "socionext,uniphier-ld20-pcie-phy";
> reg = <0x66038000 0x4000>;
> #phy-cells = <0>;
> + clock-names = "link";
> clocks = <&sys_clk 24>;
> + reset-names = "link";
> resets = <&sys_rst 24>;
> socionext,syscon = <&soc_glue>;
> };
> diff --git a/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi b/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi
> index 72f1688..0e52dadf 100644
> --- a/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi
> +++ b/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi
> @@ -833,7 +833,9 @@
> compatible = "socionext,uniphier-pxs3-pcie-phy";
> reg = <0x66038000 0x4000>;
> #phy-cells = <0>;
> + clock-names = "link";
> clocks = <&sys_clk 24>;
> + reset-names = "link";
> resets = <&sys_rst 24>;
> socionext,syscon = <&soc_glue>;
> };
> --
> 2.7.4
>
--
Best Regards
Masahiro Yamada
prev parent reply other threads:[~2020-07-10 1:57 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-07-08 8:56 [PATCH] arm64: dts: uniphier: Add missing clock-names and reset-names to pcie-phy Kunihiko Hayashi
2020-07-10 1:56 ` Masahiro Yamada [this message]
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