Re: [GIT PULL] Mediatek: 32-bit DT update for v4.15

[Arnd Bergmann <arnd-r2nGTMty4D4@public.gmane.org>]

On Fri, Nov 3, 2017 at 2:37 AM, Ryder Lee <ryder.lee-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org> wrote:
>> Ryder, can you be more specific how the interrupts are wired up?
>> Is there one IRQ per slot that is connected to all of IntA/IntB/IntC/IntD
>> and gets propagated through the bridges like that, or is it something else?
>
> Yes, that's what I mean - we only have one IRQ which is connected to all
> INTx for each slot, and I'm not sure if there is any better way to solve
> this problem.

Ok. Your parent interrupt-map seems entirely reasonable for that case as far
as I can tell (maybe someone else can find a problem):

+               interrupt-map-mask = <0xf800 0 0 0>;
+               interrupt-map = <0x0000 0 0 0 &sysirq GIC_SPI 193
IRQ_TYPE_LEVEL_LOW>,
+                               <0x0800 0 0 0 &sysirq GIC_SPI 194
IRQ_TYPE_LEVEL_LOW>,
+                               <0x1000 0 0 0 &sysirq GIC_SPI 195
IRQ_TYPE_LEVEL_LOW>;

However, I can't find any other example of a machine using
interrupt-map-mask = <0xf800 0 0 0>; in the kernel tree, so it's possible
that we have a parser bug. We do have other boards that list all four
interrupts for each slot, and that seems to work fine. Can you try this
map in the parent while leaving out the chilren?

               interrupt-map-mask = <0xf800 0 0 7>;
               interrupt-map = <0x0000 0 0 1 &sysirq GIC_SPI 193
IRQ_TYPE_LEVEL_LOW>,
                                        <0x0000 0 0 2 &sysirq GIC_SPI
193 IRQ_TYPE_LEVEL_LOW>,
                                        <0x0000 0 0 3 &sysirq GIC_SPI
193 IRQ_TYPE_LEVEL_LOW>,
                                        <0x0000 0 0 4 &sysirq GIC_SPI
193 IRQ_TYPE_LEVEL_LOW>,
                                        <0x0800 0 0 1 &sysirq GIC_SPI
194 IRQ_TYPE_LEVEL_LOW>,
                                        <0x0800 0 0 2 &sysirq GIC_SPI
194 IRQ_TYPE_LEVEL_LOW>,
                                        <0x0800 0 0 3 &sysirq GIC_SPI
194 IRQ_TYPE_LEVEL_LOW>,
                                        <0x0800 0 0 4 &sysirq GIC_SPI
194 IRQ_TYPE_LEVEL_LOW>,
                                        <0x1000 0 0 1 &sysirq GIC_SPI
195 IRQ_TYPE_LEVEL_LOW>,
                                        <0x1000 0 0 2 &sysirq GIC_SPI
195 IRQ_TYPE_LEVEL_LOW>,
                                        <0x1000 0 0 3 &sysirq GIC_SPI
195 IRQ_TYPE_LEVEL_LOW>,
                                        <0x1000 0 0 4 &sysirq GIC_SPI
195 IRQ_TYPE_LEVEL_LOW>;

This should have the exact same effect as what you have in your tree,
but if that works,
we can merge that version and try to figure out why the kernel thinks
they are different.

      Arnd
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