From: Anup Patel <apatel@ventanamicro.com>
To: Conor Dooley <conor@kernel.org>
Cc: Palmer Dabbelt <palmer@dabbelt.com>,
Paul Walmsley <paul.walmsley@sifive.com>,
Thomas Gleixner <tglx@linutronix.de>,
Marc Zyngier <maz@kernel.org>, Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Robin Murphy <robin.murphy@arm.com>,
Joerg Roedel <joro@8bytes.org>, Will Deacon <will@kernel.org>,
Frank Rowand <frowand.list@gmail.com>,
Atish Patra <atishp@atishpatra.org>,
Andrew Jones <ajones@ventanamicro.com>,
Saravana Kannan <saravanak@google.com>,
Anup Patel <anup@brainfault.org>,
linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
devicetree@vger.kernel.org, iommu@lists.linux.dev
Subject: Re: [PATCH v4 07/10] dt-bindings: interrupt-controller: Add RISC-V advanced PLIC
Date: Thu, 15 Jun 2023 11:17:16 +0530 [thread overview]
Message-ID: <CAK9=C2X35L3STKu954euRp3gsWb3uxzVbW+i+ddor4Hff9snXg@mail.gmail.com> (raw)
In-Reply-To: <20230614-devotee-repave-37d670dbfb7c@spud>
On Thu, Jun 15, 2023 at 12:57 AM Conor Dooley <conor@kernel.org> wrote:
>
> Hey Anup,
>
> Mostly looks good, once minor comment.
>
> On Tue, Jun 13, 2023 at 09:04:12PM +0530, Anup Patel wrote:
>
> > + riscv,children:
> > + $ref: /schemas/types.yaml#/definitions/phandle-array
> > + minItems: 1
> > + maxItems: 1024
> > + items:
> > + maxItems: 1
> > + description:
> > + A list of child APLIC domains for the given APLIC domain. Each child
> > + APLIC domain is assigned a child index in increasing order, with the
> > + first child APLIC domain assigned child index 0. The APLIC domain child
> > + index is used by firmware to delegate interrupts from the given APLIC
> > + domain to a particular child APLIC domain.
> > +
> > + riscv,delegation:
> > + $ref: /schemas/types.yaml#/definitions/phandle-array
> > + minItems: 1
> > + maxItems: 1024
> > + items:
> > + items:
> > + - description: child APLIC domain phandle
> > + - description: first interrupt number of the parent APLIC domain (inclusive)
> > + - description: last interrupt number of the parent APLIC domain (inclusive)
> > + description:
> > + A interrupt delegation list where each entry is a triple consisting
> > + of child APLIC domain phandle, first interrupt number of the parent
> > + APLIC domain, and last interrupt number of the parent APLIC domain.
> > + Firmware must configure interrupt delegation registers based on
> > + interrupt delegation list.
> > +
> > +required:
> > + - compatible
> > + - reg
> > + - interrupt-controller
> > + - "#interrupt-cells"
> > + - riscv,num-sources
> > +
> > +anyOf:
> > + - required:
> > + - interrupts-extended
> > + - required:
> > + - msi-parent
>
> Not sure if you missed this from the last version, but I asked if we
> needed a
> dependencies:
> riscv,delegate: [ riscv,children ]
>
> IOW, I don't think it is valid to have a delegation without having
> children?
Ahh, yes. I missed this one. I will update in the next revision.
>
> Otherwise,
> Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
>
> Cheers,
> Conor.
Regards,
Anup
next prev parent reply other threads:[~2023-06-15 5:47 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-06-13 15:34 [PATCH v4 00/10] Linux RISC-V AIA Support Anup Patel
2023-06-13 15:34 ` [PATCH v4 01/10] RISC-V: Add riscv_fw_parent_hartid() function Anup Patel
2023-06-13 15:34 ` [PATCH v4 02/10] irqchip/riscv-intc: Add support for RISC-V AIA Anup Patel
2023-06-13 15:34 ` [PATCH v4 03/10] dt-bindings: interrupt-controller: Add RISC-V incoming MSI controller Anup Patel
2023-06-13 15:34 ` [PATCH v4 04/10] irqchip: Add RISC-V incoming MSI controller driver Anup Patel
2023-06-13 15:34 ` [PATCH v4 05/10] irqchip/riscv-imsic: Add support for PCI MSI irqdomain Anup Patel
2023-06-13 15:34 ` [PATCH v4 06/10] irqchip/riscv-imsic: Improve IOMMU DMA support Anup Patel
2023-06-14 14:46 ` Jason Gunthorpe
2023-06-14 16:17 ` Anup Patel
2023-06-14 16:50 ` Jason Gunthorpe
2023-06-15 5:46 ` Anup Patel
2023-06-13 15:34 ` [PATCH v4 07/10] dt-bindings: interrupt-controller: Add RISC-V advanced PLIC Anup Patel
2023-06-14 19:27 ` Conor Dooley
2023-06-15 5:47 ` Anup Patel [this message]
2023-06-13 15:34 ` [PATCH v4 08/10] irqchip: Add RISC-V advanced PLIC driver Anup Patel
2023-06-15 19:17 ` Saravana Kannan
2023-06-15 19:31 ` Conor Dooley
2023-06-15 20:45 ` Saravana Kannan
2023-06-15 21:11 ` Conor Dooley
2023-06-16 2:01 ` Anup Patel
2023-06-16 22:05 ` Saravana Kannan
2023-06-19 6:13 ` Anup Patel
2023-06-22 20:56 ` Saravana Kannan
2023-06-23 11:47 ` Anup Patel
2023-06-23 12:49 ` Marc Zyngier
2023-06-23 13:52 ` Anup Patel
2023-06-13 15:34 ` [PATCH v4 09/10] RISC-V: Select APLIC and IMSIC drivers Anup Patel
2023-06-13 15:34 ` [PATCH v4 10/10] MAINTAINERS: Add entry for RISC-V AIA drivers Anup Patel
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