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From: Andrew Bresticker <abrestic@chromium.org>
To: James Hogan <james.hogan@imgtec.com>
Cc: Ralf Baechle <ralf@linux-mips.org>,
	Rob Herring <robh+dt@kernel.org>, Pawel Moll <pawel.moll@arm.com>,
	Mark Rutland <mark.rutland@arm.com>,
	Ian Campbell <ijc+devicetree@hellion.org.uk>,
	Kumar Gala <galak@codeaurora.org>,
	Thomas Gleixner <tglx@linutronix.de>,
	Jason Cooper <jason@lakedaemon.net>,
	Daniel Lezcano <daniel.lezcano@linaro.org>,
	John Crispin <blogic@openwrt.org>,
	David Daney <ddaney.cavm@gmail.com>,
	Qais Yousef <qais.yousef@imgtec.com>,
	Linux-MIPS <linux-mips@linux-mips.org>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	Paul <Paul.Burton@imgtec.com>
Subject: Re: [PATCH V3 2/4] of: Add binding document for MIPS GIC
Date: Wed, 29 Oct 2014 10:25:27 -0700	[thread overview]
Message-ID: <CAL1qeaEOifj-R2vcWzzh2i5S3ogBf3eZ4X8PbVa1j_BtsgFCwA@mail.gmail.com> (raw)
In-Reply-To: <5451201C.9090106@imgtec.com>

On Wed, Oct 29, 2014 at 10:13 AM, James Hogan <james.hogan@imgtec.com> wrote:
> On 29/10/14 16:55, Andrew Bresticker wrote:
>> Hi James,
>>
>> On Wed, Oct 29, 2014 at 2:21 AM, James Hogan <james.hogan@imgtec.com> wrote:
>>> Hi Andrew,
>>>
>>> On 29/10/14 00:12, Andrew Bresticker wrote:
>>>>  - changed compatible string to include CPU version
>>>
>>>> +Required properties:
>>>> +- compatible : Should be "mti,<cpu>-gic".  Supported variants:
>>>> +  - "mti,interaptiv-gic"
>>>
>>>> +Required properties for timer sub-node:
>>>> +- compatible : Should be "mti,<cpu>-gic-timer".  Supported variants:
>>>> +  - "mti,interaptiv-gic-timer"
>>>
>>> Erm, I'm a bit confused...
>>> Why do you include the core name in the compatible string?
>>>
>>> You seem to be suggesting that:
>>>
>>> 1) The GIC/timer drivers need to know what core they're running on.
>>>
>>> Is that really true?
>>
>> They don't now, but it's possible that a future CPU has a newer
>> revision of the GIC which has some differences that need to be
>> accounted for in the driver.
>>
>>> 2) It isn't possible to probe the core type.
>>>
>>> But the kernel already knows this, so what's wrong with using
>>> current_cpu_type() like everything else that needs to know?
>>>
>>> 3) Every new core should require a new compatible string to be added
>>> before the GIC will work. You don't even have a generic compatible
>>> string that DT can specify after the core specific one as a fallback.
>>
>> Yes, adding a generic compatible string would be a good idea.
>>
>>> Please lets not do this unless it's actually necessary (which AFAICT it
>>> really isn't).
>>
>> The point of this was to future-proof these bindings and I though that
>> CPU type was the best way to indicate version in the compatible
>> string.  This is also how it's done for the ARM GIC and arch timers.
>> Perhaps the best thing to do is to require both a core-specific
>> ("mti,interaptiv-gic") and generic ("mti,gic") compatible string and
>> just match on the generic one for now until there's a need to use the
>> core-specific one.  Thoughts?
>
> FPGA boards like Malta are something else to consider (when it is
> eventually converted to DT - Paul on CC knows more than me). You might
> load an interAptiv, or a proAptiv, or a P5600 bitstream, and the gic
> setup will be pretty much the same I think, since e.g. the address
> depends on where it is convenient to put it in the address space of the
> platform.

Ah, I didn't realize that the CPU bitstream could be changed
independently of the GIC.
In that case, the CPU revision isn't that useful.

> Any thoughts on the existence of current_cpu_type(), and the GIC
> revision register? They pretty much make encoding of core in compatible
> string redundant I think.

Ok, I suppose using the revision register is fine then.

  reply	other threads:[~2014-10-29 17:25 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-10-29  0:12 [PATCH V3 0/4] MIPS: GIC device-tree support Andrew Bresticker
2014-10-29  0:12 ` [PATCH V3 1/4] of: Add vendor prefix for MIPS Technologies, Inc Andrew Bresticker
2014-10-29  0:12 ` [PATCH V3 2/4] of: Add binding document for MIPS GIC Andrew Bresticker
2014-10-29  9:21   ` James Hogan
2014-10-29 16:55     ` Andrew Bresticker
2014-10-29 17:13       ` James Hogan
2014-10-29 17:25         ` Andrew Bresticker [this message]
2014-10-29 21:34           ` James Hogan
2014-10-29 18:01       ` Mark Rutland
2014-10-29 11:01   ` Qais Yousef
     [not found]     ` <5450C915.9030600-1AXoQHu6uovQT0dZR+AlfA@public.gmane.org>
2014-10-29 16:56       ` Andrew Bresticker
     [not found]         ` <CAL1qeaGm1Ma=B-gJV2ovnLNYFooq6bv12rODq4d8cGtKLeNy-g-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2014-10-29 17:05           ` Qais Yousef
2014-10-29 11:09   ` Qais Yousef
2014-10-29 17:08     ` Andrew Bresticker
     [not found]       ` <CAL1qeaHEE43n6V-y6XECicPaoEAfTBpyfg8bYJZK0e-pSMAJjw-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2014-10-29 17:23         ` Qais Yousef
2014-10-29 17:46           ` Mark Rutland
2014-10-29  0:12 ` [PATCH V3 3/4] irqchip: mips-gic: Add device-tree support Andrew Bresticker
     [not found] ` <1414541562-10076-1-git-send-email-abrestic-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>
2014-10-29  0:12   ` [PATCH V3 4/4] clocksource: " Andrew Bresticker
2014-10-29 17:51     ` Mark Rutland
2014-11-04 23:49       ` Andrew Bresticker
2014-10-29  8:09 ` [PATCH V3 0/4] MIPS: GIC " Arnd Bergmann

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