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Thu, 24 Apr 2025 02:11:25 -0700 (PDT) X-Google-Smtp-Source: AGHT+IFK7qUeJJwQjklraK2nHiUwpH65h8T9xweuQl27N0LwRhvIakqeaQOVUhg1tEDsLwCPFdAeBvDc3b678FCalLc= X-Received: by 2002:a05:6871:7406:b0:2c8:234d:971b with SMTP id 586e51a60fabf-2d96e6aa4ebmr380751fac.9.1745485885149; Thu, 24 Apr 2025 02:11:25 -0700 (PDT) Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 References: <20250415072724.3565533-1-peter.chen@cixtech.com> In-Reply-To: <20250415072724.3565533-1-peter.chen@cixtech.com> From: Enric Balletbo i Serra Date: Thu, 24 Apr 2025 11:11:00 +0200 X-Gm-Features: ATxdqUE5d3FPvXzpICK8B6GZkItGWuDz2HbxbB6ClXETUq4KFHFcvwKgyIo7a18 Message-ID: Subject: Re: [PATCH v6 00/10] arm64: Introduce CIX P1 (SKY1) SoC To: Peter Chen Cc: soc@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, catalin.marinas@arm.com, will@kernel.org, arnd@arndb.de, jassisinghbrar@gmail.com, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, cix-kernel-upstream@cixtech.com, maz@kernel.org, kajetan.puchalski@arm.com Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Hi Peter, On Tue, Apr 15, 2025 at 9:30=E2=80=AFAM Peter Chen = wrote: > > Cixtech P1 (internal name sky1) is high performance generic Armv9 SoC. > Orion O6 is the Arm V9 Motherboard built by Radxa. You could find brief > introduction for SoC and related boards at: > https://radxa.com/products/orion/o6#overview > > In this series, we add initial SoC and board support for Kernel building. > Patch 1-2: add dt-binding doc for CIX and its sky1 SoC > Patch 3-4: add Arm64 build support > Patch 5-7: add CIX mailbox driver which needs to support SCMI clock proto= col. > Patch 8-9: add initial dts support for SoC and Orion O6 board Many thanks for these patches, with these I was able to run the latest mainline kernel on boot to the console on my Orion O6 board. I think others already tested just wanted to point out if you can keep me in the loop, thanks. If you feel is useful you can add: Tested-by: Enric Balletbo i Serra Thanks, Enric > Patch 10: add MAINTAINERS entry > > Currently, to run upstream kernel at Orion O6 board, you need to > use BIOS released by Radxa, and add "clk_ignore_unused=3D1" at bootargs. > https://docs.radxa.com/en/orion/o6/bios/install-bios > > Changes for v6: > - Rebase to v6.15-rc2 > - Add mailbox driver > - Add device tree description for uart, mailbox and scmi firmware (for cl= ock). > > Changes for v5: > - Patch 5: Delete pmu-spe node which need to refine, and add it in future > - Patch 6: Refine MAINTAINERS for all CIX SoC and adding code tree locati= on > > Changes for v4: > - Move add MAINTAINERS entry patch to the last, and add two dts files ent= ry in it. > - Add three Krzysztof Kozlowski's Reviewed-by Tags > - For sky1.dtsi, makes below changes: > - Add ppi-partition entry for gic-v3 node, and let pmu-a520 and p= mu-a720's interrupt entry > get its handle > - Remove gic-v3's #redistributor-regions and redistributor-stride= properties > - Change gic-v3's #interrupt-cells as 4, and change all interrupt= specifiers accordingly > - Remove "arm,no-tick-in-suspend" for timer due to global counter= is at always-on power domain > - Remove timer's clock frequency due to firmware has already set = it > > Changes for v3: > - Patch 1: Add Krzysztof Kozlowski's Acked-by Tag > - Patch 2: Add Krzysztof Kozlowski's Reviewed-by Tag > - Patch 6: Fix two dts coding sytle issues > > Changes for v2: > - Pass dts build check with below commands: > make O=3D$OUTKNL dt_binding_check DT_SCHEMA_FILES=3Dvendor-prefixes.yaml > make O=3D$OUTKNL dt_binding_check DT_SCHEMA_FILES=3Darm/cix.yaml > make O=3D$OUTKNL CHECK_DTBS=3Dy W=3D1 cix/sky1-orion-o6.dtb > - Re-order the patch set, and move vendor-perfixes to the 1st patch. > - Patch 4: Ordered Kconfig config entry by alpha-numerically > - Patch 5: Corrects the Ack tag's name > - Patch 6: see below. > 1) Corrects the SoF tag's name > 2) Fix several coding sytle issues > 3) move linux,cma node to dts file > 4) delete memory node, memory size is passed by firmware > 5) delete uart2 node which will be added in future patches > 6) Improve for pmu and cpu node to stands for more specific cpu model > 7) Improve the timer node and add hypervisor virtual timer irq > > Fugang Duan (1): > arm64: Kconfig: add ARCH_CIX for cix silicons > > Gary Yang (1): > dt-bindings: clock: cix: Add CIX sky1 scmi clock id > > Guomin Chen (2): > dt-bindings: mailbox: add cix,sky1-mbox > mailbox: add CIX mailbox driver > > Peter Chen (6): > dt-bindings: vendor-prefixes: Add CIX Technology Group Co., Ltd. > dt-bindings: arm: add CIX P1 (SKY1) SoC > arm64: defconfig: Enable CIX SoC > arm64: defconfig: enable CIX mailbox > arm64: dts: cix: add initial CIX P1(SKY1) dts support > MAINTAINERS: Add CIX SoC maintainer entry > > .../devicetree/bindings/arm/cix.yaml | 26 + > .../bindings/mailbox/cix,sky1-mbox.yaml | 71 ++ > .../devicetree/bindings/vendor-prefixes.yaml | 2 + > MAINTAINERS | 11 + > arch/arm64/Kconfig.platforms | 6 + > arch/arm64/boot/dts/Makefile | 1 + > arch/arm64/boot/dts/cix/Makefile | 2 + > arch/arm64/boot/dts/cix/sky1-orion-o6.dts | 39 ++ > arch/arm64/boot/dts/cix/sky1.dtsi | 335 ++++++++++ > arch/arm64/configs/defconfig | 2 + > drivers/mailbox/Kconfig | 10 + > drivers/mailbox/Makefile | 2 + > drivers/mailbox/cix-mailbox.c | 632 ++++++++++++++++++ > include/dt-bindings/clock/sky1-clk.h | 279 ++++++++ > 14 files changed, 1418 insertions(+) > create mode 100644 Documentation/devicetree/bindings/arm/cix.yaml > create mode 100644 Documentation/devicetree/bindings/mailbox/cix,sky1-mb= ox.yaml > create mode 100644 arch/arm64/boot/dts/cix/Makefile > create mode 100644 arch/arm64/boot/dts/cix/sky1-orion-o6.dts > create mode 100644 arch/arm64/boot/dts/cix/sky1.dtsi > create mode 100644 drivers/mailbox/cix-mailbox.c > create mode 100644 include/dt-bindings/clock/sky1-clk.h > > -- > 2.25.1 > >