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AJvYcCV1ZjKESKrmJXtl1wIYbqkD2dIsN0JdeFTE64voZRIqRVWyIixsbnXWgsFbdXidnKJ1HEjRYLKF3hZB@vger.kernel.org X-Gm-Message-State: AOJu0YydP+vSOOs09dwRZIaB0oe/26r76ZTQIVO3dKcvd11zyPiKaSJD eMiZen+J0LTHZCXlKaVIFhtdd7uBX6RJybg/0JIsQKOwoHQ65bgF5URWkIvIpWKhxhXU6KQKHFU yntzcMKJC6Vd+3kAKm9BK8x6XaBrbNoU= X-Gm-Gg: ASbGncs1p2ZSQKgj68Rbg53DjeB/ZfW3ER1Ohibq57VKpgx4xVPgvgASkLLCwOuX2Ug Iprsv8untxeO1RjMDWRXbh4eg/GyYP05Gy5FQrWkcWb54X/Ui6nTtptHHnzE5KHXUlX5ppRf9Rr fszgD0fY52Sfufz0JLN67uDW4KlMNnEoJj5KzbD5DQR7UvkVhQyGdtfd/+M0VAd52fSDZjt4j7j 3bHvSBFf5AB5JgeKszHtfUaohTdcTqSVf4h/eYIHhhHDX3ZIYAKY+xTjgKB X-Google-Smtp-Source: AGHT+IHdgCiAv0GnSWd71CcbTy++P6uvGOM/tKNn/jo0rdp/VWF5xhf+QcYOB71dJSyzp3Z/KGWejz6sSR9wT1zIXeI= X-Received: by 2002:a05:6512:3b09:b0:594:5644:db94 with SMTP id 2adb3069b0e04-59576d99e84mr620181e87.0.1762932118887; Tue, 11 Nov 2025 23:21:58 -0800 (PST) Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 References: <20251027-tegra186-icc-p2-v4-0-e4e4f57e2103@gmail.com> <20251027-tegra186-icc-p2-v4-3-e4e4f57e2103@gmail.com> <82c8dda8-6fcb-48f9-bdaa-f3d1431e41ae@nvidia.com> <99ca4992-5736-417d-854e-379542549bee@kernel.org> <7f3dad08-cff5-40c2-8e7f-f6441a3d6b91@nvidia.com> <249bbe7e-e2da-4493-bdd5-8f4b17aff8fe@nvidia.com> In-Reply-To: From: Aaron Kling Date: Wed, 12 Nov 2025 01:21:47 -0600 X-Gm-Features: AWmQ_bl20GzsT3Dfl9ZcMU_CZRyE4oXltua3SXL7weT7oMmUhOEAQcvgowvaLnI Message-ID: Subject: Re: [PATCH v4 3/5] memory: tegra186-emc: Support non-bpmp icc scaling To: Jon Hunter Cc: Krzysztof Kozlowski , Rob Herring , Conor Dooley , Thierry Reding , linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-tegra@vger.kernel.org Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Wed, Nov 12, 2025 at 12:18=E2=80=AFAM Jon Hunter = wrote: > > > On 11/11/2025 23:17, Aaron Kling wrote: > > ... > > > Alright, I think I've got the picture of what's going on now. The > > standard arm64 defconfig enables the t194 pcie driver as a module. And > > my simple busybox ramdisk that I use for mainline regression testing > > isn't loading any modules. If I set the pcie driver to built-in, I > > replicate the issue. And I don't see the issue on my normal use case, > > because I have the dt changes as well. > > > > So it appears that the pcie driver submits icc bandwidth. And without > > cpufreq submitting bandwidth as well, the emc driver gets a very low > > number and thus sets a very low emc freq. The question becomes... what > > to do about it? If the related dt changes were submitted to > > linux-next, everything should fall into place. And I'm not sure where > > this falls on the severity scale since it doesn't full out break boot > > or prevent operation. > > Where are the related DT changes? If we can get these into -next and > lined up to be merged for v6.19, then that is fine. However, we should > not merge this for v6.19 without the DT changes. The dt changes are here [0]. This was all part of the same series, keeping everything logically related together. But on v2, Krzysztof said that none of this should have ever been together and that each subsystem should get a separate series, even if the changes are related. Which I did, and now this is split across three series. The actmon series for tegra210 is in a similar state. Split across four series and only one has been pulled to linux-next. > I will also talk with Thierry to see if he has any concerns about users > seeing slow performance if they don't have an up-to-date DTB. > > Is there any easy way to detect if the DTB has he necessary properties > to enable ICC scaling? I'm not sure there is any simple way, given how I set up tegra186 and tegra194. The new dt properties are on the cpu nodes, there's nothing new for the emc node. So the emc driver just unconditionally declares itself to icc. It was doing this before too, but wouldn't do anything on tegra186 or tegra194 because the set_bw function was just a stub and the real logic happened in the bpmp bw mgr, which only exists on tegra234+. Now the set_bw function will directly calculate and set the emc clock as long as the bpmp bw mgr is not supported. Offhand, I can't think of anything existing to check to skip this, because nothing new in the dt has been added in the scope of emc. Aaron [0] https://lore.kernel.org/r/20251021-tegra186-icc-p3-v3-0-68184ee8a89c@gm= ail.com