From: Rob Herring <robh@kernel.org>
To: Manorit Chawdhry <m-chawdhry@ti.com>
Cc: Nishanth Menon <nm@ti.com>, Vignesh Raghavendra <vigneshr@ti.com>,
Tero Kristo <kristo@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
linux-arm-kernel@lists.infradead.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
Udit Kumar <u-kumar1@ti.com>,
Neha Malcom Francis <n-francis@ti.com>,
Aniket Limaye <a-limaye@ti.com>
Subject: Re: [PATCH] arm64: dts: ti: Introduce J742S2 SoC and EVM
Date: Thu, 11 Jul 2024 08:19:59 -0600 [thread overview]
Message-ID: <CAL_JsqJABHM9StutsYPjArjhnQ5vVyYK-ASd62iO6+jNBZVqig@mail.gmail.com> (raw)
In-Reply-To: <20240711-b4-upstream-j742s2-v1-1-8b9e41c18f91@ti.com>
On Wed, Jul 10, 2024 at 11:26 PM Manorit Chawdhry <m-chawdhry@ti.com> wrote:
>
> This series add the Linux support for our new family of device J742S2.
> This device is a subset of J784S4 and shares the same memory map and
> thus the nodes are being reused from J784S4 to avoid duplication.
>
> Here are some of the salient features of the J742S2 automotive grade
> application processor:
>
> The J742S2 SoC belongs to the K3 Multicore SoC architecture platform,
> providing advanced system integration in automotive, ADAS and industrial
> applications requiring AI at the network edge. This SoC extends the K3
> Jacinto 7 family of SoCs with focus on raising performance and
> integration while providing interfaces, memory architecture and compute
> performance for multi-sensor, high concurrency applications.
>
> Some highlights of this SoC are:
> * Up to Four Arm® Cortex®-A72 microprocessor subsystem at up to 2.0GHz,
> 3 C7x floating point vector DSPs with Up to Two Deep-learning matrix
> multiply accelerator (MMAv2),
> * 3D GPU: Automotive grade IMG BXS-4-64 MC1
> * Vision Processing Accelerator (VPAC) with image signal processor and
> Depth and Motion Processing Accelerator (DMPAC)
> * Three CSI2.0 4L RX plus two CSI2.0 4L TX, two DSI Tx, one eDP/DP and
> one DPI interface.
> * Integrated gigabit ethernet switch, up to 4 ports ,two ports
> support 10Gb USXGMII; One 4 lane PCIe-GEN3 controllers, USB3.0
> Dual-role device subsystems, Up to 20 MCANs, among other peripherals.
>
> ( Refer Table 2-1 for Device comparison with J7AHP )
>
> Link: https://www.ti.com/lit/pdf/spruje3 (TRM)
> Link: https://www.ti.com/lit/ug/sprujd8/sprujd8.pdf (EVM user guide)
> Link: https://www.ti.com/lit/zip/SPAC001 (Schematics)
> ---
> The series adds support for J742S2 family of SoCs. Also adds J742S2 EVM
> Support and re-uses most of the stuff from the superset device J784s4.
>
> Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
> ---
> arch/arm64/boot/dts/ti/Makefile | 3 ++
> arch/arm64/boot/dts/ti/k3-j742s2-evm.dts | 22 ++++++++++++++
> arch/arm64/boot/dts/ti/k3-j742s2-main.dtsi | 47 ++++++++++++++++++++++++++++++
> arch/arm64/boot/dts/ti/k3-j742s2.dtsi | 18 ++++++++++++
> 4 files changed, 90 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makefile
> index e20b27ddf901..4d0688c5cff7 100644
> --- a/arch/arm64/boot/dts/ti/Makefile
> +++ b/arch/arm64/boot/dts/ti/Makefile
> @@ -119,6 +119,9 @@ dtb-$(CONFIG_ARCH_K3) += k3-j784s4-evm-pcie0-pcie1-ep.dtbo
> dtb-$(CONFIG_ARCH_K3) += k3-j784s4-evm-quad-port-eth-exp1.dtbo
> dtb-$(CONFIG_ARCH_K3) += k3-j784s4-evm-usxgmii-exp1-exp2.dtbo
>
> +# Boards with J742S2 SoC
> +dtb-$(CONFIG_ARCH_K3) += k3-j742s2-evm.dtb
> +
> # Build time test only, enabled by CONFIG_OF_ALL_DTBS
> k3-am625-beagleplay-csi2-ov5640-dtbs := k3-am625-beagleplay.dtb \
> k3-am625-beagleplay-csi2-ov5640.dtbo
> diff --git a/arch/arm64/boot/dts/ti/k3-j742s2-evm.dts b/arch/arm64/boot/dts/ti/k3-j742s2-evm.dts
> new file mode 100644
> index 000000000000..98088ccfd76d
> --- /dev/null
> +++ b/arch/arm64/boot/dts/ti/k3-j742s2-evm.dts
> @@ -0,0 +1,22 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Copyright (C) 2024 Texas Instruments Incorporated - https://www.ti.com/
> + *
> + * EVM Board Schematics: https://www.ti.com/lit/zip/SPAC001
> + */
> +
> +#include "k3-j784s4-evm.dts"
> +#include "k3-j742s2.dtsi"
The structure of this is weird and fragile. You delete nodes in
k3-j742s2.dtsi which are defined indirectly (I assume) by
k3-j784s4-evm.dts. When there's a 2nd board for this SoC, you are
going to have to duplicate everything here. k3-j742s2.dtsi should
include k3-j742s4.dtsi. And then you may need a common EVM board .dtsi
to share.
Rob
prev parent reply other threads:[~2024-07-11 14:20 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-07-11 5:26 [PATCH] arm64: dts: ti: Introduce J742S2 SoC and EVM Manorit Chawdhry
2024-07-11 6:23 ` Krzysztof Kozlowski
2024-07-11 14:19 ` Rob Herring [this message]
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