* [PATCH] arm64: dts: hi3660: improve pmu description
@ 2017-11-08 8:59 Xu YiPing
[not found] ` <1510131578-84235-1-git-send-email-xuyiping-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org>
0 siblings, 1 reply; 3+ messages in thread
From: Xu YiPing @ 2017-11-08 8:59 UTC (permalink / raw)
To: xuyiping, xuwei5, robh+dt, mark.rutland, catalin.marinas,
will.deacon
Cc: linux-arm-kernel, devicetree, linux-kernel
cortex a73 pmu is supported, use it instead of armpmu-v3
---
arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 22 +++++++++++++---------
1 file changed, 13 insertions(+), 9 deletions(-)
diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
index 13ae69f..f638897 100644
--- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
@@ -203,21 +203,25 @@
IRQ_TYPE_LEVEL_HIGH)>;
};
- pmu {
- compatible = "arm,armv8-pmuv3";
+ pmu_a53 {
+ compatible = "arm,cortex-a53-pmu";
interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
+ <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
interrupt-affinity = <&cpu0>,
<&cpu1>,
<&cpu2>,
- <&cpu3>,
- <&cpu4>,
+ <&cpu3>;
+ };
+
+ pmu_a73 {
+ compatible = "arm,cortex-a73-pmu";
+ interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-affinity = <&cpu4>,
<&cpu5>,
<&cpu6>,
<&cpu7>;
--
2.7.4
^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [PATCH] arm64: dts: hi3660: improve pmu description
[not found] ` <1510131578-84235-1-git-send-email-xuyiping-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org>
@ 2017-11-08 15:55 ` Rob Herring
[not found] ` <CAL_JsqKFMSvRCB48X4eiPpi5nAL4WGGVGh8GRJpp_JMNdALjbw-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
0 siblings, 1 reply; 3+ messages in thread
From: Rob Herring @ 2017-11-08 15:55 UTC (permalink / raw)
To: Xu YiPing
Cc: Wei Xu, Mark Rutland, Catalin Marinas, Will Deacon,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
On Wed, Nov 8, 2017 at 2:59 AM, Xu YiPing <xuyiping-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org> wrote:
> cortex a73 pmu is supported, use it instead of armpmu-v3
The subject is misleading and you need a better commit message. Why is
this change needed? You are going from 1 to 2 devices.
Missing your S-o-B, too.
> ---
> arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 22 +++++++++++++---------
> 1 file changed, 13 insertions(+), 9 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
> index 13ae69f..f638897 100644
> --- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
> +++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
> @@ -203,21 +203,25 @@
> IRQ_TYPE_LEVEL_HIGH)>;
> };
>
> - pmu {
> - compatible = "arm,armv8-pmuv3";
> + pmu_a53 {
Don't use '_' in node names. Building with W=2 will tell you this.
> + compatible = "arm,cortex-a53-pmu";
> interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
> + <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
> interrupt-affinity = <&cpu0>,
> <&cpu1>,
> <&cpu2>,
> - <&cpu3>,
> - <&cpu4>,
> + <&cpu3>;
> + };
> +
> + pmu_a73 {
> + compatible = "arm,cortex-a73-pmu";
> + interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-affinity = <&cpu4>,
> <&cpu5>,
> <&cpu6>,
> <&cpu7>;
> --
> 2.7.4
>
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
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^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH] arm64: dts: hi3660: improve pmu description
[not found] ` <CAL_JsqKFMSvRCB48X4eiPpi5nAL4WGGVGh8GRJpp_JMNdALjbw-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
@ 2017-11-09 8:17 ` YiPing Xu
0 siblings, 0 replies; 3+ messages in thread
From: YiPing Xu @ 2017-11-09 8:17 UTC (permalink / raw)
To: Rob Herring
Cc: Wei Xu, Mark Rutland, Catalin Marinas, Will Deacon,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
On 2017/11/8 23:55, Rob Herring wrote:
> On Wed, Nov 8, 2017 at 2:59 AM, Xu YiPing <xuyiping-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org> wrote:
>> cortex a73 pmu is supported, use it instead of armpmu-v3
>
> The subject is misleading and you need a better commit message. Why is
> this change needed? You are going from 1 to 2 devices.
>
> Missing your S-o-B, too.
>
>> ---
>> arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 22 +++++++++++++---------
>> 1 file changed, 13 insertions(+), 9 deletions(-)
>>
>> diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
>> index 13ae69f..f638897 100644
>> --- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
>> +++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
>> @@ -203,21 +203,25 @@
>> IRQ_TYPE_LEVEL_HIGH)>;
>> };
>>
>> - pmu {
>> - compatible = "arm,armv8-pmuv3";
>> + pmu_a53 {
>
> Don't use '_' in node names. Building with W=2 will tell you this.
OK, i'll modify it
>
>> + compatible = "arm,cortex-a53-pmu";
>> interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>,
>> <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>,
>> <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>,
>> - <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>,
>> - <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
>> - <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
>> - <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
>> - <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
>> + <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
>> interrupt-affinity = <&cpu0>,
>> <&cpu1>,
>> <&cpu2>,
>> - <&cpu3>,
>> - <&cpu4>,
>> + <&cpu3>;
>> + };
>> +
>> + pmu_a73 {
>> + compatible = "arm,cortex-a73-pmu";
>> + interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
>> + <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
>> + <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
>> + <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
>> + interrupt-affinity = <&cpu4>,
>> <&cpu5>,
>> <&cpu6>,
>> <&cpu7>;
>> --
>> 2.7.4
>>
>>
>> _______________________________________________
>> linux-arm-kernel mailing list
>> linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
>> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
>
> .
>
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2017-11-08 8:59 [PATCH] arm64: dts: hi3660: improve pmu description Xu YiPing
[not found] ` <1510131578-84235-1-git-send-email-xuyiping-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org>
2017-11-08 15:55 ` Rob Herring
[not found] ` <CAL_JsqKFMSvRCB48X4eiPpi5nAL4WGGVGh8GRJpp_JMNdALjbw-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2017-11-09 8:17 ` YiPing Xu
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