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From: Rob Herring <robh@kernel.org>
To: Dilip Kota <eswara.kota@linux.intel.com>
Cc: "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	devicetree@vger.kernel.org,
	Kishon Vijay Abraham I <kishon@ti.com>,
	Andy Shevchenko <andriy.shevchenko@intel.com>,
	cheol.yong.kim@intel.com, chuanhua.lei@linux.intel.com,
	qi-ming.wu@intel.com, yixin.zhu@intel.com
Subject: Re: [PATCH v4 2/3] dt-bindings: phy: Add YAML schemas for Intel Combophy
Date: Tue, 3 Mar 2020 10:26:33 -0600	[thread overview]
Message-ID: <CAL_JsqLKFbaiaeNAq_b9xDQRWVG8dXkWt2+cKucRPEzynC20XQ@mail.gmail.com> (raw)
In-Reply-To: <5b71670d-91a6-9760-f4da-1b6f014a1ea2@linux.intel.com>

On Tue, Mar 3, 2020 at 3:24 AM Dilip Kota <eswara.kota@linux.intel.com> wrote:
>
>
> On 3/3/2020 9:50 AM, Rob Herring wrote:
> > On Mon, Mar 02, 2020 at 04:43:24PM +0800, Dilip Kota wrote:
> >> Combophy subsystem provides PHY support to various
> >> controllers, viz. PCIe, SATA and EMAC.
> >> Adding YAML schemas for the same.
> >>
> >> Signed-off-by: Dilip Kota <eswara.kota@linux.intel.com>
> >> ---
> >> Changes on v4:
> >>    No changes.
> ...
> >> +additionalProperties: false
> >> +
> >> +examples:
> >> +  - |
> >> +    #include <dt-bindings/phy/phy-intel-combophy.h>
> >> +    combophy@d0a00000 {
> >> +        compatible = "intel,combophy-lgm", "intel,combo-phy";
> >> +        clocks = <&cgu0 1>;
> >> +        reg = <0xd0a00000 0x40000>,
> >> +              <0xd0a40000 0x1000>;
> >> +        reg-names = "core", "app";
> >> +        resets = <&rcu0 0x50 6>,
> >> +                 <&rcu0 0x50 17>;
> >> +        reset-names = "phy", "core";
> >> +        intel,syscfg = <&sysconf 0>;
> >> +        intel,hsio = <&hsiol 0>;
> >> +        intel,phy-mode = <COMBO_PHY_PCIE>;
> >> +
> >> +        phy@0 {
> > You need a 'reg' property to go with a unit-address.
> >
> > Really, I'd just simplify this to make parent 'resets' be 4 entries and
> > put '#phy-cells = <1>;' in the parent. Then you don't need these child
> > nodes.
> If child nodes are not present, use case like PCIe controller-0 using
> phy@0 and PCIe controller-1 using phy@1 wont be possible.

Yes, it will be.

For controller-0:
phys = <&phy 0>;

For controller-1:
phys = <&phy 1>;

Rob

  reply	other threads:[~2020-03-03 16:26 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-03-02  8:43 [PATCH v4 0/3] Add Intel ComboPhy driver Dilip Kota
2020-03-02  8:43 ` [PATCH v4 1/3] mfd: syscon: Add fwnode_to_regmap Dilip Kota
2020-03-02  8:43 ` [PATCH v4 2/3] dt-bindings: phy: Add YAML schemas for Intel Combophy Dilip Kota
2020-03-03  1:50   ` Rob Herring
2020-03-03  9:24     ` Dilip Kota
2020-03-03 16:26       ` Rob Herring [this message]
2020-03-04  9:16         ` Dilip Kota
2020-03-13  8:36           ` Dilip Kota
2020-03-02  8:43 ` [PATCH v4 3/3] phy: intel: Add driver support for ComboPhy Dilip Kota
2020-03-02 11:19   ` Andy Shevchenko
2020-03-03  8:41     ` Dilip Kota
2020-03-03 10:07       ` Andy Shevchenko

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